diff options
Diffstat (limited to 'libcpu/unicore32/sep6200/cpu.c')
| -rw-r--r-- | libcpu/unicore32/sep6200/cpu.c | 104 |
1 files changed, 52 insertions, 52 deletions
diff --git a/libcpu/unicore32/sep6200/cpu.c b/libcpu/unicore32/sep6200/cpu.c index 01da33ad93..8d0b86dae3 100644 --- a/libcpu/unicore32/sep6200/cpu.c +++ b/libcpu/unicore32/sep6200/cpu.c @@ -20,23 +20,23 @@ #ifdef __GNUC__ rt_inline void cache_invalid(void) { - __asm__ volatile ("movc p0.c5, r1, #28\n" - "nop;nop;nop;nop;nop;nop;nop;nop;\n" - : - : - :"memory", "cc" - ); + __asm__ volatile ("movc p0.c5, r1, #28\n" + "nop;nop;nop;nop;nop;nop;nop;nop;\n" + : + : + :"memory", "cc" + ); } rt_inline void cache_enable(void) { - __asm__ volatile ( "movc r1, p0.c1, #0\n" - "or r1, r1, #0xc\n" - "movc p0.c1, r1, #0\n" - "nop;nop;nop;nop;nop;nop;nop;nop;\n" - : - : - :"r0", "memory", "cc"); + __asm__ volatile ( "movc r1, p0.c1, #0\n" + "or r1, r1, #0xc\n" + "movc p0.c1, r1, #0\n" + "nop;nop;nop;nop;nop;nop;nop;nop;\n" + : + : + :"r0", "memory", "cc"); } rt_inline void clean_dcache(void) @@ -45,8 +45,8 @@ rt_inline void clean_dcache(void) "movc p0.c5, ip, #10\n" "nop; nop; nop; nop; nop; nop; nop; nop\n" : - : - :"ip", "memory", "cc"); + : + :"ip", "memory", "cc"); } rt_inline rt_uint32_t icache_status(void) @@ -77,7 +77,7 @@ rt_inline rt_uint32_t dcache_status(void) rt_inline void dcache_flush(void) { - __asm__ volatile ( "mov ip, #0\n" + __asm__ volatile ( "mov ip, #0\n" "movc p0.c5, ip, #14\n" "nop; nop; nop; nop; nop; nop; nop; nop\n" : @@ -87,7 +87,7 @@ rt_inline void dcache_flush(void) rt_inline void icache_invalid(void) { - __asm__ volatile ( "mov r0, #0\n" + __asm__ volatile ( "mov r0, #0\n" "movc p0.c5, r0, #20\n" "nop; nop; nop; nop; nop; nop; nop; nop\n" : @@ -107,8 +107,8 @@ rt_inline void dcache_invalid(void) rt_inline void icache_disable(void) { - icache_invalid(); - __asm__ volatile ( "movc r0, p0.c1, #0\n" + icache_invalid(); + __asm__ volatile ( "movc r0, p0.c1, #0\n" "andn r0, r0, #8\n" "movc p0.c1, r0, #0\n" : @@ -118,8 +118,8 @@ rt_inline void icache_disable(void) rt_inline void dcache_disable(void) { - dcache_flush(); - __asm__ volatile ( "movc r0, p0.c1, #0\n" + dcache_flush(); + __asm__ volatile ( "movc r0, p0.c1, #0\n" "andn r0, r0, #20\n" "movc p0.c1, r0, #0\n" : @@ -170,7 +170,7 @@ rt_inline void dcache_enable(void) */ void rt_hw_cpu_icache_enable() { - icache_enable(); + icache_enable(); } /** @@ -179,7 +179,7 @@ void rt_hw_cpu_icache_enable() */ void rt_hw_cpu_icache_disable() { - icache_disable(); + icache_disable(); } /** @@ -188,7 +188,7 @@ void rt_hw_cpu_icache_disable() */ rt_base_t rt_hw_cpu_icache_status() { - return icache_status(); + return icache_status(); } /** @@ -197,7 +197,7 @@ rt_base_t rt_hw_cpu_icache_status() */ void rt_hw_cpu_dcache_enable() { - dcache_enable(); + dcache_enable(); } /** @@ -206,7 +206,7 @@ void rt_hw_cpu_dcache_enable() */ void rt_hw_cpu_dcache_disable() { - dcache_disable(); + dcache_disable(); } /** @@ -215,29 +215,29 @@ void rt_hw_cpu_dcache_disable() */ rt_base_t rt_hw_cpu_dcache_status() { - return dcache_status(); + return dcache_status(); } static void sep6200_reset(rt_uint32_t addr) { __asm__ volatile ( "mov ip, #0\n" - "movc p0.c5, ip, #28\n" /*Cache invalidate all*/ - "movc p0.c6, ip, #6\n" /*TLB invalidate all*/ - "nop;nop;nop;nop;nop;nop;nop;nop;\n" - "movc ip, p0.c1, #0\n" /*ctrl register*/ - "andn ip, ip, #0x000f\n" /*disable caches and mmu*/ - "movc p0.c1, ip, #0\n" - "nop\n" - "mov pc, %0\n" - "nop;nop;nop;nop;nop;nop;nop;nop;\n" - : "=&r" (addr) - : - :"memory", "cc"); + "movc p0.c5, ip, #28\n" /*Cache invalidate all*/ + "movc p0.c6, ip, #6\n" /*TLB invalidate all*/ + "nop;nop;nop;nop;nop;nop;nop;nop;\n" + "movc ip, p0.c1, #0\n" /*ctrl register*/ + "andn ip, ip, #0x000f\n" /*disable caches and mmu*/ + "movc p0.c1, ip, #0\n" + "nop\n" + "mov pc, %0\n" + "nop;nop;nop;nop;nop;nop;nop;nop;\n" + : "=&r" (addr) + : + :"memory", "cc"); } static void sep6200_poweroff(void) { - rt_kprintf("sep6200 power off not implemented\n"); + rt_kprintf("sep6200 power off not implemented\n"); while(1); } @@ -248,12 +248,12 @@ static void sep6200_poweroff(void) void rt_hw_cpu_reset() { - rt_kprintf("Soft reset, Restarting system...\n"); - sep6200_reset(0); + rt_kprintf("Soft reset, Restarting system...\n"); + sep6200_reset(0); - while(1); /* loop forever and wait for reset to happen */ + while(1); /* loop forever and wait for reset to happen */ - /* NEVER REACHED */ + /* NEVER REACHED */ } /** @@ -262,15 +262,15 @@ void rt_hw_cpu_reset() */ void rt_hw_cpu_shutdown() { - rt_uint32_t level; - rt_kprintf("shutdown...\n"); + rt_uint32_t level; + rt_kprintf("shutdown...\n"); - level = rt_hw_interrupt_disable(); - sep6200_poweroff(); - while (level) - { - RT_ASSERT(0); - } + level = rt_hw_interrupt_disable(); + sep6200_poweroff(); + while (level) + { + RT_ASSERT(0); + } } /*@}*/ |