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-rw-r--r--libcpu/arm/cortex-m0/context_gcc.S4
-rw-r--r--libcpu/arm/cortex-m0/context_iar.S4
-rw-r--r--libcpu/arm/cortex-m0/context_rvds.S4
-rw-r--r--libcpu/arm/cortex-m23/context_gcc.S4
-rw-r--r--libcpu/arm/cortex-m23/context_iar.S4
-rw-r--r--libcpu/arm/cortex-m23/context_rvds.S4
-rw-r--r--libcpu/arm/cortex-m3/context_gcc.S4
-rw-r--r--libcpu/arm/cortex-m3/context_iar.S4
-rw-r--r--libcpu/arm/cortex-m3/context_rvds.S4
-rw-r--r--libcpu/arm/cortex-m33/context_gcc.S4
-rw-r--r--libcpu/arm/cortex-m33/context_iar.S4
-rw-r--r--libcpu/arm/cortex-m33/context_rvds.S4
-rw-r--r--libcpu/arm/cortex-m4/context_gcc.S4
-rw-r--r--libcpu/arm/cortex-m4/context_iar.S4
-rw-r--r--libcpu/arm/cortex-m4/context_rvds.S4
-rw-r--r--libcpu/arm/cortex-m7/context_gcc.S4
-rw-r--r--libcpu/arm/cortex-m7/context_iar.S4
-rw-r--r--libcpu/arm/cortex-m7/context_rvds.S4
18 files changed, 72 insertions, 0 deletions
diff --git a/libcpu/arm/cortex-m0/context_gcc.S b/libcpu/arm/cortex-m0/context_gcc.S
index 6e06661708..0173b594f6 100644
--- a/libcpu/arm/cortex-m0/context_gcc.S
+++ b/libcpu/arm/cortex-m0/context_gcc.S
@@ -180,6 +180,10 @@ rt_hw_context_switch_to:
/* enable interrupts at processor level */
CPSIE I
+ /* ensure PendSV exception taken place before subsequent operation */
+ DSB
+ ISB
+
/* never reach here! */
/* compatible with old version */
diff --git a/libcpu/arm/cortex-m0/context_iar.S b/libcpu/arm/cortex-m0/context_iar.S
index 6f410d1a24..f00d03417f 100644
--- a/libcpu/arm/cortex-m0/context_iar.S
+++ b/libcpu/arm/cortex-m0/context_iar.S
@@ -186,6 +186,10 @@ rt_hw_context_switch_to:
; enable interrupts at processor level
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
; compatible with old version
diff --git a/libcpu/arm/cortex-m0/context_rvds.S b/libcpu/arm/cortex-m0/context_rvds.S
index c6afec4f18..3f1a7e267a 100644
--- a/libcpu/arm/cortex-m0/context_rvds.S
+++ b/libcpu/arm/cortex-m0/context_rvds.S
@@ -189,6 +189,10 @@ rt_hw_context_switch_to PROC
; enable interrupts at processor level
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
ENDP
diff --git a/libcpu/arm/cortex-m23/context_gcc.S b/libcpu/arm/cortex-m23/context_gcc.S
index 21f7fb3f94..717da447f3 100644
--- a/libcpu/arm/cortex-m23/context_gcc.S
+++ b/libcpu/arm/cortex-m23/context_gcc.S
@@ -181,6 +181,10 @@ rt_hw_context_switch_to:
/* enable interrupts at processor level */
CPSIE I
+ /* ensure PendSV exception taken place before subsequent operation */
+ DSB
+ ISB
+
/* never reach here! */
/* compatible with old version */
diff --git a/libcpu/arm/cortex-m23/context_iar.S b/libcpu/arm/cortex-m23/context_iar.S
index c7d85cc5e2..7600ef3b77 100644
--- a/libcpu/arm/cortex-m23/context_iar.S
+++ b/libcpu/arm/cortex-m23/context_iar.S
@@ -187,6 +187,10 @@ rt_hw_context_switch_to:
; enable interrupts at processor level
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
; compatible with old version
diff --git a/libcpu/arm/cortex-m23/context_rvds.S b/libcpu/arm/cortex-m23/context_rvds.S
index 4771012779..38c3c36f31 100644
--- a/libcpu/arm/cortex-m23/context_rvds.S
+++ b/libcpu/arm/cortex-m23/context_rvds.S
@@ -190,6 +190,10 @@ rt_hw_context_switch_to PROC
; enable interrupts at processor level
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
ENDP
diff --git a/libcpu/arm/cortex-m3/context_gcc.S b/libcpu/arm/cortex-m3/context_gcc.S
index 82246c6379..88c25d9e5c 100644
--- a/libcpu/arm/cortex-m3/context_gcc.S
+++ b/libcpu/arm/cortex-m3/context_gcc.S
@@ -162,6 +162,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ /* ensure PendSV exception taken place before subsequent operation */
+ DSB
+ ISB
+
/* never reach here! */
/* compatible with old version */
diff --git a/libcpu/arm/cortex-m3/context_iar.S b/libcpu/arm/cortex-m3/context_iar.S
index 7c0e69bf59..5173652d93 100644
--- a/libcpu/arm/cortex-m3/context_iar.S
+++ b/libcpu/arm/cortex-m3/context_iar.S
@@ -161,6 +161,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
; compatible with old version
diff --git a/libcpu/arm/cortex-m3/context_rvds.S b/libcpu/arm/cortex-m3/context_rvds.S
index 8a4f9880af..cdf300baa4 100644
--- a/libcpu/arm/cortex-m3/context_rvds.S
+++ b/libcpu/arm/cortex-m3/context_rvds.S
@@ -167,6 +167,10 @@ rt_hw_context_switch_to PROC
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
ENDP
diff --git a/libcpu/arm/cortex-m33/context_gcc.S b/libcpu/arm/cortex-m33/context_gcc.S
index 3c4ac8a236..d1a4921a9d 100644
--- a/libcpu/arm/cortex-m33/context_gcc.S
+++ b/libcpu/arm/cortex-m33/context_gcc.S
@@ -249,6 +249,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ /* ensure PendSV exception taken place before subsequent operation */
+ DSB
+ ISB
+
/* never reach here! */
/* compatible with old version */
diff --git a/libcpu/arm/cortex-m33/context_iar.S b/libcpu/arm/cortex-m33/context_iar.S
index cfc2459167..c9c2ed671d 100644
--- a/libcpu/arm/cortex-m33/context_iar.S
+++ b/libcpu/arm/cortex-m33/context_iar.S
@@ -253,6 +253,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
; compatible with old version
diff --git a/libcpu/arm/cortex-m33/context_rvds.S b/libcpu/arm/cortex-m33/context_rvds.S
index dc22ead7c5..5b527b537c 100644
--- a/libcpu/arm/cortex-m33/context_rvds.S
+++ b/libcpu/arm/cortex-m33/context_rvds.S
@@ -254,6 +254,10 @@ rt_hw_context_switch_to PROC
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
ENDP
diff --git a/libcpu/arm/cortex-m4/context_gcc.S b/libcpu/arm/cortex-m4/context_gcc.S
index 6f1ffa3b17..5088e403ed 100644
--- a/libcpu/arm/cortex-m4/context_gcc.S
+++ b/libcpu/arm/cortex-m4/context_gcc.S
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ /* ensure PendSV exception taken place before subsequent operation */
+ DSB
+ ISB
+
/* never reach here! */
/* compatible with old version */
diff --git a/libcpu/arm/cortex-m4/context_iar.S b/libcpu/arm/cortex-m4/context_iar.S
index 18d6a3f784..30be2b7202 100644
--- a/libcpu/arm/cortex-m4/context_iar.S
+++ b/libcpu/arm/cortex-m4/context_iar.S
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
; compatible with old version
diff --git a/libcpu/arm/cortex-m4/context_rvds.S b/libcpu/arm/cortex-m4/context_rvds.S
index 3f948bc349..018e4251c9 100644
--- a/libcpu/arm/cortex-m4/context_rvds.S
+++ b/libcpu/arm/cortex-m4/context_rvds.S
@@ -208,6 +208,10 @@ rt_hw_context_switch_to PROC
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
ENDP
diff --git a/libcpu/arm/cortex-m7/context_gcc.S b/libcpu/arm/cortex-m7/context_gcc.S
index b5a4920862..8475d33f5f 100644
--- a/libcpu/arm/cortex-m7/context_gcc.S
+++ b/libcpu/arm/cortex-m7/context_gcc.S
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ /* ensure PendSV exception taken place before subsequent operation */
+ DSB
+ ISB
+
/* never reach here! */
/* compatible with old version */
diff --git a/libcpu/arm/cortex-m7/context_iar.S b/libcpu/arm/cortex-m7/context_iar.S
index 18d6a3f784..30be2b7202 100644
--- a/libcpu/arm/cortex-m7/context_iar.S
+++ b/libcpu/arm/cortex-m7/context_iar.S
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
; compatible with old version
diff --git a/libcpu/arm/cortex-m7/context_rvds.S b/libcpu/arm/cortex-m7/context_rvds.S
index d051f819c1..a507593cca 100644
--- a/libcpu/arm/cortex-m7/context_rvds.S
+++ b/libcpu/arm/cortex-m7/context_rvds.S
@@ -208,6 +208,10 @@ rt_hw_context_switch_to PROC
CPSIE F
CPSIE I
+ ; ensure PendSV exception taken place before subsequent operation
+ DSB
+ ISB
+
; never reach here!
ENDP
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-30 16:05:57 +0000