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15.2 (#11870)
* [bsp][esp32] adapt C3/C6 to ESP-IDF v6.1 and bump RISC-V toolchain to gcc 15.2
- Adapt ESP32-C3/C6 BSP to ESP-IDF v6.1; bump RISC-V toolchain to gcc 15.2
- C6: re-enable SPI with board-local drv_spi.c; add devices.spi to CI
attachconfig; drop shared drv_spi.c spi_command_t hack
- C6: fix ADC oneshot multi-channel unit handle and mutex
- C3: fix portTRY_ENTER_CRITICAL_SAFE expansion in portmacro.h
- Compat with RT-Thread-packages/esp-idf rtt-dev used by CI: map
SYSTIMER_* to SYSTIMER_LL_* (C3 and C6 board.c), accept uart_periph.h
from hal/ or soc/
- Fix clang-format and cppcheck issues in the compat code
Signed-off-by: seteiro <[email protected]>
Co-Authored-By: Grok <[email protected]>
* ci: retrigger after esp-idf#18 merged
* bsp: ESP: fix C6 ADC for IDF 6.1 (adc_ll bus clock)
Replace removed PERIPH_SARADC_MODULE with adc_ll_enable_bus_clock /
adc_ll_reset_register when ESP_IDF_VERSION >= 6.0.0.
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Signed-off-by: seteiro <[email protected]>
Co-authored-by: Grok <[email protected]>
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Sync the HPMicro BSPs with hpm_sdk v1.13.0 and add the HPM5100EVK
(HPM5151) board.
- add the hpm5100evk BSP (board/startup/applications/Kconfig/docs) and
register it in .github/ALL_BSP_COMPILE.json, bsp/README.md and the
HPMicro READMEs
- re-sync the 11 existing boards (board/startup/debug scripts/linker
scripts/applications) with hpm_sdk v1.13.0, keeping the RT-Thread
specific parts: clock_time based drv_timer, CXX wired into the scons
environment, SConscript outputs under build/, named Kconfig choices,
rt_hw_us_delay in board_delay_*, board local codec files
- sync the shared driver layer with hpm_sdk v1.13.0 (GPTMRv2/PTMR,
PUART, soft I2C/SPI and the remaining peripheral driver updates)
- select the hpm_sdk v1.13.0 online package (PKG_USING_HPM_SDK_V113)
- use -Og instead of -O0 for the debug builds and print floats with the
RT-Thread klibc implementation instead of newlib nano
- initialize the RT-Thread heap before the SDK console init: the SDK
console_init() calls setvbuf(), which allocates through the C library
malloc() and tripped RT_ASSERT() in rt_smem_alloc() on the boards
built with RT_USING_DEBUG
- keep only ram_rtt.ld/flash_rtt.ld per board, align the DLM origin to
4KB on hpm5300evk/hpm5301evklite (the unaligned origin made the
linker emit a file backed PT_LOAD for the RAM area, which broke
"program rtthread.elf"), and anchor the generated .bin at the flash
base address 0x80000000
- sync the hpm6750evk openocd debug scripts with the new style used by
the other boards (hpm_common.cfg/hpm_reset.cfg with arp_halt)
- keep the upstream synced board/startup/libraries trees of bsp/hpmicro out of the
changed-file cppcheck run (same policy as bsp/hpmicro/.clang-format-ignore): the
check runs without the hpm_sdk include paths, so it reports ATTR_PLACE_AT and the
linker script symbol arithmetic in c_startup() as errors
- give the hpmicro boards in the changed-file scons trigger list the RV32 toolchain
they need (RISC-V-GCC-RV32) and add the matching installation step to that
workflow: the entries used sourcery-arm, which only provides the ARM toolchain,
so those legs could not find riscv32-unknown-elf-gcc
- keep hpm5100evk's ram_rtt.ld identical to the hpm_sdk v1.13.0
reference: the .fast_ram sections belong in DLM there (the DLM has
enough headroom), and that also makes its RAM and flash layouts agree
- skip the dependency pre-check when cleaning (scons -c): it runs from
DoBuilding() unconditionally, so a clean request with packages/ not
fetched yet was aborted with exit code 1 instead of cleaning
- make the manual scons trigger workflow runnable: it aborted while still
downloading actions because actions/upload-artifact@v3 is deprecated,
and scons was not on PATH because ~/.env/env.sh was never sourced.
Install tools/requirements.txt and source the Env PATH script in the
build step, and use @main action versions, as bsp_buildings.yml does
- start the LED demo thread only when rt_thread_create() succeeded
Tested:
- 12 boards x {ram_debug, ram_release, flash_debug, flash_release}:
48/48 clean builds
- flash boot + msh on hpm5100evk, hpm5300evk, hpm5e00evk, hpm6200evk,
hpm6300evk, hpm6750evk, hpm6750evk2, hpm6750evkmini, hpm6800evk,
hpm6e00evk, hpm6p00evk (list device/timer, ps, free, reset, rt_kprintf
float formatting)
- re-ran .github/workflows/manual_trigger_scons_except_STM32_all.yml with
the matrix reduced to the three hpmicro rows: all three legs build and
scons --dist succeeds with no local workarounds
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* [libcpu][risc-v] Refactor the RISC-V architecture port
Introduce an opt-in unified RISC-V common layer for RV32 and RV64 while keeping existing BSPs on the legacy implementation during migration.
- use ARCH_RISCV and ARCH_CPU_64BIT for architecture and XLEN selection
- unify context, trap, MMU, cache, timer, SBI, SMP and ISA handling
- add PLIC, CLIC, ACLINT, APLIC and IMSIC support
- map physical hart IDs to contiguous logical CPU IDs
- add T-Head vendor overrides while preserving legacy ports
- migrate qemu-virt64-riscv with RV32 and RV64 support
- update clock_time, MM, LWP, OFW, PCI and Rust integration
Existing BSPs continue using legacy_common or common64 unless they select RT_USING_RISCV_NEW_COMMON.
Signed-off-by: GuEe-GUI <[email protected]>
* [libcpu][risc-v] skip disabled CPU nodes in early FDT walk
Rbb666 noted that rt_hw_fdt_install_early() walked every /cpus child
without checking status, so disabled cores still joined hart registration
and MMU capability probing. Skip nodes that are not okay/ok via
rt_fdt_device_is_available() before reading reg or mmu-type.
Signed-off-by: seteiro <[email protected]>
* [libcpu][risc-v] Fix per-CPU page table mapping
- reuse existing non-leaf page table entries when mapping per-CPU areas
- reject leaf entry conflicts instead of overwriting mappings
Signed-off-by: GuEe-GUI <[email protected]>
---------
Signed-off-by: GuEe-GUI <[email protected]>
Signed-off-by: seteiro <[email protected]>
Co-authored-by: seteiro <[email protected]>
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Newer GCC emits C++ global constructors into .init_array, which many
linker scripts keep outside [__ctors_start__, __ctors_end__), so they
never ran. Walk __init_array_start/__init_array_end (weak) as well,
skipping entries already covered by the ctors range.
Add RT_USING_CPP_CRT_INIT for ports whose startup runtime already runs
.init_array, default on for the simulator. With it set, only the
.init_array walk is skipped; the ctors range is still walked.
Renesas RA/RA_WIRELESS/RZ families select it when C++ is enabled: FSP
SystemInit() already walks .init_array, so boards whose linker script
only provides __init_array_* would run constructors twice. Boards that
fold .init_array into the ctors range (ra6m3-hmi-board, ra8d1, rz)
still run them once via RT-Thread.
Also source env.sh and restore RTT_EXEC_PATH in ToolsCI project generate
and dist steps so scons is on PATH (exit 127) and the ARM toolchain path
is not overwritten by env.sh.
Fixes #11778
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* [bsp][esp32-c6] add ESP32-C6-DevKitC-1 support
Add bsp/ESP/ESP32_C6. Default image is GPIO, UART0 and ADC. The C6 IDF sources are not in RT-Thread-packages/esp-idf yet.
* [bsp][esp32-c6] fix CI format, C6 package and CH32V203 D6 build
clang-format the files the format check rejected. Fetch the C6 scons
branch when the downloaded ESP-IDF package has no C6 target. Patch the
CH32V20x SDK under libraries so a D6 build no longer calls Exit().
* [bsp][esp32-c6] fetch mbedtls and stop pkgs from pulling the C6 branch
* [bsp][esp32-c6] rebuild CI against the package branch tip
* [bsp][esp32-c6] rebuild CI against the strict-mode package tip
* [bsp][esp32-c6] fix the reviewed ADC, math and package pin bugs
Keep the IDF tree on the reviewed commit, and stop the ADC and critical-section paths from reporting success when they did not.
* [bsp][esp32-c6] reserve stuck interrupt lines and lock ADC
CPU lines 3 and 4 never latch an enable, so copying the handler left the non-IRAM mask on the old line. Reserve those lines and let the allocator write the mask and the route together. The C6 oneshot registers are shared, so one mutex covers enable and convert.
* [bsp][esp32-c6] list the peripherals this board actually runs
GPIO, UART0 and ADC1 have been read on the DevKitC-1. Radios and the untested buses stay marked unsupported.
* [bsp][esp32-c6] keep SPI unsupported after the loopback mismatch
GPIO7 shorted to GPIO2 returned 0xA5000000 for a sent 0xA5, so the table does not mark SPI supported.
---------
Co-authored-by: seteiro <[email protected]>
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- libraries/N32_Drivers: add ADC/DAC/I2C/SPI config headers for the
h47x_48x, h49x and h7xx series, and extend the shared drivers
(adc, dac, eth, gpio, hard_i2c, nand, qspi, sdram, spi, usart, wdt).
- n32h487zgl7-evb / n32h497zgl7-evb: add board ports (femc_timing,
phy_reset, usb_config) and update Kconfig, SConscript, rtconfig and
the IAR/Keil project files.
- n32h760zil7-stb: update Kconfig and rtconfig.
- CI: register the three n32hxxx boards.
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* [bsp][stm32] Add stm32n657-st-nucleo BSP
* style: format STM32 HAL drivers and STM32N657 BSP with clang-format
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The original overflow logic used __spm[tm_mon] as the current month's
length when normalizing tm_mday. This produced incorrect dates after
crossing month boundaries and left zero or negative days unnormalized.
Use the difference between adjacent cumulative day offsets with
leap-year handling. Normalize overflow in tm_sec, tm_min, tm_hour,
tm_mday, and tm_mon to keep the affected broken-down fields normalized.
Add regression tests for month boundaries, leap years, large offsets,
zero and negative days, negative time fields, combined overflow, and
boundary carry cases.
Close #11686
Signed-off-by: Hui Su <[email protected]>
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n32h497zgl7-evb和n32h487zgl7-evb bsp (#11627)
1、修改n32\n32gxx_lxx\n32g4frml-stb中的GCC启动文件bl entry
2、修复完善n32h760zil7-stb bsp，支持GCC环境、支持更多外设
3、添加n32h487zgl7-evb初版BSP
4、添加n32h497zgl7-evb初版BSP
5、删除n32g452xx这个bsp
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Co-authored-by: OnlyoutzZ <OnlyoutzZ+github[bot]@noreply.github.com>
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- Add chip macro for driver
- Modify 'IDLE_THREAD_STACK_SIZE' to 512
- Modify 'HWTIMER' to 'CLOCK_TIMER'
- Use 'clang-format' format driver and BSP code
- Fix SPI clock division configuration
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* ci: add armclang BSP build coverage
* components/libc: avoid armclang errno include recursion
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Add initial BSP support for the DM-MC02 board based on STM32H723VGT6.
Supported peripherals (Stage 1):
- GPIO (RT_USING_PIN)
- UART1 as FinSH console
Note: Onboard WS2812 LED and other peripherals are planned for Stage 2.
Also update bsp/README.md BSP support summary table.
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: CYFS <[email protected]>
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This is a builtin fdt example BSP
Signed-off-by: GuEe-GUI <[email protected]>
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- add i686-atxhua-picolib-elf-gcc toolchain
- add picolib option to bsp/x86
- add necessary picolib require library
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* 添加 rdk_s100 bsp
* 添加 CI 看护
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* add i686 x86 newlib toolchain
* add missing x86 gcc option to manual_dist.yml
* fix typo
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