| Age | Commit message (Collapse) | Author |
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* [rtdef] rename RT_WEAK attribute as rt_weak
* [rtdef] rename RT_USED attribute as rt_used
* [rtdef] rename RT_SECTION attribute as rt_section
* [rtdef] rename ALIGN attribute as rt_align
* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
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* 添加了硬件spi驱动
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* 修改ry命令,已便于自定义保存路径
* modified: components/utilities/ymodem/ry_sy.c
* 修复从被动错误恢复后发送返回异常
* 修复在自动重传模式下,ACK异常阻塞线程
- 删除TX中断函数else分支。仅当RQCP位 置一才进入该中断
- 添加SCE中断函数中关于ACK_ERR的else判断。自动重传模式下会进入该判断,打断自动重传释放完成量。
* 增加对于CAN1与CAN2的SCE中断和TX中断的公共处理函数
* formatting格式化代码
* update struct can_filter_item and rt_can_msg
1. 对过滤器号和索引号结构体定义中同一名称hdr进行重命名hdr_bank和hdr_index,
以便准确区分.采用宏定义兼容以前变量名.
2. 添加接收标识rxfifo,已指明是哪个RXFIFO.
* 更正42M下的波特率
* 修复接收获取索引号错误
* 添加接收标识
* 更新注释
* 取消CANFD限制
* update struct can_filter_item and rt_can_msg
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* replaced the judgement of RT_USING_XXX with BSP_USING, and add some tips in Konfig about soft_i2c
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��少代码量 (#6548)
* 新增硬件定时器功能
* 新增定时器功能
* Update Kconfig
* Update bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.h
Co-authored-by: Man, Jianting (Meco) <[email protected]>
* Update Kconfig
* 添加剩余的PWM设备,并为每个PWM设备添加条件编译,减少代码量
* Update drv_pwm.c
* 根据建议进行修改
* 已根据建议修改
* Update bsp/wch/risc-v/Libraries/ch32_drivers/drv_pwm.c
Co-authored-by: Man, Jianting (Meco) <[email protected]>
* Update bsp/wch/risc-v/Libraries/ch32_drivers/drv_pwm.h
Co-authored-by: Man, Jianting (Meco) <[email protected]>
* Update bsp/wch/risc-v/Libraries/ch32_drivers/drv_pwm.c
Co-authored-by: Man, Jianting (Meco) <[email protected]>
Co-authored-by: Man, Jianting (Meco) <[email protected]>
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新增CH32V307的硬件定时器功能,并在CH32V307V-R1-1V0板卡上进行了测试。
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* [ch32v307] update Chinese readme
* add English readme
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* [bsp][ch32v307]添加了 pwm 驱动
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CH32V307 添加can驱动。
CAN1和CAN2均可以使用,而且调整好波特率
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* [bsp][sconscript] 整理统一sconscript格式
* update
* update
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* 修改部分菜单
* change again
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* 修改RT_USING为BSP_USING
* Update SConscript
* Update SConscript
Co-authored-by: Man, Jianting (Meco) <[email protected]>
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添加了 ch32v307 看门狗驱动,已在 ch32v307评估板验证;
修改了 rt-thread\bsp\wch\risc-v\ch32v307v-r1\board 目录下的 Kconfig 文件;
修改了 rt-thread\bsp\wch\risc-v\Libraries\ch32_drivers 目录下的 SConscript 文件;
添加了 rt-thread\bsp\wch\risc-v\Libraries\ch32_drivers 目录下的 drv_iwdt.c 文件;
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添加了ch32v307的adc驱动,已在ch32v307评估班上对adc1ch5进行了验证,并修改了kconfig以及scons脚本,可以成功编译以及使用
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* add Kconfig file "USART2~USART8"
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* Update drv_usart.h
CH32V307的串口1外设是对接在APB2桥上,其他串口均对接在APB1桥上
已完全测试,并发现一个问题,已修正。
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* 修改Kconfig的不足
* update gpio driver
* formatting code
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ch569w-evt: add usbhs device mode driver
* usbd driver tested with cdc_vcom, internal loopback
(can't run both MSH & usbd due to 16KB RAM limitation)
* reduce usrstack & main thread stack size for usbd test
* ch56x_uart.c : iron out UART0_PIN_ALT assignment
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* add ch32v307 lib
* fix scons
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attach https://github.com/RT-Thread/rt-thread/pull/5451
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add PWM driver, output checked with logic analyzer
spi_xfer() bug fix for cs_pin and message looping
uart pin_mode init moved to uart driver
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* ch569w-evt : add spi master driver, SPI0 tested
* Update bsp/wch/risc-v/ch569w-evt/board/Kconfig
* Update bsp/wch/risc-v/ch569w-evt/board/Kconfig
Co-authored-by: Man, Jianting (Meco) <[email protected]>
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WCH CH569W-R0-1v0 evt board bsp port, first version
dev/test under Ubuntu 20.04
toolchain from MounRiver_Studio_Community_Linux_x64_V120
tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling)
libcpu/risc-v/SConscript :
group includes rtconfig.CPU only if folder exists
libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() :
make it RT_WEAK for customization
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将路径更新为IAR最新版本的路径
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IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链
此外,将判断条件改为列表方式,这样更方便后续增加其他可能的IAR编译链
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将GCC判断条件改为列表方式,方便后续增加新的编译工具链
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* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
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feat: move MRS demo source to bsp and libraries folder
feat: update Sconscript
feat: modify SConstruct in the bsp
feat: use the rtconfig.py of gd32vf103v-eval bsp to modify
feat: use the MRS's rtconfig.h temoporarily
feat: update Kconfig files
feat: use the MRS's .ld and rename as link.lds
feat: add ch32v1 porting folder
perf: remove board/system_ch32v10x.c
fix: define SOC_ARM_SERIES_CH32V103 in rtconfig.h
fix: add some neccessary macros in rtconfig.h
perf: use the menuconfig to generate rtconfig.h
feat: add readme.md
fix: correct the bad encode in main.c
fix: include board.h in main.c
perf: check and update README.md
perf: remove ch32f10x_port_cn.md
feat: ignore the standard libraries's CI checking
feat: add sdk_dist.py
fix: correct some style errors again
perf: simply the board/kconfig
fix: format ch32v103r-evt
fix: format drvs and libcpu
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* [update] add fal component.
* [update] format code.
* [update] change PKG_USING_FAL to RT_USING_FAL
* [update] format code.
* [update] fal
* [update] delete FAL_SW_VERSION
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* add ch579m bsp
Author: Tuber <[email protected]>
Date: Wed Feb 16 07:20:23 2022 +0000
* fix uart reg value error and format code
* change file encode to utf-8
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