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* [bsp][esp32-c6] add ESP32-C6-DevKitC-1 support
Add bsp/ESP/ESP32_C6. Default image is GPIO, UART0 and ADC. The C6 IDF sources are not in RT-Thread-packages/esp-idf yet.
* [bsp][esp32-c6] fix CI format, C6 package and CH32V203 D6 build
clang-format the files the format check rejected. Fetch the C6 scons
branch when the downloaded ESP-IDF package has no C6 target. Patch the
CH32V20x SDK under libraries so a D6 build no longer calls Exit().
* [bsp][esp32-c6] fetch mbedtls and stop pkgs from pulling the C6 branch
* [bsp][esp32-c6] rebuild CI against the package branch tip
* [bsp][esp32-c6] rebuild CI against the strict-mode package tip
* [bsp][esp32-c6] fix the reviewed ADC, math and package pin bugs
Keep the IDF tree on the reviewed commit, and stop the ADC and critical-section paths from reporting success when they did not.
* [bsp][esp32-c6] reserve stuck interrupt lines and lock ADC
CPU lines 3 and 4 never latch an enable, so copying the handler left the non-IRAM mask on the old line. Reserve those lines and let the allocator write the mask and the route together. The C6 oneshot registers are shared, so one mutex covers enable and convert.
* [bsp][esp32-c6] list the peripherals this board actually runs
GPIO, UART0 and ADC1 have been read on the DevKitC-1. Radios and the untested buses stay marked unsupported.
* [bsp][esp32-c6] keep SPI unsupported after the loopback mismatch
GPIO7 shorted to GPIO2 returned 0xA5000000 for a sent 0xA5, so the table does not mark SPI supported.
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Co-authored-by: seteiro <[email protected]>
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* [components][clock_time] Refactor time subsystem around clock_time
Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.
Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.
Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.
* [components][clock_time] Use BSP-provided clock timer frequency on riscv64
* [risc-v] Use runtime clock timer frequency for tick and delays
* [bsp] Add clock timer frequency hooks for riscv64 boards
* [bsp] Update Renesas RA driver doc clock_timer link
* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh
* [bsp][rk3500] Update rk3500 clock configuration
* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays
* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci
* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk
Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.
* [bsp][raspi3] select clock time for systimer
* [bsp][hpm5300evk] Trim trailing blank line
* [bsp][hpm5301evklite] Trim trailing blank line
* [bsp][hpm5e00evk] Trim trailing blank line
* [bsp][hpm6200evk] Trim trailing blank line
* [bsp][hpm6300evk] Trim trailing blank line
* [bsp][hpm6750evk] Trim trailing blank line
* [bsp][hpm6750evk2] Trim trailing blank line
* [bsp][hpm6750evkmini] Trim trailing blank line
* [bsp][hpm6800evk] Trim trailing blank line
* [bsp][hpm6e00evk] Trim trailing blank line
* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source
* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.
* [docs][clock_time] add clock time documentation
* [docs][clock_time] Update clock time subsystem documentation
- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file
* [kernel][utest] Trim trailing space
* [clock_time] Fix hrtimer wrap handling
* [clock_time] fix the static rt_inline issue
* [clock_time] fix the rt_clock_hrtimer_control result issue
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[bsp][wch]:adapt wch risc serial_v2
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fix wch scons --dist
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* [bsp][wch][risc-v] add drv_flash for ch32v307.
* [bsp][wch][risc-v] 1. add yml file for ch32v307.
2. fix programs a word at chip flash timeout.
3. priority use of fast mode.
* [bsp][wch][risc-v] fix spi device for ch32v307.
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* [bsp][wch]to clear the serial of ch32v20x
* [bsp][wch] move ch32v20x sdk to pkg
* [ci] add ch32v208 bsp
* [bsp][wch] update readme
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* [bsp][wch] move ch32v307 sdk to package
* [bsp][wch] move ch32v307 sdk to package
* [bsp][wch] use a fixed version
* [bsp][wch]fix: ch32v307v-r1 build
* [bsp][wch] add yd board to ci
* [bsp][wch] revert toolchain path
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https://github.com/RT-Thread/rt-thread/pull/9420
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The loop variable in the function 'drv_soft_spi:xx_pin_init()' is initialized to 0.
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为什么提交这份PR (why to submit this PR)
ps：在设备初始化阶段不应该存在对硬件的操作
你的解决方案是什么 (what is your solution)
ps：添加一个pin_init函数，在spi设备使用时调用该函数来完成硬件引脚的状态初始化，而不是在设备初始化阶段对硬件进行操作，已经在瑞萨HMI上通过验证
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would not compile (#8678)
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sync update
some optimize
[bsp][driver] Updates the naming convention of the i2c configuration item
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Signed-off-by: xiaofan <[email protected]>
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1: If IAP has set mstatus to other value, using csrs will not change old value of mstatus in IAP. It should using csrw instead.
2: Reduce the flash size of undefined irq functions.
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将UART4后的中断函数声明改为UART
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