summaryrefslogtreecommitdiff
path: root/libcpu/risc-v/e310/start_gcc.S
AgeCommit message (Expand)Author
2017-08-26[BSP] cleanup for hifive1 bsp.Bernard Xiong
2017-07-31fix bug in context_gcc.s and start_gcc.s:zhangjun
2017-07-30fix bug in rt_hw_context_switch_interrupt_dozhangjun
2017-07-30 修改: ../../libcpu/risc-v/e310/context_gcc.Szhangjun
2017-07-29fix trap_entryzhangjun
2017-07-26remove "csrrc a5, mstatus, MSTATUS_MIE" in rt_hw_interrupt_enable();zhangjun
2017-07-17add context_gcc.szhangjun