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AgeCommit message (Expand)Author
2025-09-03fix(risc-v, virt64, plic): use volatile rw for claim and completeHaojin Tang
2025-09-01fix(risc-v, mmu): fix type mismatch of `_query`Haojin Tang
2025-09-01fix(risc-v/virt64, cpp): add spaces to fix `Wliteral-suffix`Haojin Tang
2025-09-01fix(riscv, cpp): remove `rt_hw_cpu_id` in `cpuport.h` to fix errorHaojin Tang
2025-07-23[lwp][rv64] restore tp register in arch_thread_signal_enter to fix user-mode ...Yulong Wang
2025-05-30[bsp]增加超睿DP1000 bsp支持ZhangJing
2025-05-30移除无用文件，该文件未被任何BSP使用Yaochenger
2025-05-30[libcpu/common] 修正对RV32E的支持，RV32E不支持s2寄存器，修改�...Yaochenger
2025-05-28[libcpu][risc-v]:add comment for the round down of symb_pczhangjing
2025-05-28[libcpu][risc-v] fix:only map the 1GB space where the original code segment i...zhangjing
2025-04-11libcpu: riscv: declare external symbols insideChen Wang
2025-04-11libcpu: cleanup undefined rt_hw_mmu_kernel_map_init (#10177)Chen Wang
2025-03-17[libcpu][risc-v]add code for handling exception scenarios in _unmap_area.ligr
2025-03-17[libcpu][risc-v]remove unused parameter 'size' for func _unmap_area.ligr
2025-03-12[libcpu][risc-v]add comments for rt_hw_mem_setup_early. (#10102)Guorui Li
2025-03-03[libcpu][riscv] add a doc for wch saving the irq stack as stack-512 (#10063)Kai
2025-03-02[libcpu][risc-v]add comments for rv64 sv39 mmu APIs. (#10053)Guorui Li
2025-02-28[bugfix][risc-v]fix the PPN length error in GET_PPN(pte). (#10020)Guorui Li
2025-02-22libcpu: riscv: fixed ARCH_RISCV_VECTOR issuekenneth.liu
2025-01-29libcpu: riscv: rv64: fixed warningsChen Wang
2025-01-29libcpu: riscv: common: fixed build warningsChen Wang
2025-01-10bsp: qemu-virt64-riscv: remove config RISCV_S_MODEChen Wang
2024-11-29[libcpu/riscv]解决smp下cpuport.h中的编译问题 (#9714)heyuanjie87
2024-11-27给vector模块添加构建脚本heyuanjie87
2024-11-27[libcpu][riscv]virt64使用通用vector支持代码heyuanjie87
2024-11-21[libcpu][riscv]纠正pv_offset的对齐检查heyuanjie87
2024-11-15[libcpu]riscv使用call指令解决长跳转问题heyuanjie87
2024-10-23[kernel] Specification interrupt nested level variable declaration type (#9568)Yuqiang Wang
2024-10-16[libcpu]添加对riscv vector的支持 (#9531)heyuanjie87
2024-10-11[libcpu][risc-v] fix the bug when using ASID in the RV64 MMUzhangjing0303
2024-10-09[libcpu][risc-v]remove the redundant "0x" from the printed information when c...zhangjing0303
2024-10-08[libcpu][risc-v]add README for RV64zhangjing0303
2024-09-23删除多余空格heyuanjie87
2024-09-23[libcpu]rv添加c908 cpuheyuanjie87
2024-09-18[libcpu]优化rv构建脚本中选择vendor目录的判断条件heyuanjie87
2024-09-13feat: remove redundant codes under virt64, c906Shell
2024-09-11feat: libcpu/risc-v: unify low-level bringupsShell
2024-09-11feat: libcpu/risc-v: unify interrupt & IO on rv64Shell
2024-09-11feat: libcpu/risc-v: unify mmu related worksShell
2024-09-11feat: libcpu/risc-v: unify context on c906, virt64Shell
2024-09-01feat: kernel/libcpu: fit into ilp32dShell
2024-08-27rename c906 FPU macro (#9290)flyingcys
2024-08-01[bsp][ch32] add eth driverYaochenger
2024-07-18adapt to rv64ilp32 toolchainMuChenger
2024-07-17Merge branch 'master' into shell/rv64-tickShell
2024-07-15Bugfix/fix weak handle trap in riscv common crash rv64 trap handling (#9189)Fan Yang
2024-07-15[libcpu/rv64] feat: unify tick.cShell
2024-07-11feat: support ARCH_REMAP_KERNEL on libcpu/c906 (#9123)Shell
2024-06-26[libcpu/c906]与virt同步 (#9095)heyuanjie87
2024-06-24[rv]修正signal退出后用户态sp少8的问题 (#9080)heyuanjie87
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