| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2020-02-11 | [libcpu]context-m33:fix label error in context_gcc.S. | nongxiaoming | |
| 2020-01-16 | [bsp][synopsys] add basic new embarc bsp support | Watson Zeng | |
| * the initial support of synopsys designware ARC processor using embARC_BSP, all synopsys ARC-based boards are supported: -ARC Software Development Platform -ARC EM Starter Kit -ARC EM Software Development Platform -ARC HS Development Kit -ARC IoT Development Kit * The embARC BSP is a new generation embARC software development package. It is designed to be the inter-layer between hardware and operating system. BSP could hide the difference of hardware/boards, provide a unified interface to upper-layer. * the initial support of synopsys MWDT toolchain. The DesignWare® ARC® MetaWare Development Toolkit builds upon a 25-year legacy of industry-leading compiler and debugger products. It is a complete solution that contains all the components needed to support the development, debugging and tuning of embedded applications for the DesignWare ARC processors. * for detailed board information, pls go embarc.org. Signed-off-by: Watson Zeng <[email protected]> | |||
| 2020-01-15 | Add comment information | bigmagic | |
| 2020-01-15 | add raspi3-32 in bsp | bigmagic | |
| 2020-01-10 | add raspi2 and raspi3 BSP | bigmagic | |
| 2019-12-11 | [libcpu] mips: Merge loongson_1 into gs232 | Jiaxun Yang | |
| Previously Loongson 1B and Loongson 1C have their own libcpu implemention, but they're almost identical. So we merge them into gs232 and adapt to new common code. Signed-off-by: Jiaxun Yang <[email protected]> | |||
| 2019-12-11 | [libcpu] Refine MIPS common code | Jiaxun Yang | |
| MIPS common code was highly duplicated, This commit is a attempt to clean-up and refine these code. The context and exception handle flow is mostly identical with Linux, but a notable difference is that when FPU enabled, we save FP registers in stackframe unconditionally. Signed-off-by: Jiaxun Yang <[email protected]> | |||
| 2019-12-11 | [BSP] move libcpu/mips/x1000 to bsp/x1000/cpu | Bernard Xiong | |
| 2019-12-09 | convert intentation tabs to spaces | Xiao Lifan | |
| 2019-12-05 | [libcpu][c28x]add support for c28x mcu hardware fpu | Xiao Lifan | |
| 2019-11-05 | 修改了上下文切换退出时的bug,该bug会导致中断被提前打� ↵ | ZhangTao | |
| ��造成死锁 | |||
| 2019-10-29 | [libcpu][cm33] support cortex-m33 | tangyuxin | |
| 2019-10-23 | [libcpu][M7]修复cache编译警告 | ZYH | |
| Signed-off-by: ZYH <[email protected]> | |||
| 2019-10-22 | fixed linker script and stack align issues. | aozima | |
| 2019-09-27 | 开放spinlock相关函数 | shaojinchun | |
| 2019-09-19 | [libcpu][arm] 修复因提前返回,导致sp指针不对称问题 | tangyuxin | |
| 2019-09-07 | Fix Cortex-M0 Cannot Execute Reboot | xiaofan | |
| Signed-off-by: xiaofan <[email protected]> | |||
| 2019-08-24 | [bsp][tms320f28379d] Fix an issue that interrupts are disabled in the thread | xuzhuoyi | |
| 2019-08-21 | 参照龙芯1c手册更正看门狗寄存器宏定义 | liufeilong | |
| 2019-07-24 | first version | tyustli | |
| 2019-07-19 | libcpu: MIPS: 更新版权信息/Update copyright information. | Zhou Yanjie | |
| 更新版权信息。 Update copyright information. Signed-off-by: Zhou Yanjie <[email protected]> | |||
| 2019-07-19 | libcpu: MIPS: 清理代码/Clean up code. | Zhou Yanjie | |
| 清理内容重复的头文件。 Clean up duplicate header files. Signed-off-by: Zhou Yanjie <[email protected]> | |||
| 2019-07-05 | Merge pull request #2827 from yangjie11/ac6 | Bernard Xiong | |
| [libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7 | |||
| 2019-07-03 | [libcpu][c28x]Add __rt_ffs support | 明德无敌赵晓薇 | |
| Use a native instruction "Count Sign Bits" to support fast ffs function, then add __rt_ffs support in C28x. | |||
| 2019-07-03 | [libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7 | yangjie | |
| 2019-06-19 | Merge pull request #2796 from lymzzyh/cache | Bernard Xiong | |
| 修复cortex-a 中cache操作没有 dsb isb | |||
| 2019-06-19 | fix cortex-a cahce | ZYH | |
| 2019-06-18 | [libcpu][C28x] Fix bugs of old c28x interrupt api which can not save and ↵ | 明德无敌赵晓薇 | |
| restore int status In C28x DSP, interrupt status are stored in ST1 register. Both INTM and DBGM is used for masking interrupt, while the latter one is used in real-time debug mode. The origin function rudely enable and disable the interrupt without considering the recent interrupt status, which not only may cause problem in some situation but also is not in conformity with rt-thread design specifications. The new api will fix this bug. | |||
| 2019-05-29 | Merge pull request #2731 from jesven/a9-fpu | Bernard Xiong | |
| add cortex-a fpu support | |||
| 2019-05-29 | add cortex-a fpu support | shaojinchun | |
| 2019-05-28 | 对CM3,CM4,CM7 自动开启RT_USING_CPU_FFS | HubretXie | |
| 2019-05-13 | [bsp][at91sam9g45]Fix build bugs which caused by the change of ↵ | neal | |
| libcpu/arm/arm926/start_gcc.S | |||
| 2019-05-12 | [BSP][qemu-vexpress-a9] code cleaup for compiling warning. | Bernard Xiong | |
| 2019-05-11 | fix signals for k210 | shaojinchun | |
| 2019-05-11 | fix signal code | shaojinchun | |
| 2019-05-09 | [libcpu][arm/cortex-a] Add correct comments. | Bernard Xiong | |
| 2019-04-27 | [libcpu/cortex-m7]add cache driver | misonyo | |
| 2019-04-27 | 修改lwp支持中arm cortex-a的swi入口函数处理 | shaojinchun | |
| 2019-04-26 | Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs. | qz721 | |
| This filename conflicts with the 'mbedtls' package. They are renamed in the name of the corresponding chips and included in 'board.h'. Files that rely on this file should include 'board.h' instead. | |||
| 2019-04-14 | Merge pull request #2573 from xuzhuoyi/tms320f28379d | Bernard Xiong | |
| [bsp][tms320f28379d] Improve finsh support and update README.md | |||
| 2019-04-14 | [bsp][tms320f28379d] Fix FPU config problem | xuzhuoyi | |
| 2019-04-10 | [bsp][tms320f28379d] Add finsh init in rt_init_thread | xuzhuoyi | |
| 2019-04-07 | Merge pull request #2527 from xuzhuoyi/gd32e230 | Bernard Xiong | |
| [bsp] Add GD32E230K-START support | |||
| 2019-04-01 | Merge pull request #2530 from qz721/libcpu_cortex_a | Bernard Xiong | |
| Disable the data alignment check. | |||
| 2019-04-01 | Disable the data alignment check. | qz721 | |
| 2019-03-31 | [bsp][gd32e230k-start] Update Kconfig | xuzhuoyi | |
| 2019-03-31 | [bsp][gd32e230k-start] Update Sconscript | xuzhuoyi | |
| 2019-03-31 | [bsp][gd32e230k-start] Add GD32E230K-START BSP port | xuzhuoyi | |
| 2019-03-30 | Merge pull request #2523 from qz721/libcpu_cortex_a | Bernard Xiong | |
| Add standard rt-thread cache interfaces for arm/cortex-a. | |||
| 2019-03-29 | Add standard rt-thread cache interfaces for arm/cortex-a. | qz721 | |
| Add cache invalidate and clean interfaces. Adjust the default cache type of memory to 'WriteBach with WriteAllocate'. | |||
