blob: 36e4e2999e34128ed87cafbf64ae39970235538a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
|
/*
* Allwinner SoCs display driver.
*
* Copyright (C) 2016 Allwinner.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include "include.h"
#include "disp_features.h"
#include <sunxi_hal_common.h>
s32 bsp_disp_feat_get_num_screens(void)
{
return de_feat_get_num_screens();
}
s32 bsp_disp_feat_get_num_devices(void)
{
return de_feat_get_num_devices();
}
s32 bsp_disp_feat_get_num_channels(u32 disp)
{
return de_feat_get_num_chns(disp);
}
s32 bsp_disp_feat_get_num_layers(u32 disp)
{
return de_feat_get_num_layers(disp);
}
s32 bsp_disp_feat_get_num_layers_by_chn(u32 disp, u32 chn)
{
return de_feat_get_num_layers_by_chn(disp, chn);
}
/**
* Query whether specified timing controller support the output_type spcified
* @disp: the index of timing controller
* @output_type: the display output type
* On support, returns 1. Otherwise, returns 0.
*/
s32 bsp_disp_feat_is_supported_output_types(u32 disp,
u32 output_type)
{
return de_feat_is_supported_output_types(disp, output_type);
}
s32 bsp_disp_feat_is_support_smbl(u32 disp)
{
return de_feat_is_support_smbl(disp);
}
s32 bsp_disp_feat_is_support_capture(u32 disp)
{
return de_feat_is_support_wb(disp);
}
s32 bsp_disp_feat_is_support_enhance(u32 disp)
{
return de_feat_is_support_vep(disp);
}
s32 disp_init_feat(void)
{
return de_feat_init();
}
s32 disp_exit_feat(void)
{
return de_feat_exit();
}
u32 bsp_disp_feat_get_num_vdpo(void)
{
return de_feat_get_number_of_vdpo();
}
|