summaryrefslogtreecommitdiff
path: root/bsp/allwinner/libraries/sunxi-hal/hal/source/uart/platform/uart-sun8iw18.h
blob: e3ea78478b44b2e52be294e9b2eca371d89a8cc7 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
/*
* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
*
* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
* the the People's Republic of China and other countries.
* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
*
* DISCLAIMER
* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
* IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY.
*
*
* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/

#ifndef __UART_SUN8IW18_H__
#define __UART_SUN8IW18_H__

#define SUNXI_CLK_UART0 HAL_CLK_PERIPH_UART0
#define SUNXI_RST_UART0 0

#define SUNXI_CLK_UART1 HAL_CLK_PERIPH_UART1
#define SUNXI_RST_UART1 0

#define SUNXI_CLK_UART2 HAL_CLK_PERIPH_UART2
#define SUNXI_RST_UART2 0

#define SUNXI_CLK_UART3 HAL_CLK_PERIPH_UART3
#define SUNXI_RST_UART3 0


#define SUNXI_IRQ_UART0                (108)  /* 108 uart0 interrupt */
#define SUNXI_IRQ_UART1                (109)  /* 109 uart1 interrupt */
#define SUNXI_IRQ_UART2                (110)  /* 110 uart2 interrupt */
#define SUNXI_IRQ_UART3                (111)  /* 111 uart3 interrupt */
/* base register infomation */
#define SUNXI_UART0_BASE                           (0x05000000)
#define SUNXI_UART1_BASE                           (0x05000400)
#define SUNXI_UART2_BASE                           (0x05000800)
#define SUNXI_UART3_BASE                           (0x05000c00)

#define UART_FIFO_SIZE                            (256)
#define UART0_GPIO_FUNCTION                        (3)
#define UART1_GPIO_FUNCTION                        (2)
#define UART2_GPIO_FUNCTION                        (2)
#define UART3_GPIO_FUNCTION                        (2)

#define UART0_TX    GPIOH(0)
#define UART0_RX    GPIOH(1)

#define UART1_TX    GPIOG(6)
#define UART1_RX    GPIOG(7)

#define UART1_RTX   GPIOG(8)
#define UART1_CTX   GPIOG(9)

#define UART2_TX    GPIOB(0)
#define UART2_RX    GPIOB(1)

#define UART3_TX    GPIOH(4)
#define UART3_RX    GPIOH(5)


#endif /*__UART_SUN8IW19_H__  */