blob: 1bada261c50cb43c2a796de4187a2375493dc12e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
|
/*!
* @file apm32f4xx_hash.c
*
* @brief This file provides all the HASH firmware functions
*
* @version V1.0.2
*
* @date 2022-06-23
*
* @attention
*
* Copyright (C) 2021-2022 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
* and limitations under the License.
*/
#include "apm32f4xx_hash.h"
#include "apm32f4xx_rcm.h"
/** @addtogroup APM32F4xx_StdPeriphDriver
@{
*/
/** @defgroup HASH_Driver
* @brief HASH driver modules
@{
*/
/** @defgroup HASH_Functions
@{
*/
/*!
* @brief Reset the HASH peripheral register.
*
* @param None
*
* @retval None
*/
void HASH_Reset(void)
{
RCM_EnableAHB2PeriphReset(RCM_AHB2_PERIPH_HASH);
RCM_DisableAHB2PeriphReset(RCM_AHB2_PERIPH_HASH);
}
/*!
* @brief Config the HASH peripheral according to the specified parameters in the hashConfig.
*
* @param hashConfig: pointer to a HASH_Config_T structure.
*
* @retval None
*/
void HASH_Config(HASH_Config_T *hashConfig)
{
/* Configure the Algorithm used, algorithm mode and the datatype */
HASH->CTRL_B.ALGSEL = RESET;
HASH->CTRL_B.DTYPE = RESET;
HASH->CTRL_B.MODESEL = RESET;
HASH->CTRL_B.ALGSEL = hashConfig->algoSelect;
HASH->CTRL_B.DTYPE = hashConfig->dataType;
HASH->CTRL_B.MODESEL = hashConfig->algoMode;
/* if algorithm mode is HMAC, set the Key */
if (hashConfig->algoMode == HASH_ALGO_MODE_HMAC)
{
HASH->CTRL_B.LKEYSEL = RESET;
HASH->CTRL_B.LKEYSEL = hashConfig->hmacKeyType;
}
/* Reset the HASH processor core, so that the HASH will be ready to compute
the message digest of a new message */
HASH->CTRL_B.INITCAL = SET;
}
/*!
* @brief Fills each HASH_Config_T member with its default value.
*
* @param hashConfig: pointer to an HASH_Config_T structure.
*
* @retval None
*/
void HASH_ConfigStructInit(HASH_Config_T *hashConfig)
{
hashConfig->algoSelect = HASH_ALGO_SELECTION_SHA1;
hashConfig->algoMode = HASH_ALGO_MODE_HASH;
hashConfig->dataType = HASH_DATA_TYPE_32B;
hashConfig->hmacKeyType = HASH_HMAC_KEY_TYPE_SHORTKEY;
}
/*!
* @brief Resets the HASH processor core.
*
* @param None
*
* @retval None
*/
void HASH_ResetProceCore(void)
{
HASH->CTRL_B.INITCAL = SET;
}
/*!
* @brief Configure the Number of valid bits in last word of the message.
*
* @param ValidNumber: Number of valid bits in last word of the message.
*
* @retval None
*/
void HASH_ConfigLastWordValidBitsNbr(uint16_t validNumber)
{
HASH->START_B.LWNUM = RESET;
HASH->START_B.LWNUM = validNumber;
}
/*!
* @brief Writes data in the Input Data FIFO.
*
* @param data: new data of the message to be processed.
*
* @retval None
*/
void HASH_WritesInputData(uint32_t data)
{
HASH->INDATA_B.INDATA = data;
}
/*!
* @brief Read the number of words already pushed into the IN FIFO.
*
* @param None
*
* @retval None
*/
uint8_t HASH_ReadInFIFOWordsNbr(void)
{
return (HASH->CTRL_B.WNUM);
}
/*!
* @brief Read the provides message digest.
*
* @param messageDigest: pointer to a HASH_Config_T structure.
*
* @retval None
*/
void HASH_ReadDigest(HASH_MessageDigest_T *messageDigest)
{
/* Read the data field */
messageDigest->Data[0] = HASH->DIG[0];
messageDigest->Data[1] = HASH->DIG[1];
messageDigest->Data[2] = HASH->DIG[2];
messageDigest->Data[3] = HASH->DIG[3];
messageDigest->Data[4] = HASH->DIG[4];
}
/*!
* @brief Start the Digest calculation.
*
* @param None
*
* @retval None
*/
void HASH_StartDigest(void)
{
HASH->START_B.DIGCAL = SET;
}
/*!
* @brief Read the Hash peripheral Context.
*
* @param contextRead: pointer to a HASH_Context_T structure that contains
* the repository for current context.
*
* @retval None
*/
void HASH_ReadContext(HASH_Context_T *contextRead)
{
uint8_t i = 0;
contextRead->HASH_INT = HASH->INT;
contextRead->HASH_START = HASH->START;
contextRead->HASH_CTRL = HASH->CTRL;
for (i = 0; i <= 50; i++)
{
contextRead->HASH_CTSWAP[i] = HASH->CTSWAP[i];
}
}
/*!
* @brief Write the Hash peripheral Context.
*
* @param contextWrite: pointer to a HASH_Context_T structure that contains
* the repository for current context.
*
* @retval None
*/
void HASH_WriteContext(HASH_Context_T *contextWrite)
{
uint8_t i = 0;
HASH->INT = contextWrite->HASH_INT;
HASH->START = contextWrite->HASH_START;
HASH->CTRL = contextWrite->HASH_CTRL;
HASH->CTRL_B.INITCAL = SET;
for (i = 0; i <= 50; i++)
{
HASH->CTSWAP[i] = contextWrite->HASH_CTSWAP[i];
}
}
/*!
* @brief Enables the HASH DMA interface.
*
* @param None
*
* @retval None
*/
void HASH_EnableDMA(void)
{
HASH->CTRL_B.DMAEN = SET;
}
/*!
* @brief Disabled the HASH DMA interface.
*
* @param None
*
* @retval None
*/
void HASH_DisableDMA(void)
{
HASH->CTRL_B.DMAEN = RESET;
}
/*!
* @brief Enables the specified HASH interrupts.
*
* @param interrupt: Select the ADC interrupt sources
* This parameter can be any combination of the following values:
* @arg HASH_INT_INDATAINT: Input Data interrupt mask
* @arg HASH_INT_DCALCINT: Digest calculation completion Data interrupt mask
*
* @retval None
*/
void HASH_EnableInterrupt(uint32_t interrupt)
{
HASH->INT |= interrupt;
}
/*!
* @brief Disables the specified HASH interrupts.
*
* @param interrupt: Select the ADC interrupt sources
* This parameter can be any combination of the following values:
* @arg HASH_INT_INDATAINT: Input Data interrupt mask
* @arg HASH_INT_DCALCINT: Digest calculation completion Data interrupt mask
*
* @retval None
*/
void HASH_DisableInterrupt(uint32_t interrupt)
{
HASH->INT &= (uint32_t)~interrupt;
}
/*!
* @brief Reads the pending HASH flag
*
* @param flag: Select the flag to check
* This parameter can be one of the following values:
* @arg HASH_FLAG_INDATAINT: Data input interrupt status flag
* @arg HASH_FLAG_DCALCINT: Digest calculation completion interrupt status flag
* @arg HASH_FLAG_DMA: DMAS Status flag
* @arg HASH_FLAG_BUSY: Busy flag
* @arg HASH_FLAG_DINNEMPT: Data Input register (DIN) not empty status flag
*
* @retval SET or RESET
*/
uint8_t HASH_ReadFlagStatus(HASH_FLAG_T flag)
{
uint32_t reg = 0;
if (flag == HASH_FLAG_DINNEMPT)
{
reg = HASH->CTRL;
}
else
{
reg = HASH->STS;
}
return (reg & flag) ? SET : RESET;
}
/*!
* @brief Clears the pending HASH flag
*
* @param flag: Select the flag to check
* This parameter can be one of the following values:
* @arg HASH_FLAG_INDATAINT: Data input interrupt status flag
* @arg HASH_FLAG_DCALCINT: Digest calculation completion interrupt status flag
*
* @retval None
*/
void HASH_ClearStatusFlag(HASH_FLAG_T flag)
{
if (flag == HASH_FLAG_INDATAINT)
{
HASH->STS_B.INDATAINT = BIT_RESET;
}
else if (flag == HASH_FLAG_DCALCINT)
{
HASH->STS_B.DCALCINT = BIT_RESET;
}
}
/*!
* @brief Reads the specified HASH Interrupt flag.
*
* @param flag: Select the ADC interrupt source.
* This parameter can be one of the following values:
* @arg HASH_INT_FLAG_INDATA: Input Data interrupt
* @arg HASH_INT_FLAG_DCALC: Digest Calculation Completion Interrupt
*
* @retval SET or RESET
*/
uint8_t HASH_ReadIntFlag(HASH_INT_FLAG_T flag)
{
uint32_t intStatus = 0, reg = 0;
intStatus = HASH->INT;
reg = HASH->STS;
return (intStatus & (reg & flag)) ? SET : RESET;
}
/*!
* @brief Clears the pending HASH flag
*
* @param flag: Select the flag to check
* This parameter can be one of the following values:
* @arg HASH_INT_FLAG_INDATA: Input Data interrupt
* @arg HASH_INT_FLAG_DCALC: Digest Calculation Completion Interrupt
*
* @retval None
*/
void HASH_ClearIntFlag(HASH_INT_FLAG_T flag)
{
if (flag == HASH_INT_FLAG_INDATA)
{
HASH->STS_B.INDATAINT = BIT_RESET;
}
else if (flag == HASH_INT_FLAG_DCALC)
{
HASH->STS_B.DCALCINT = BIT_RESET;
}
}
/*!
* @brief Waits for Compute data
*
* @param timeOut: Waits for Compute time
*
* @retval 0: No block is currently being compute
* 1: The hash core is compute a block of data
*
*/
uint8_t HASH_WaitForCompute(uint32_t timeOut)
{
__IO uint8_t flag = SET;
uint32_t time = timeOut;
while ((flag == SET) && (time > 0))
{
flag = HASH_ReadFlagStatus(HASH_FLAG_BUSY);
time --;
}
if ((flag == RESET) && (time > 0))
{
return 0;
}
return 1;
}
/**@} end of group HASH_Functions */
/**@} end of group HASH_Driver */
/**@} end of group APM32F4xx_StdPeriphDriver */
|