1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
|
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-04-12 shelton first version
*/
#ifndef __SPI_CONFIG_H__
#define __SPI_CONFIG_H__
#include <rtthread.h>
#include "dma_config.h"
#ifdef __cplusplus
extern "C" {
#endif
#define SPI1_IRQHandler SPI1_IRQHandler
#define SPI2_IRQHandler SPI2_IRQHandler
#define SPI3_IRQHandler SPI3_IRQHandler
#ifdef BSP_USING_SPI1
#define SPI1_CONFIG \
{ \
.spi_x = SPI1, \
.spi_name = "spi1", \
.irqn = SPI1_IRQn, \
}
#endif /* BSP_USING_SPI1 */
#ifdef BSP_SPI1_RX_USING_DMA
#define SPI1_RX_DMA_CONFIG \
{ \
.dma_channel = SPI1_RX_DMA_CHANNEL, \
.dma_clock = SPI1_RX_DMA_CLOCK, \
.dma_irqn = SPI1_RX_DMA_IRQ, \
.dmamux_channel = SPI1_RX_DMA_MUX_CHANNEL, \
.request_id = SPI1_RX_DMA_REQ_ID, \
}
#endif /* BSP_SPI1_RX_USING_DMA */
#ifdef BSP_SPI1_TX_USING_DMA
#define SPI1_TX_DMA_CONFIG \
{ \
.dma_channel = SPI1_TX_DMA_CHANNEL, \
.dma_clock = SPI1_TX_DMA_CLOCK, \
.dma_irqn = SPI1_TX_DMA_IRQ, \
.dmamux_channel = SPI1_TX_DMA_MUX_CHANNEL, \
.request_id = SPI1_TX_DMA_REQ_ID, \
}
#endif /* BSP_SPI1_TX_USING_DMA */
#ifdef BSP_USING_SPI2
#define SPI2_CONFIG \
{ \
.spi_x = SPI2, \
.spi_name = "spi2", \
.irqn = SPI2_IRQn, \
}
#endif /* BSP_USING_SPI2 */
#ifdef BSP_SPI2_RX_USING_DMA
#define SPI2_RX_DMA_CONFIG \
{ \
.dma_channel = SPI2_RX_DMA_CHANNEL, \
.dma_clock = SPI2_RX_DMA_CLOCK, \
.dma_irqn = SPI2_RX_DMA_IRQ, \
.dmamux_channel = SPI2_RX_DMA_MUX_CHANNEL, \
.request_id = SPI2_RX_DMA_REQ_ID, \
}
#endif /* BSP_SPI2_RX_USING_DMA */
#ifdef BSP_SPI2_TX_USING_DMA
#define SPI2_TX_DMA_CONFIG \
{ \
.dma_channel = SPI2_TX_DMA_CHANNEL, \
.dma_clock = SPI2_TX_DMA_CLOCK, \
.dma_irqn = SPI2_TX_DMA_IRQ, \
.dmamux_channel = SPI2_TX_DMA_MUX_CHANNEL, \
.request_id = SPI2_TX_DMA_REQ_ID, \
}
#endif /* BSP_SPI2_TX_USING_DMA */
#ifdef BSP_USING_SPI3
#define SPI3_CONFIG \
{ \
.spi_x = SPI3, \
.spi_name = "spi3", \
.irqn = SPI3_IRQn, \
}
#endif /* BSP_USING_SPI3 */
#ifdef BSP_SPI3_RX_USING_DMA
#define SPI3_RX_DMA_CONFIG \
{ \
.dma_channel = SPI3_RX_DMA_CHANNEL, \
.dma_clock = SPI3_RX_DMA_CLOCK, \
.dma_irqn = SPI3_RX_DMA_IRQ, \
.dmamux_channel = SPI3_RX_DMA_MUX_CHANNEL, \
.request_id = SPI3_RX_DMA_REQ_ID, \
}
#endif /* BSP_SPI3_RX_USING_DMA */
#ifdef BSP_SPI3_TX_USING_DMA
#define SPI3_TX_DMA_CONFIG \
{ \
.dma_channel = SPI3_TX_DMA_CHANNEL, \
.dma_clock = SPI3_TX_DMA_CLOCK, \
.dma_irqn = SPI3_TX_DMA_IRQ, \
.dmamux_channel = SPI3_TX_DMA_MUX_CHANNEL, \
.request_id = SPI3_TX_DMA_REQ_ID, \
}
#endif /* BSP_SPI3_TX_USING_DMA */
#ifdef __cplusplus
}
#endif
#endif /*__SPI_CONFIG_H__ */
|
