1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
|
/**
*********************************************************************************
*
* @file ald_pis.c
* @brief PIS module driver.
*
* @version V1.0
* @date 27 Nov 2017
* @author AE Team
* @note
*
* Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*********************************************************************************
*/
#include "ald_pis.h"
/** @addtogroup ES32FXXX_ALD
* @{
*/
/** @defgroup PIS PIS
* @brief PIS module driver
* @{
*/
#ifdef ALD_PIS
/** @defgroup PIS_Public_Functions PIS Public Functions
* @{
*/
/** @defgroup PIS_Public_Functions_Group1 Initialization functions
* @brief Initialization and Configuration functions
* @{
*/
/**
* @brief Create the PIS mode according to the specified parameters in
* the pis_handle_t and create the associated handle.
* @param hperh: Pointer to a pis_handle_t structure that contains
* the configuration information for the specified PIS module.
* @retval Status, see @ref ald_status_t.
*/
ald_status_t ald_pis_create(pis_handle_t *hperh)
{
uint8_t clock_menu = 0;
if (hperh == NULL)
return ERROR;
assert_param(IS_PIS_SRC(hperh->init.producer_src));
assert_param(IS_PIS_TRIG(hperh->init.consumer_trig));
assert_param(IS_PIS_CLOCK(hperh->init.producer_clk));
assert_param(IS_PIS_CLOCK(hperh->init.consumer_clk));
assert_param(IS_PIS_EDGE(hperh->init.producer_edge));
__LOCK(hperh);
hperh->perh = PIS;
/* get location of consumer in channel and position of con0/con1
* accord to comsumer_trig information */
hperh->consumer_ch = (pis_ch_t)(hperh->init.consumer_trig & 0x0F);
hperh->consumer_con = (pis_con_t)(((uint32_t)hperh->init.consumer_trig >> 4) & 0x0F);
hperh->consumer_pos = (1U << (uint32_t)(((uint32_t)hperh->init.consumer_trig >> 8) & 0xFF));
/* union producer clock and consumer clock */
clock_menu = (hperh->init.producer_clk << 4) | (hperh->init.consumer_clk);
if (hperh->perh->CH_CON[hperh->consumer_ch] != 0) {
__UNLOCK(hperh);
return BUSY;
}
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SRCS_MSK, ((hperh->init.producer_src) >> 4) << PIS_CH0_CON_SRCS_POSS);
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_MSIGS_MSK, ((hperh->init.producer_src) & 0xf) << PIS_CH0_CON_MSIGS_POSS);
/* configure sync clock, judging by producer clock with consumer clock */
switch (clock_menu) {
case 0x00:
case 0x11:
case 0x22:
case 0x33:
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 0 << PIS_CH0_CON_SYNCSEL_POSS);
break;
case 0x01:
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 5 << PIS_CH0_CON_SYNCSEL_POSS);
break;
case 0x02:
case 0x12:
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 6 << PIS_CH0_CON_SYNCSEL_POSS);
break;
case 0x21:
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 4 << PIS_CH0_CON_SYNCSEL_POSS);
break;
case 0x30:
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 1 << PIS_CH0_CON_SYNCSEL_POSS);
break;
case 0x31:
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 2 << PIS_CH0_CON_SYNCSEL_POSS);
break;
case 0x32:
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_SYNCSEL_MSK, 3 << PIS_CH0_CON_SYNCSEL_POSS);
break;
default:
break;
}
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_PULCK_MSK, hperh->init.consumer_clk << PIS_CH0_CON_PULCK_POSS);
MODIFY_REG(hperh->perh->CH_CON[hperh->consumer_ch], PIS_CH0_CON_EDGS_MSK, hperh->init.producer_edge << PIS_CH0_CON_EDGS_POSS);
hperh->check_info = hperh->perh->CH_CON[hperh->consumer_ch];
/* enable consumer bit, switch pin of consumer */
switch (hperh->consumer_con) {
case PIS_CON_0:
PIS->TAR_CON0 |= hperh->consumer_pos;
break;
case PIS_CON_1:
PIS->TAR_CON1 |= hperh->consumer_pos;
break;
default:
break;
}
__UNLOCK(hperh);
return OK;
}
/**
* @brief Destroy the PIS mode according to the specified parameters in
* the pis_init_t and create the associated handle.
* @param hperh: Pointer to a pis_handle_t structure that contains
* the configuration information for the specified PIS module.
* @retval Status, see @ref ald_status_t.
*/
ald_status_t ald_pis_destroy(pis_handle_t *hperh)
{
assert_param(IS_PIS(hperh->perh));
if (hperh->check_info != hperh->perh->CH_CON[hperh->consumer_ch])
return ERROR;
__LOCK(hperh);
CLEAR_BIT(PIS->CH_OER, (1U << (uint32_t)hperh->consumer_ch));
WRITE_REG(hperh->perh->CH_CON[hperh->consumer_ch], 0x0);
switch (hperh->consumer_con) {
case PIS_CON_0:
PIS->TAR_CON0 &= ~(hperh->consumer_pos);
break;
case PIS_CON_1:
PIS->TAR_CON1 &= ~(hperh->consumer_pos);
break;
default:
break;
}
hperh->state = PIS_STATE_RESET;
__UNLOCK(hperh);
return OK;
}
/**
* @}
*/
/** @defgroup PIS_Public_Functions_Group2 Operation functions
* @brief PIS output enable or disable functions
* @{
*/
/**
* @brief Start the PIS output function.
* @param hperh: Pointer to a pis_handle_t structure that contains
* the configuration information for the specified PIS module.
* @param ch: The PIS channel enable output
* This parameter can be one of the following values:
* @arg PIS_OUT_CH_0
* @arg PIS_OUT_CH_1
* @arg PIS_OUT_CH_2
* @arg PIS_OUT_CH_3
* @retval Status, see @ref ald_status_t.
*/
ald_status_t ald_pis_output_start(pis_handle_t *hperh, pis_out_ch_t ch)
{
assert_param(IS_PIS(hperh->perh));
assert_param(IS_PIS_OUPUT_CH(ch));
__LOCK(hperh);
SET_BIT(PIS->CH_OER, (1 << ch));
__UNLOCK(hperh);
return OK;
}
/**
* @brief Stop the PIS output function.
* @param hperh: Pointer to a pis_handle_t structure that contains
* the configuration information for the specified PIS module.
* @param ch: The PIS channel disable output
* This parameter can be one of the following values:
* @arg PIS_OUT_CH_0
* @arg PIS_OUT_CH_1
* @arg PIS_OUT_CH_2
* @arg PIS_OUT_CH_3
* @retval Status, see @ref ald_status_t.
*/
ald_status_t ald_pis_output_stop(pis_handle_t *hperh, pis_out_ch_t ch)
{
assert_param(IS_PIS(hperh->perh));
assert_param(IS_PIS_OUPUT_CH(ch));
__LOCK(hperh);
CLEAR_BIT(PIS->CH_OER, (1 << ch));
__UNLOCK(hperh);
return OK;
}
/**
* @}
*/
/** @defgroup PIS_Public_Functions_Group3 Peripheral State and Errors functions
* @brief PIS State and Errors functions
* @{
*/
/**
* @brief Returns the PIS state.
* @param hperh: Pointer to a pis_handle_t structure that contains
* the configuration information for the specified PIS module.
* @retval ALD state
*/
pis_state_t ald_pis_get_state(pis_handle_t *hperh)
{
assert_param(IS_PIS(hperh->perh));
return hperh->state;
}
/**
* @}
*/
/** @defgroup PIS_Public_Functions_Group4 modulate output functions
* @brief PIS modulate output signal functions
* @{
*/
/**
* @brief Config the PIS modulate signal function
* @param hperh: Pointer to a pis_handle_t structure that contains
* the configuration information for the specified PIS module.
* @param config: Pointer to a pis_modulate_config_t structure that
* contains the selected target (UART0,UART1,UART2,UART3 or
* LPUART0) how to modulate the target output signal.
* @retval Status, see @ref ald_status_t.
*/
ald_status_t ald_pis_modu_config(pis_handle_t *hperh, pis_modulate_config_t *config)
{
assert_param(IS_PIS(hperh->perh));
assert_param(IS_PIS_MODU_TARGET(config->target));
assert_param(IS_PIS_MODU_LEVEL(config->level));
assert_param(IS_PIS_MODU_SRC(config->src));
assert_param(IS_PIS_MODU_CHANNEL(config->channel));
__LOCK(hperh);
switch (config->target) {
case PIS_UART0_TX:
MODIFY_REG(hperh->perh->UART0_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS);
MODIFY_REG(hperh->perh->UART0_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS);
MODIFY_REG(hperh->perh->UART0_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS);
break;
case PIS_UART1_TX:
MODIFY_REG(hperh->perh->UART1_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS);
MODIFY_REG(hperh->perh->UART1_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS);
MODIFY_REG(hperh->perh->UART1_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS);
break;
case PIS_UART2_TX:
MODIFY_REG(hperh->perh->UART2_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS);
MODIFY_REG(hperh->perh->UART2_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS);
MODIFY_REG(hperh->perh->UART2_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS);
break;
case PIS_UART3_TX:
MODIFY_REG(hperh->perh->UART3_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS);
MODIFY_REG(hperh->perh->UART3_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS);
MODIFY_REG(hperh->perh->UART3_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS);
break;
case PIS_LPUART0_TX:
MODIFY_REG(hperh->perh->LPUART0_TXMCR, PIS_TXMCR_TXMLVLS_MSK, config->level << PIS_TXMCR_TXMLVLS_POS);
MODIFY_REG(hperh->perh->LPUART0_TXMCR, PIS_TXMCR_TXMSS_MSK, config->src << PIS_TXMCR_TXMSS_POSS);
MODIFY_REG(hperh->perh->LPUART0_TXMCR, PIS_TXMCR_TXSIGS_MSK, config->channel << PIS_TXMCR_TXSIGS_POSS);
break;
default:
break;
}
__UNLOCK(hperh);
return OK;
}
/**
* @}
*/
/**
* @}
*/
#endif /* ALD_PIS */
/**
* @}
*/
/**
* @}
*/
|
