1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
|
/*
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* Change Logs:
* Date Author Notes
* 2019-11-01 wangyq update libraries
* 2020-01-14 wangyq the first version
* 2021-04-20 liuhy the second version
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_i2c.h"
#ifdef RT_USING_I2C
#define TIMEOUT 0x0FFF
/* I2C struct definition */
#ifdef BSP_USING_I2C0
static ald_i2c_handle_t _h_i2c0;
#endif
#ifdef BSP_USING_I2C1
static i2c_handle_t _h_i2c1;
#endif
static void _i2c_init(void)
{
ald_gpio_init_t gpio_instruct;
/* Initialize I2C Pin */
gpio_instruct.mode = ALD_GPIO_MODE_OUTPUT;
gpio_instruct.od = ALD_GPIO_OPEN_DRAIN;
gpio_instruct.pupd = ALD_GPIO_PUSH_UP;
gpio_instruct.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
gpio_instruct.flt = ALD_GPIO_FILTER_DISABLE;
gpio_instruct.type = ALD_GPIO_TYPE_CMOS;
#ifdef BSP_USING_I2C0
#if defined(ES_I2C0_SCL_GPIO_FUNC)&&defined(ES_I2C0_SCL_GPIO_PORT)&&defined(ES_I2C0_SCL_GPIO_PIN)
gpio_instruct.func = ES_I2C0_SCL_GPIO_FUNC;
ald_gpio_init(ES_I2C0_SCL_GPIO_PORT, ES_I2C0_SCL_GPIO_PIN, &gpio_instruct);
#endif
#if defined(ES_I2C0_SDA_GPIO_FUNC)&&defined(ES_I2C0_SDA_GPIO_PORT)&&defined(ES_I2C0_SDA_GPIO_PIN)
gpio_instruct.func = ES_I2C0_SDA_GPIO_FUNC;
ald_gpio_init(ES_I2C0_SDA_GPIO_PORT, ES_I2C0_SDA_GPIO_PIN, &gpio_instruct);
#endif
/* Initialize I2C Function */
_h_i2c0.perh = I2C0;
_h_i2c0.init.module = ALD_I2C_MODULE_MASTER;
_h_i2c0.init.clk_speed = ES_I2C0_CLK_SPEED;
_h_i2c0.init.own_addr1 = ES_I2C0_OWN_ADDR1;
_h_i2c0.init.addr_mode = ES_I2C0_ADDR_MODE;
_h_i2c0.init.general_call = ES_I2C0_GENERAL_CALL;
_h_i2c0.init.no_stretch = ES_I2C0_STRETCH;
ald_i2c_reset(&_h_i2c0);
ald_i2c_init(&_h_i2c0);
#endif
#ifdef BSP_USING_I2C1
#if defined(ES_I2C1_SCL_GPIO_FUNC)&&defined(ES_I2C1_SCL_GPIO_PORT)&&defined(ES_I2C1_SCL_GPIO_PIN)
gpio_instruct.func = ES_I2C1_SCL_GPIO_FUNC;
ald_gpio_init(ES_I2C1_SCL_GPIO_PORT, ES_I2C1_SCL_GPIO_PIN, &gpio_instruct);
#endif
#if defined(ES_I2C1_SDA_GPIO_FUNC)&&defined(ES_I2C1_SDA_GPIO_PORT)&&defined(ES_I2C1_SDA_GPIO_PIN)
gpio_instruct.func = ES_I2C1_SDA_GPIO_FUNC;
ald_gpio_init(ES_I2C1_SDA_GPIO_PORT, ES_I2C1_SDA_GPIO_PIN, &gpio_instruct);
#endif
/* Initialize i2c function */
_h_i2c1.perh = I2C1;
_h_i2c1.init.module = I2C_MODULE_MASTER;
_h_i2c1.init.clk_speed = ES_I2C1_CLK_SPEED;
_h_i2c1.init.own_addr1 = ES_I2C1_OWN_ADDR1;
_h_i2c1.init.addr_mode = ES_I2C1_ADDR_MODE;
_h_i2c1.init.general_call = ES_I2C1_GENERAL_CALL;
_h_i2c1.init.no_stretch = ES_I2C1_STRETCH;
ald_i2c_reset(&_h_i2c1);
ald_i2c_init(&_h_i2c1);
#endif
}
#define _I2C_NO_START 0x1
#define _I2C_NO_STOP 0x2
int _i2c_master_req(ald_i2c_handle_t *hperh, uint16_t dev_addr, uint32_t timeout,uint32_t req_write)
{
if (hperh->init.addr_mode == ALD_I2C_ADDR_7BIT) {
CLEAR_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
}
else {
SET_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
}
MODIFY_REG(hperh->perh->CON2, I2C_CON2_SADD_MSK, dev_addr << I2C_CON2_SADD_POSS);
if (req_write)
CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
else
SET_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
return ALD_OK;
}
int _i2c_wait_flag(ald_i2c_handle_t *hperh, uint32_t flag, flag_status_t status, uint32_t timeout)
{
uint32_t tickstart = 0;
tickstart = ald_get_tick();
while (ALD_I2C_GET_FLAG(hperh, flag) == status) {
if ((timeout == 0) || ((ald_get_tick() - tickstart ) > timeout)) {
hperh->error_code |= ALD_I2C_ERROR_TIMEOUT;
return TIMEOUT;
}
}
return ALD_OK;
}
int _i2c_wait_txe(ald_i2c_handle_t *hperh, uint32_t timeout)
{
uint32_t tickstart = ald_get_tick();
while (ALD_I2C_GET_FLAG(hperh, ALD_I2C_STAT_TXE) == RESET) {
if (ALD_I2C_GET_IT_FLAG(hperh, ALD_I2C_IT_ARLO)) {
hperh->error_code |= ALD_I2C_ERROR_ARLO;
return ALD_ERROR;
}
if (ALD_I2C_GET_IT_FLAG(hperh, ALD_I2C_IT_NACK) == SET) {
hperh->error_code |= ALD_I2C_ERROR_AF;
return ALD_ERROR;
}
if ((timeout == 0) || ((ald_get_tick() - tickstart) > timeout)) {
hperh->error_code |= ALD_I2C_ERROR_TIMEOUT;
return ALD_ERROR;
}
}
return ALD_OK;
}
int _i2c_master_send(ald_i2c_handle_t *hperh, uint16_t dev_addr, uint8_t *buf,
uint32_t size, uint32_t timeout,uint32_t flag)
{
if (hperh->state != ALD_I2C_STATE_READY)
return ALD_BUSY;
if ((buf == NULL) || (size == 0))
return ALD_ERROR;
if ((flag&_I2C_NO_START)==0x0) //NOSTART==0
{
if (_i2c_wait_flag(hperh, ALD_I2C_STAT_BUSY, SET, 100) != ALD_OK)
return ALD_BUSY;
_i2c_master_req(hperh, dev_addr, timeout,1);
}
assert_param(IS_I2C_TYPE(hperh->perh));
__LOCK(hperh);
hperh->state = ALD_I2C_STATE_BUSY_TX;
hperh->mode = ALD_I2C_MODE_MASTER;
hperh->error_code = ALD_I2C_ERROR_NONE;
hperh->p_buff = buf;
hperh->xfer_size = size;
hperh->xfer_count = 0;
if ((flag&_I2C_NO_STOP)!=0) //NOSTOP==1
SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
else
CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
if (size <= 0xFF) {
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
}
else {
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
}
if ((flag&_I2C_NO_START)==0x0)
SET_BIT(hperh->perh->CON2, I2C_CON2_START_MSK);
while (size > 0) {
hperh->perh->TXDATA = (*buf++);
size--;
hperh->xfer_count++;
if (_i2c_wait_txe(hperh, timeout) != ALD_OK)
goto ERROR;
if (((hperh->xfer_count % 0xFF) == 0) && (READ_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK))) {
if (_i2c_wait_flag(hperh, ALD_I2C_STAT_TCR, RESET, 10) == ALD_OK) {
if (size > 0xFF) {
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
}
else {
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
if ((flag&_I2C_NO_STOP)==0)
CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
}
}
else {
goto ERROR;
}
}
}
if (READ_BIT(hperh->perh->CON2, I2C_CON2_AUTOEND_MSK) == SET)
goto SUCCESS;
if ((flag&_I2C_NO_STOP)!=0&&_i2c_wait_flag(hperh, ALD_I2C_STAT_TCR, RESET, 10) == ALD_OK)
{
goto SUCCESS;
}
if (_i2c_wait_flag(hperh, ALD_I2C_STAT_TC, RESET, 10) == ALD_OK) {
if ((flag&_I2C_NO_STOP)==0x0)
SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
goto SUCCESS;
}
else {
goto ERROR;
}
ERROR:
SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
hperh->state = ALD_I2C_STATE_READY;
hperh->mode = ALD_I2C_MODE_NONE;
__UNLOCK(hperh);
return ALD_ERROR;
SUCCESS:
hperh->state = ALD_I2C_STATE_READY;
hperh->mode = ALD_I2C_MODE_NONE;
__UNLOCK(hperh);
return ALD_OK;
}
static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
struct rt_i2c_msg msgs[],
rt_uint32_t num)
{
struct rt_i2c_msg *msg;
rt_uint32_t i;
rt_err_t ret = RT_ERROR;
for (i = 0; i < num; i++)
{
msg = &msgs[i];
if (msg->flags & RT_I2C_RD)
{
if (ald_i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
{
LOG_E("i2c bus write failed,i2c bus stop!\n");
goto out;
}
}
else
{
uint32_t f=((msg->flags&RT_I2C_NO_START)?0x1:0)|((msg->flags&RT_I2C_NO_STOP)?0x2:0);
if (_i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT,f) != 0)
{
LOG_E("i2c bus write failed,i2c bus stop!\n");
goto out;
}
}
}
ret = i;
out:
//LOG_E("send stop condition\n");
return ret;
}
const struct rt_i2c_bus_device_ops es32f3_i2c_ops =
{
es32f3_master_xfer,
RT_NULL,
RT_NULL,
};
int rt_hw_i2c_init(void)
{
int result = RT_EOK;
_i2c_init();
#ifdef BSP_USING_I2C0
/* define i2c Instance */
static struct rt_i2c_bus_device _i2c_device0;
rt_memset((void *)&_i2c_device0, 0, sizeof(struct rt_i2c_bus_device));
_i2c_device0.ops = &es32f3_i2c_ops;
_i2c_device0.priv = &_h_i2c0;
result = rt_i2c_bus_device_register(&_i2c_device0, ES_DEVICE_NAME_I2C0);
if (result != RT_EOK)
{
return result;
}
#endif
#ifdef BSP_USING_I2C1
/* define i2c Instance */
static struct rt_i2c_bus_device _i2c_device1;
rt_memset((void *)&_i2c_device1, 0, sizeof(struct rt_i2c_bus_device));
_i2c_device1.ops = &es32f3_i2c_ops;
_i2c_device1.priv = &_h_i2c1;
rt_i2c_bus_device_register(&_i2c_device1, ES_DEVICE_NAME_I2C1);
if (result != RT_EOK)
{
return result;
}
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_i2c_init);
#endif
|
