1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
|
/*!
\file gd32f3x0_cmp.c
\brief CMP driver
\version 2017-06-06, V1.0.0, firmware for GD32F3x0
\version 2019-06-01, V2.0.0, firmware for GD32F3x0
*/
/*
Copyright (c) 2019, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
#include "gd32f3x0_cmp.h"
/*!
\brief deinitialize comparator
\param[in] none
\param[out] none
\retval none
*/
void cmp_deinit(void)
{
CMP_CS = ((uint32_t)0x00000000U);
}
/*!
\brief initialize comparator mode
\param[in] cmp_periph
\arg CMP0: comparator 0
\arg CMP1: comparator 1
\param[in] operating_mode
\arg CMP_HIGHSPEED: high speed mode
\arg CMP_MIDDLESPEED: medium speed mode
\arg CMP_LOWSPEED: low speed mode
\arg CMP_VERYLOWSPEED: very-low speed mode
\param[in] inverting_input
\arg CMP_1_4VREFINT: VREFINT *1/4 input
\arg CMP_1_2VREFINT: VREFINT *1/2 input
\arg CMP_3_4VREFINT: VREFINT *3/4 input
\arg CMP_VREFINT: VREFINT input
\arg CMP_DAC: PA4 (DAC) input
\arg CMP_PA5: PA5 input
\arg CMP_PA_0_2: PA0 or PA2 input
\param[in] hysteresis
\arg CMP_HYSTERESIS_NO: output no hysteresis
\arg CMP_HYSTERESIS_LOW: output low hysteresis
\arg CMP_HYSTERESIS_MIDDLE: output middle hysteresis
\arg CMP_HYSTERESIS_HIGH: output high hysteresis
\param[out] none
\retval none
*/
void cmp_mode_init(uint32_t cmp_periph, operating_mode_enum operating_mode, inverting_input_enum inverting_input, cmp_hysteresis_enum output_hysteresis)
{
if(CMP0 == cmp_periph){
/* initialize comparator 0 mode */
CMP_CS &= ~(uint32_t)(CMP_CS_CMP0M | CMP_CS_CMP0MSEL | CMP_CS_CMP0HST );
CMP_CS |= CS_CMP0M(operating_mode) | CS_CMP0MSEL(inverting_input) | CS_CMP0HST(output_hysteresis);
}else{
/* initialize comparator 1 mode */
CMP_CS &= ~(uint32_t)(CMP_CS_CMP1M | CMP_CS_CMP1MSEL | CMP_CS_CMP1HST );
CMP_CS |= CS_CMP1M(operating_mode) | CS_CMP1MSEL(inverting_input) | CS_CMP1HST(output_hysteresis);
}
}
/*!
\brief initialize comparator output
\param[in] cmp_periph
\arg CMP0: comparator 0
\arg CMP1: comparator 1
\param[in] output_slection
\arg CMP_OUTPUT_NONE: output no selection
\arg CMP_OUTPUT_TIMER0BKIN: TIMER 0 break input
\arg CMP_OUTPUT_TIMER0IC0: TIMER 0 channel0 input capture
\arg CMP_OUTPUT_TIMER0OCPRECLR: TIMER 0 OCPRE_CLR input
\arg CMP_OUTPUT_TIMER1IC3: TIMER 1 channel3 input capture
\arg CMP_OUTPUT_TIMER1OCPRECLR: TIMER 1 OCPRE_CLR input
\arg CMP_OUTPUT_TIMER2IC0: TIMER 2 channel0 input capture
\arg CMP_OUTPUT_TIMER2OCPRECLR: TIMER 2 OCPRE_CLR input
\param[in] output_polarity
\arg CMP_OUTPUT_POLARITY_INVERTED: output is inverted
\arg CMP_OUTPUT_POLARITY_NOINVERTED: output is not inverted
\param[out] none
\retval none
*/
void cmp_output_init(uint32_t cmp_periph, cmp_output_enum output_slection, uint32_t output_polarity)
{
/* initialize comparator 0 output */
if(CMP0 == cmp_periph){
CMP_CS &= ~(uint32_t)CMP_CS_CMP0OSEL;
CMP_CS |= CS_CMP0OSEL(output_slection);
/* output polarity */
if(CMP_OUTPUT_POLARITY_INVERTED == output_polarity){
CMP_CS |= CMP_CS_CMP0PL;
}else{
CMP_CS &= ~CMP_CS_CMP0PL;
}
}else{
/* initialize comparator 1 output */
CMP_CS &= ~(uint32_t)CMP_CS_CMP1OSEL;
CMP_CS |= CS_CMP1OSEL(output_slection);
/* output polarity */
if(CMP_OUTPUT_POLARITY_INVERTED == output_polarity){
CMP_CS |= CMP_CS_CMP1PL;
}else{
CMP_CS &= ~CMP_CS_CMP1PL;
}
}
}
/*!
\brief enable comparator
\param[in] cmp_periph
\arg CMP0: comparator 0
\arg CMP1: comparator 1
\param[out] none
\retval none
*/
void cmp_enable(uint32_t cmp_periph)
{
if(CMP0 == cmp_periph){
CMP_CS |= CMP_CS_CMP0EN;
}else{
CMP_CS |= CMP_CS_CMP1EN;
}
}
/*!
\brief disable comparator
\param[in] cmp_periph
\arg CMP0: comparator 0
\arg CMP1: comparator 1
\param[out] none
\retval none
*/
void cmp_disable(uint32_t cmp_periph)
{
if(CMP0 == cmp_periph){
CMP_CS &= ~CMP_CS_CMP0EN;
}else{
CMP_CS &= ~CMP_CS_CMP1EN;
}
}
/*!
\brief enable comparator switch
\param[in] none
\param[out] none
\retval none
*/
void cmp_switch_enable(void)
{
CMP_CS |= CMP_CS_CMP0SW;
}
/*!
\brief disable comparator switch
\param[in] none
\param[out] none
\retval none
*/
void cmp_switch_disable(void)
{
CMP_CS &= ~CMP_CS_CMP0SW;
}
/*!
\brief enable the window mode
\param[in] none
\param[out] none
\retval none
*/
void cmp_window_enable(void)
{
CMP_CS |= CMP_CS_WNDEN;
}
/*!
\brief disable the window mode
\param[in] none
\param[out] none
\retval none
*/
void cmp_window_disable(void)
{
CMP_CS &= ~CMP_CS_WNDEN;
}
/*!
\brief lock the comparator
\param[in] cmp_periph
\arg CMP0: comparator 0
\arg CMP1: comparator 1
\param[out] none
\retval none
*/
void cmp_lock_enable(uint32_t cmp_periph)
{
if(CMP0 == cmp_periph){
/* lock CMP0 */
CMP_CS |= CMP_CS_CMP0LK;
}else{
/* lock CMP1 */
CMP_CS |= CMP_CS_CMP1LK;
}
}
/*!
\brief get output level
\param[in] cmp_periph
\arg CMP0: comparator 0
\arg CMP1: comparator 1
\param[out] none
\retval the output level
*/
uint32_t cmp_output_level_get(uint32_t cmp_periph)
{
if(CMP0 == cmp_periph){
/* get output level of CMP0 */
if(CMP_CS & CMP_CS_CMP0O){
return CMP_OUTPUTLEVEL_HIGH;
}else{
return CMP_OUTPUTLEVEL_LOW;
}
}else{
/* get output level of CMP1 */
if(CMP_CS & CMP_CS_CMP1O){
return CMP_OUTPUTLEVEL_HIGH;
}else{
return CMP_OUTPUTLEVEL_LOW;
}
}
}
|