blob: 26aa98dbcf68e3580584c1b69d974c70daa091ba (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
|
/*
* Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-04-28 CDT first version
*/
#ifndef __DRV_GPIO_H__
#define __DRV_GPIO_H__
#include <rtdevice.h>
#include "drv_irq.h"
#if defined(RT_USING_PIN)
#define __HC_PORT(port) GPIO_PORT_##port
#define GET_PIN(PORT, PIN) (rt_base_t)(((rt_uint16_t)__HC_PORT(PORT) * 16) + PIN)
struct hc32_pin_irq_map
{
rt_uint16_t pinbit;
func_ptr_t irq_callback;
struct hc32_irq_config irq_config;
};
int rt_hw_pin_init(void);
#endif
#endif /* __DRV_GPIO_H__ */
|
