summaryrefslogtreecommitdiff
path: root/bsp/hc32l196/libraries/SConscript
blob: 64ebe4eb657152bccf352a1118687e12d5312994 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
# RT-Thread building script for bridge

import rtconfig
Import('RTT_ROOT')
from building import *

# get current directory
cwd = GetCurrentDir()

# The set of source files associated with this SConscript file.
src = Split("""
CMSIS/Device/HDSC/HC32L196/Source/system_hc32l19x.c
CMSIS/Device/HDSC/HC32L196/Source/interrupts_hc32l19x.c
HC32L196_StdPeriph_Driver/src/hc32l196_ddl.c
HC32L196_StdPeriph_Driver/src/hc32l196_gpio.c
HC32L196_StdPeriph_Driver/src/hc32l196_sysctrl.c
HC32L196_StdPeriph_Driver/src/hc32l196_flash.c
""")

if GetDepend(['RT_USING_SERIAL']):
    src += ['HC32L196_StdPeriph_Driver/src/hc32l196_uart.c']

#add for startup script
if rtconfig.PLATFORM in ['gcc']:
    src = src + ['CMSIS/Device/HDSC/HC32L196/Source/GCC/startup_hc32l19x.s']
elif rtconfig.PLATFORM in ['armcc', 'armclang']:
    src = src + ['CMSIS/Device/HDSC/HC32L196/Source/ARM/startup_hc32l19x.s']
elif rtconfig.PLATFORM in ['iccarm']:
    src = src + ['CMSIS/Device/HDSC/HC32L196/Source/IAR/startup_hc32l19x.s']

#add headfile script
path = [cwd + '/CMSIS/Include',
    cwd + '/CMSIS/Device/HDSC/HC32L196/Include',
    cwd + '/HC32L196_StdPeriph_Driver/inc']

CPPDEFINES = []

group = DefineGroup('HC32_StdPeriph', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)

Return('group')