1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
|
/*
* Copyright (c) 2021-2023 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include <rtconfig.h>
#include "hpm_csr_regs.h"
.section .start, "ax"
.global _start
.type _start,@function
_start:
/* Initialize global pointer */
.option push
.option norelax
la gp, __global_pointer$
la tp, __thread_pointer
.option pop
/* Initialize stack pointer */
la t0, _stack
mv sp, t0
#ifdef __nds_execit
/* Initialize EXEC.IT table */
la t0, _ITB_BASE_
csrw uitb, t0
#endif
#ifdef __riscv_flen
/* Enable FPU */
li t0, CSR_MSTATUS_FS_MASK
csrrs t0, mstatus, t0
/* Initialize FCSR */
fscsr zero
#endif
#ifdef HPM_USING_VECTOR_PREEMPTED_MODE
/* Initial machine trap-vector Base */
la t0, __vector_table
csrw mtvec, t0
/* Enable vectored external PLIC interrupt */
csrsi CSR_MMISC_CTL, 2
#else
/* Initial machine trap-vector Base */
la t0, SW_handler
csrw mtvec, t0
/* Disable vectored external PLIC interrupt */
csrci CSR_MMISC_CTL, 2
#endif
/* System reset handler */
call reset_handler
/* Infinite loop, if returned accidently */
1: j 1b
.weak nmi_handler
nmi_handler:
1: j 1b
#ifndef HPM_USING_RTTHREAD_INTERRUPT_FRAMEWORK
.weak default_irq_handler
.align 2
default_irq_handler:
1: j 1b
.macro IRQ_HANDLER irq
.weak default_isr_\irq
.set default_isr_\irq, default_irq_handler
.long default_isr_\irq
.endm
#include "vectors.S"
#else
.section .vector_table, "a"
.global __vector_table
.align 9
__vector_table:
.rept RT_HW_ISR_NUM
.long handle_trap
.endr
#endif /* HPM_USING_RTTHREAD_INTERRUPT_FRAMEWORK */
|
