1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
/*
* Copyright (c) 2022 hpmicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <rtdbg.h>
#ifdef BSP_USING_I2C
#include "drv_i2c.h"
#include "hpm_i2c_drv.h"
#include "board.h"
#ifdef RT_USING_I2C
struct hpm_i2c
{
struct rt_i2c_bus_device bus;
I2C_Type *base;
clock_name_t clk_name;
char *bus_name;
};
static struct hpm_i2c hpm_i2cs[] =
{
#if defined(BSP_USING_I2C0)
{
.base = HPM_I2C0,
.bus_name = "i2c0",
.clk_name = clock_i2c0,
},
#endif
#if defined(BSP_USING_I2C1)
{
.base = HPM_I2C1,
.bus_name = "i2c1",
.clk_name = clock_i2c1,
},
#endif
#if defined(BSP_USING_I2C2)
{
.base = HPM_I2C1,
.bus_name = "i2c1",
.clk_name = clock_i2c1,
},
#endif
#if defined(BSP_USING_I2C3)
{
.base = HPM_I2C1,
.bus_name = "i2c1",
.clk_name = clock_i2c1,
},
#endif
};
static rt_ssize_t hpm_i2c_master_transfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num);
struct rt_i2c_bus_device_ops hpm_i2c_ops =
{
hpm_i2c_master_transfer,
RT_NULL,
RT_NULL
};
static rt_ssize_t hpm_i2c_master_transfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
{
RT_ASSERT(bus != RT_NULL);
RT_ASSERT(msgs != RT_NULL);
struct rt_i2c_msg *msg;
struct hpm_i2c *i2c_info = (struct hpm_i2c *)bus;
hpm_stat_t i2c_stat = status_success;
rt_err_t ret = RT_ERROR;
rt_uint32_t i;
for (i = 0; i < num; i++)
{
msg = &msgs[i];
if (msg->flags & RT_I2C_ADDR_10BIT)
{
i2c_enable_10bit_address_mode(i2c_info->base, true);
}
else
{
i2c_enable_10bit_address_mode(i2c_info->base, false);
}
if (msg->flags & RT_I2C_RD)
{
i2c_stat = i2c_master_read(i2c_info->base, msg->addr, msg->buf, msg->len);
}
else
{
i2c_stat = i2c_master_write(i2c_info->base, msg->addr, msg->buf, msg->len);
}
if (i2c_stat != status_success)
{
break;
}
}
if (i2c_stat != status_success)
{
return ret;
}
ret = i;
return ret;
}
int rt_hw_i2c_init(void)
{
rt_err_t ret = RT_EOK;
hpm_stat_t stat;
i2c_config_t config;
rt_uint32_t freq;
for (uint32_t i = 0; i < sizeof(hpm_i2cs) / sizeof(hpm_i2cs[0]); i++) {
init_i2c_pins(hpm_i2cs[i].base);
clock_add_to_group(hpm_i2cs[i].clk_name, 0);
clock_set_source_divider(hpm_i2cs[i].clk_name, clk_src_osc24m, 1U);
config.i2c_mode = i2c_mode_normal;
config.is_10bit_addressing = false;
freq = clock_get_frequency(hpm_i2cs[i].clk_name);
stat = i2c_init_master(hpm_i2cs[i].base, freq, &config);
if (stat != status_success) {
LOG_E("rt i2c device %s init failed", hpm_i2cs[i].bus_name);
}
hpm_i2cs[i].bus.ops = &hpm_i2c_ops;
ret = rt_i2c_bus_device_register(&hpm_i2cs[i].bus, hpm_i2cs[i].bus_name);
if (ret != RT_EOK) {
LOG_E("rt i2c device %s register failed, status=%d\n", hpm_i2cs[i].bus_name, ret);
}
}
return ret;
}
INIT_DEVICE_EXPORT(rt_hw_i2c_init);
#endif /* RT_USING_I2C */
#endif /*BSP_USING_I2C*/
|