1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
|
/*
* Copyright (c) 2022-2023 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
* Change Logs:
* Date Author Notes
* 2022-05-09 HPMicro First version
* 2023-04-12 HPMicro Adapt hpm_sdk v1.0.0
* 2023-05-13 HPMicro Fix compiling error on HPM6360/HPM6200
*/
#include <rtthread.h>
#ifdef BSP_USING_PWM
#include <rthw.h>
#include <rtdevice.h>
#include "board.h"
#include "drv_gpio.h"
#include "hpm_pwm_drv.h"
#include "hpm_clock_drv.h"
#ifdef HPM_PWM3
#define PWM_INSTANCE_NUM 4
#elif defined(HPM_PWM2)
#define PWM_INSTANCE_NUM 3
#elif defined(HPM_PWM1)
#define PWM_INSTANCE_NUM 2
#else
#define PWM_INSTANCE_NUM 1
#endif
static PWM_Type * pwm_base_tbl[PWM_INSTANCE_NUM] = {
HPM_PWM0,
#ifdef HPM_PWM1
HPM_PWM1,
#endif
#ifdef HPM_PWM2
HPM_PWM2,
#endif
#ifdef HPM_PWM3
HPM_PWM3
#endif
};
rt_err_t hpm_generate_central_aligned_waveform(uint8_t pwm_index, uint8_t channel, uint32_t period, uint32_t pulse)
{
uint32_t duty;
pwm_cmp_config_t cmp_config[2] = {0};
pwm_config_t pwm_config = {0};
uint32_t reload = 0;
uint32_t freq;
PWM_Type * pwm_name_index;
pwm_name_index = pwm_base_tbl[pwm_index];
init_pwm_pins(pwm_name_index);
freq = board_init_pwm_clock(pwm_name_index);
if(period != 0) {
reload = (uint64_t)freq * period / 1000000000;
} else {
reload = 0;
}
pwm_stop_counter(pwm_name_index);
pwm_get_default_pwm_config(pwm_name_index, &pwm_config);
/*
* reload and start counter
*/
pwm_set_reload(pwm_name_index, 0, reload);
pwm_set_start_count(pwm_name_index, 0, 0);
/*
* config cmp1 and cmp2
*/
duty = (uint64_t)freq * pulse / 1000000000;
cmp_config[0].mode = pwm_cmp_mode_output_compare;
cmp_config[0].cmp = (reload - duty) >> 1;
cmp_config[0].update_trigger = pwm_shadow_register_update_on_shlk;
cmp_config[1].mode = pwm_cmp_mode_output_compare;
cmp_config[1].cmp = (reload + duty) >> 1;
cmp_config[1].update_trigger = pwm_shadow_register_update_on_shlk;
pwm_config.enable_output = true;
pwm_config.dead_zone_in_half_cycle = 0;
pwm_config.invert_output = false;
/*
* config pwm
*/
if (status_success != pwm_setup_waveform(pwm_name_index, channel, &pwm_config, channel * 2, cmp_config, 2)) {
return -RT_ERROR;
}
pwm_start_counter(pwm_name_index);
pwm_issue_shadow_register_lock_event(pwm_name_index);
return RT_EOK;
}
rt_err_t hpm_set_central_aligned_waveform(uint8_t pwm_index, uint8_t channel, uint32_t period, uint32_t pulse)
{
uint32_t duty;
pwm_config_t pwm_config = {0};
uint32_t reload = 0;
uint32_t freq;
PWM_Type * pwm_name_index;
pwm_name_index = pwm_base_tbl[pwm_index];
freq = board_init_pwm_clock(pwm_name_index);
if(period != 0) {
reload = (uint64_t)freq * period / 1000000000;
} else {
reload = 0;
}
pwm_get_default_pwm_config(pwm_name_index, &pwm_config);
pwm_set_reload(pwm_name_index, 0, reload);
duty = (uint64_t)freq * pulse / 1000000000;
pwm_update_raw_cmp_central_aligned(pwm_name_index, channel * 2, channel * 2 + 1, (reload - duty) >> 1, (reload + duty) >> 1);
pwm_issue_shadow_register_lock_event(pwm_name_index);
return RT_EOK;
}
rt_err_t hpm_disable_pwm(uint8_t pwm_index, uint8_t channel)
{
pwm_disable_output(pwm_base_tbl[pwm_index], channel);
return RT_EOK;
}
rt_err_t hpm_pwm_control(struct rt_device_pwm * device, int cmd, void *arg)
{
uint8_t channel;
uint32_t period;
uint32_t pulse;
rt_err_t sta = RT_EOK;
unsigned char pwm_name;
struct rt_pwm_configuration * configuration;
configuration = (struct rt_pwm_configuration * )arg;
channel = configuration->channel;
period = configuration->period;
pulse = configuration->pulse;
if (strcmp("pwm0", device->parent.parent.name) == 0) {
pwm_name = 0;
} else if (strcmp("pwm1", device->parent.parent.name) == 0) {
pwm_name = 1;
} else if (strcmp("pwm2", device->parent.parent.name) == 0) {
pwm_name = 2;
} else if (strcmp("pwm3", device->parent.parent.name) == 0) {
pwm_name = 3;
} else {
return -RT_ERROR;
}
switch(cmd) {
case PWM_CMD_ENABLE: {
sta = hpm_generate_central_aligned_waveform(pwm_name, channel, period, pulse);
break;
}
case PWM_CMD_DISABLE: {
hpm_disable_pwm(pwm_name, channel);
break;
}
case PWM_CMD_SET: {
sta = hpm_set_central_aligned_waveform(pwm_name, channel, period, pulse);
break;
}
case PWM_CMD_GET: {
sta = RT_EOK;
break;
}
default: {
sta = -RT_ERROR;
break;
}
}
return sta;
}
rt_err_t hpm_pwm_dev_control(rt_device_t device, int cmd, void *arg)
{
uint8_t channel;
uint32_t period;
uint32_t pulse;
rt_err_t sta = RT_EOK;
uint8_t pwm_name;
struct rt_pwm_configuration * configuration;
configuration = (struct rt_pwm_configuration * )arg;
channel = configuration->channel;
period = configuration->period;
pulse = configuration->pulse;
if (strcmp("pwm0", device->parent.name) == 0) {
pwm_name = 0;
} else if (strcmp("pwm1", device->parent.name) == 0) {
pwm_name = 1;
} else if (strcmp("pwm2", device->parent.name) == 0) {
pwm_name = 2;
} else if (strcmp("pwm3", device->parent.name) == 0) {
pwm_name = 3;
} else {
return -RT_ERROR;
}
switch(cmd) {
case PWM_CMD_ENABLE: {
sta = hpm_generate_central_aligned_waveform(pwm_name, channel, period, pulse);
break;
}
case PWM_CMD_DISABLE: {
hpm_disable_pwm(pwm_name, channel);
break;
}
case PWM_CMD_SET: {
sta = hpm_set_central_aligned_waveform(pwm_name, channel, period, pulse);
break;
}
case PWM_CMD_GET: {
sta = RT_EOK;
break;
}
default: {
sta = -RT_ERROR;
break;
}
}
return sta;
}
const static struct rt_pwm_ops hpm_pwm_ops = {
.control = &hpm_pwm_control
};
static struct rt_device hpm_pwm_parent = {
.control = hpm_pwm_dev_control
};
#ifdef HPM_PWM0
static struct rt_device_pwm hpm_dev_pwm0 = {
.ops = &hpm_pwm_ops,
};
#endif
#ifdef HPM_PWM1
static struct rt_device_pwm hpm_dev_pwm1 = {
.ops = &hpm_pwm_ops,
};
#endif
#ifdef HPM_PWM2
static struct rt_device_pwm hpm_dev_pwm2 = {
.ops = &hpm_pwm_ops,
};
#endif
#ifdef HPM_PWM3
static struct rt_device_pwm hpm_dev_pwm3 = {
.ops = &hpm_pwm_ops,
};
#endif
int rt_hw_pwm_init(void)
{
int ret = RT_EOK;
#ifdef HPM_PWM0
hpm_dev_pwm0.parent = hpm_pwm_parent;
ret = rt_device_pwm_register(&hpm_dev_pwm0, "pwm0", &hpm_pwm_ops, RT_NULL);
#endif
#ifdef HPM_PWM1
hpm_dev_pwm1.parent = hpm_pwm_parent;
ret = rt_device_pwm_register(&hpm_dev_pwm1, "pwm1", &hpm_pwm_ops, RT_NULL);
#endif
#ifdef HPM_PWM2
hpm_dev_pwm2.parent = hpm_pwm_parent;
ret = rt_device_pwm_register(&hpm_dev_pwm2, "pwm2", &hpm_pwm_ops, RT_NULL);
#endif
#ifdef HPM_PWM3
hpm_dev_pwm3.parent = hpm_pwm_parent;
ret = rt_device_pwm_register(&hpm_dev_pwm3, "pwm3", &hpm_pwm_ops, RT_NULL);
#endif
return ret;
}
INIT_BOARD_EXPORT(rt_hw_pwm_init);
#endif /* BSP_USING_PWM */
|