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/*
* Copyright (c) 2022-2025 HPMicro
*
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <rtdbg.h>
#ifdef RT_USING_CLOCK_TIME
#include "drv_timer.h"
#include "board.h"
#ifdef BSP_USING_GPTMRV2
#include "hpm_gptmrv2_drv.h"
#ifndef GPTMRV2_DEFAULT_FREQ
#define GPTMRV2_DEFAULT_FREQ (100000UL) /* 100KHz */
#endif
#else
#include "hpm_gptmr_drv.h"
#endif
#include "hpm_clock_drv.h"
typedef struct _hpm_gptimer
{
GPTMR_Type *base;
const char *name;
rt_clock_timer_t timer;
uint32_t channel;
clock_name_t clock_name;
int32_t irq_num;
uint8_t irq_priority;
} hpm_gptimer_t;
static void hpm_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state);
static rt_err_t hpm_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode);
static void hpm_clock_timer_stop(rt_clock_timer_t *timer);
static rt_uint32_t hpm_clock_timer_count_get(rt_clock_timer_t *timer);
static rt_err_t hpm_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args);
static void hpm_hwtmr_isr(hpm_gptimer_t *gptmr);
static const struct rt_clock_timer_ops hpm_clock_timer_ops = {
.init = hpm_clock_timer_init,
.start = hpm_clock_timer_start,
.stop = hpm_clock_timer_stop,
.count_get = hpm_clock_timer_count_get,
.control = hpm_clock_timer_control
};
static const struct rt_clock_timer_info hpm_clock_timer_info = {
.maxfreq = 100000000UL,
.minfreq = 93750UL,
#ifdef BSP_USING_GPTMRV2
.maxcnt = 0xFFFFFFUL,
#else
.maxcnt = 0xFFFFFFFFUL,
#endif
.cntmode = CLOCK_TIMER_CNTMODE_UP
};
#ifdef BSP_USING_GPTMR0
static hpm_gptimer_t timer0 =
{
.name = "GPT0",
.base = HPM_GPTMR0,
.clock_name = clock_gptmr0,
.irq_num = IRQn_GPTMR0,
#if defined(BSP_GPTMR0_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR0_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
#ifdef BSP_USING_GPTMR1
static hpm_gptimer_t timer1 =
{
.name = "GPT1",
.base = HPM_GPTMR1,
.clock_name = clock_gptmr1,
.irq_num = IRQn_GPTMR1,
#if defined(BSP_GPTMR1_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR1_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
#ifdef BSP_USING_GPTMR2
static hpm_gptimer_t timer2 =
{
.name = "GPT2",
.base = HPM_GPTMR2,
.clock_name = clock_gptmr2,
.irq_num = IRQn_GPTMR2,
#if defined(BSP_GPTMR2_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR2_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
#ifdef BSP_USING_GPTMR3
static hpm_gptimer_t timer3 =
{
.name = "GPT3",
.base = HPM_GPTMR3,
.clock_name = clock_gptmr3,
.irq_num = IRQn_GPTMR3,
#if defined(BSP_GPTMR3_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR3_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
#ifdef BSP_USING_GPTMR4
static hpm_gptimer_t timer4 =
{
.name = "GPT4",
.base = HPM_GPTMR4,
.clock_name = clock_gptmr4,
.irq_num = IRQn_GPTMR4,
#if defined(BSP_GPTMR4_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR4_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
#ifdef BSP_USING_GPTMR5
static hpm_gptimer_t timer5 =
{
.name = "GPT5",
.base = HPM_GPTMR5,
.clock_name = clock_gptmr5,
.irq_num = IRQn_GPTMR5,
#if defined(BSP_GPTMR5_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR5_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
#ifdef BSP_USING_GPTMR6
static hpm_gptimer_t timer6 =
{
.name = "GPT6",
.base = HPM_GPTMR6,
.clock_name = clock_gptmr6,
.irq_num = IRQn_GPTMR6,
#if defined(BSP_GPTMR6_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR6_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
#ifdef BSP_USING_GPTMR7
static hpm_gptimer_t timer7 =
{
.name = "GPT7",
.base = HPM_GPTMR7,
.clock_name = clock_gptmr7,
.irq_num = IRQn_GPTMR7,
#if defined(BSP_GPTMR7_IRQ_PRIORITY)
.irq_priority = BSP_GPTMR7_IRQ_PRIORITY,
#else
.irq_priority = 1,
#endif
};
#endif
static hpm_gptimer_t *s_gptimers[] = {
#ifdef BSP_USING_GPTMR0
&timer0,
#endif
#ifdef BSP_USING_GPTMR1
&timer1,
#endif
#ifdef BSP_USING_GPTMR2
&timer2,
#endif
#ifdef BSP_USING_GPTMR3
&timer3,
#endif
#ifdef BSP_USING_GPTMR4
&timer4,
#endif
#ifdef BSP_USING_GPTMR5
&timer5,
#endif
#ifdef BSP_USING_GPTMR6
&timer6,
#endif
#ifdef BSP_USING_GPTMR7
&timer7,
#endif
};
#ifdef BSP_USING_GPTMR0
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR0, gptmr0_isr);
void gptmr0_isr(void)
{
hpm_hwtmr_isr(&timer0);
}
#endif
#ifdef BSP_USING_GPTMR1
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR1, gptmr1_isr);
void gptmr1_isr(void)
{
hpm_hwtmr_isr(&timer1);
}
#endif
#ifdef BSP_USING_GPTMR2
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR2, gptmr2_isr);
void gptmr2_isr(void)
{
hpm_hwtmr_isr(&timer2);
}
#endif
#ifdef BSP_USING_GPTMR3
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR3, gptmr3_isr);
void gptmr3_isr(void)
{
hpm_hwtmr_isr(&timer3);
}
#endif
#ifdef BSP_USING_GPTMR4
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR4, gptmr4_isr);
void gptmr4_isr(void)
{
hpm_hwtmr_isr(&timer4);
}
#endif
#ifdef BSP_USING_GPTMR5
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR5, gptmr5_isr);
void gptmr5_isr(void)
{
hpm_hwtmr_isr(&timer5);
}
#endif
#ifdef BSP_USING_GPTMR6
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR6, gptmr6_isr);
void gptmr6_isr(void)
{
hpm_hwtmr_isr(&timer6);
}
#endif
#ifdef BSP_USING_GPTMR7
SDK_DECLARE_EXT_ISR_M(IRQn_GPTMR7, gptmr7_isr);
void gptmr7_isr(void)
{
hpm_hwtmr_isr(&timer7);
}
#endif
static void hpm_hwtmr_isr(hpm_gptimer_t *timer)
{
uint32_t hwtmr_stat = gptmr_get_status(timer->base);
if ((hwtmr_stat & GPTMR_CH_RLD_STAT_MASK(timer->channel)) != 0U)
{
rt_clock_timer_isr(&timer->timer);
gptmr_clear_status(timer->base, GPTMR_CH_RLD_STAT_MASK(timer->channel));
}
}
static void hpm_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state)
{
hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data;
GPTMR_Type *base = hpm_gptmr->base;
gptmr_channel_config_t config;
if (state == 1)
{
clock_add_to_group(hpm_gptmr->clock_name, BOARD_RUNNING_CORE & 0x1);
hpm_gptmr->timer.freq = clock_get_frequency(hpm_gptmr->clock_name);
gptmr_channel_get_default_config(base, &config);
#ifdef BSP_USING_GPTMRV2
hpm_gptmr->timer.freq = GPTMRV2_DEFAULT_FREQ;
config.prescaler = clock_get_frequency(hpm_gptmr->clock_name) / hpm_gptmr->timer.freq;
#endif
gptmr_channel_config(base, hpm_gptmr->channel, &config, false);
}
}
static rt_err_t hpm_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode)
{
hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*) timer->parent.user_data;
GPTMR_Type *base = hpm_gptmr->base;
gptmr_channel_config_t config;
gptmr_channel_get_default_config(base, &config);
config.cmp[0] = 0;
config.reload = cnt;
#ifdef BSP_USING_GPTMRV2
config.prescaler = clock_get_frequency(hpm_gptmr->clock_name) / timer->freq;
#endif
timer->mode = mode;
gptmr_channel_config(base, hpm_gptmr->channel, &config, true);
gptmr_clear_status(base, 0xFU);
gptmr_enable_irq(base, GPTMR_CH_RLD_IRQ_MASK(hpm_gptmr->channel));
gptmr_channel_update_count(base, hpm_gptmr->channel, 0);
gptmr_start_counter(base, hpm_gptmr->channel);
intc_m_enable_irq_with_priority(hpm_gptmr->irq_num, hpm_gptmr->irq_priority);
return RT_EOK;
}
static void hpm_clock_timer_stop(rt_clock_timer_t *timer)
{
hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data;
GPTMR_Type *base = hpm_gptmr->base;
gptmr_stop_counter(base, hpm_gptmr->channel);
}
static rt_uint32_t hpm_clock_timer_count_get(rt_clock_timer_t *timer)
{
hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data;
GPTMR_Type *base = hpm_gptmr->base;
rt_uint32_t current_cnt = gptmr_channel_get_counter(base, hpm_gptmr->channel, gptmr_counter_type_normal);
return current_cnt;
}
static rt_err_t hpm_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args)
{
rt_err_t err = RT_EOK;
hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*) timer->parent.user_data;
GPTMR_Type *base = hpm_gptmr->base;
switch (cmd)
{
case CLOCK_TIMER_CTRL_FREQ_SET:
#ifdef BSP_USING_GPTMRV2
if ((args == RT_NULL) || (*(rt_uint32_t *)args == 0U))
{
return -RT_EINVAL;
}
hpm_gptmr->timer.freq = *(rt_uint32_t*)args;
#else
err = -RT_ERROR;
#endif
break;
case CLOCK_TIMER_CTRL_INFO_GET:
if (args == RT_NULL)
{
return -RT_EINVAL;
}
*(rt_clock_timer_t*)args = hpm_gptmr->timer;
break;
case CLOCK_TIMER_CTRL_MODE_SET:
if (args == RT_NULL)
{
return -RT_EINVAL;
}
hpm_gptmr->timer.mode = *(rt_uint32_t*)args;
break;
case CLOCK_TIMER_CTRL_STOP:
gptmr_stop_counter(base, hpm_gptmr->channel);
break;
default:
return -RT_EINVAL;
}
return err;
}
int rt_hw_clock_timer_init(void)
{
int ret = RT_EOK;
for (uint32_t i = 0; i < ARRAY_SIZE(s_gptimers); i++)
{
s_gptimers[i]->timer.info = &hpm_clock_timer_info;
s_gptimers[i]->timer.ops = &hpm_clock_timer_ops;
ret = rt_clock_timer_register(&s_gptimers[i]->timer, s_gptimers[i]->name, s_gptimers[i]);
if (ret != RT_EOK)
{
LOG_E("%s register failed\n", s_gptimers[i]->name);
}
}
return ret;
}
INIT_BOARD_EXPORT(rt_hw_clock_timer_init);
#endif /* BSP_USING_GPTMR */
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