1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
|
/**************************************************************************//**
*
* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-3-15 Wayne First version
*
******************************************************************************/
#include <rtconfig.h>
#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)
#include <rtdevice.h>
#include "NuMicro.h"
/* Private define ---------------------------------------------------------------*/
#define NU_TIMER_DEVICE(timer) (nu_timer_t)(timer)
enum
{
TIMER_START = -1,
#if defined(BSP_USING_TIMER0)
TIMER0_IDX,
#endif
#if defined(BSP_USING_TIMER1)
TIMER1_IDX,
#endif
#if defined(BSP_USING_TIMER2)
TIMER2_IDX,
#endif
#if defined(BSP_USING_TIMER3)
TIMER3_IDX,
#endif
TIMER_CNT
};
/* Private typedef --------------------------------------------------------------*/
struct nu_timer
{
rt_clock_timer_t parent;
char *name;
TIMER_T *base;
IRQn_Type irqn;
uint32_t rstidx;
uint32_t modid;
};
typedef struct nu_timer *nu_timer_t;
/* Private functions ------------------------------------------------------------*/
static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state);
static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode);
static void nu_timer_stop(rt_clock_timer_t *timer);
static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer);
static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args);
/* Public functions -------------------------------------------------------------*/
/* Private variables ------------------------------------------------------------*/
static struct nu_timer nu_timer_arr [] =
{
#if defined(BSP_USING_TIMER0)
{ .name = "timer0", .base = TIMER0, .irqn = TMR0_IRQn, .rstidx = TMR0_RST, .modid = TMR0_MODULE },
#endif
#if defined(BSP_USING_TIMER1)
{ .name = "timer1", .base = TIMER1, .irqn = TMR1_IRQn, .rstidx = TMR1_RST, .modid = TMR1_MODULE },
#endif
#if defined(BSP_USING_TIMER2)
{ .name = "timer2", .base = TIMER2, .irqn = TMR2_IRQn, .rstidx = TMR2_RST, .modid = TMR2_MODULE },
#endif
#if defined(BSP_USING_TIMER3)
{ .name = "timer3", .base = TIMER3, .irqn = TMR3_IRQn, .rstidx = TMR3_RST, .modid = TMR3_MODULE },
#endif
};
static struct rt_clock_timer_info nu_timer_info =
{
12000000, /* maximum count frequency */
46875, /* minimum count frequency */
0xFFFFFF, /* the maximum counter value */
CLOCK_TIMER_CNTMODE_UP, /* Increment or Decreasing count mode */
};
static struct rt_clock_timer_ops nu_timer_ops =
{
nu_timer_init,
nu_timer_start,
nu_timer_stop,
nu_timer_count_get,
nu_timer_control
};
/* Functions define ------------------------------------------------------------*/
static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state)
{
nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
RT_ASSERT(psNuTmr != RT_NULL);
if (1 == state)
{
uint32_t timer_clk;
struct rt_clock_timer_info *info = &nu_timer_info;
timer_clk = TIMER_GetModuleClock(psNuTmr->base);
info->maxfreq = timer_clk;
info->minfreq = timer_clk / 256;
TIMER_Open(psNuTmr->base, TIMER_ONESHOT_MODE, 1);
TIMER_EnableInt(psNuTmr->base);
NVIC_EnableIRQ(psNuTmr->irqn);
}
else
{
NVIC_DisableIRQ(psNuTmr->irqn);
TIMER_DisableInt(psNuTmr->base);
TIMER_Close(psNuTmr->base);
}
}
static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode)
{
rt_err_t ret = -RT_EINVAL;
rt_uint32_t u32OpMode;
nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
RT_ASSERT(psNuTmr != RT_NULL);
if (cnt <= 1 || cnt > 0xFFFFFF)
{
goto exit_nu_timer_start;
}
switch (opmode)
{
case CLOCK_TIMER_MODE_PERIOD:
u32OpMode = TIMER_PERIODIC_MODE;
break;
case CLOCK_TIMER_MODE_ONESHOT:
u32OpMode = TIMER_ONESHOT_MODE;
break;
default:
goto exit_nu_timer_start;
}
TIMER_SET_CMP_VALUE(psNuTmr->base, cnt);
TIMER_SET_OPMODE(psNuTmr->base, u32OpMode);
TIMER_EnableInt(psNuTmr->base);
NVIC_EnableIRQ(psNuTmr->irqn);
TIMER_Start(psNuTmr->base);
ret = RT_EOK;
exit_nu_timer_start:
return -(ret);
}
static void nu_timer_stop(rt_clock_timer_t *timer)
{
nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
RT_ASSERT(psNuTmr != RT_NULL);
NVIC_DisableIRQ(psNuTmr->irqn);
TIMER_DisableInt(psNuTmr->base);
TIMER_Stop(psNuTmr->base);
TIMER_ResetCounter(psNuTmr->base);
}
static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer)
{
nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
RT_ASSERT(psNuTmr != RT_NULL);
return TIMER_GetCounter(psNuTmr->base);
}
static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args)
{
rt_err_t ret = RT_EOK;
nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
RT_ASSERT(psNuTmr != RT_NULL);
switch (cmd)
{
case CLOCK_TIMER_CTRL_FREQ_SET:
{
uint32_t clk;
uint32_t pre;
clk = TIMER_GetModuleClock(psNuTmr->base);
pre = clk / *((uint32_t *)args) - 1;
TIMER_SET_PRESCALE_VALUE(psNuTmr->base, pre);
*((uint32_t *)args) = clk / (pre + 1) ;
}
break;
case CLOCK_TIMER_CTRL_STOP:
TIMER_Stop(psNuTmr->base);
break;
default:
ret = -RT_EINVAL;
break;
}
return -(ret);
}
/**
* All UART interrupt service routine
*/
static void nu_timer_isr(nu_timer_t psNuTmr)
{
RT_ASSERT(psNuTmr != RT_NULL);
if (TIMER_GetIntFlag(psNuTmr->base))
{
TIMER_ClearIntFlag(psNuTmr->base);
rt_clock_timer_isr(&psNuTmr->parent);
}
}
int rt_hw_timer_init(void)
{
int i;
rt_err_t ret = RT_EOK;
for (i = (TIMER_START + 1); i < TIMER_CNT; i++)
{
CLK_EnableModuleClock(nu_timer_arr[i].modid);
SYS_ResetModule(nu_timer_arr[i].rstidx);
/* Register Timer information. */
nu_timer_arr[i].parent.info = &nu_timer_info;
/* Register Timer operation. */
nu_timer_arr[i].parent.ops = &nu_timer_ops;
/* Register RT clock_timer device. */
ret = rt_clock_timer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]);
RT_ASSERT(ret == RT_EOK);
}
return 0;
}
INIT_BOARD_EXPORT(rt_hw_timer_init);
#if defined(BSP_USING_TIMER0)
void TMR0_IRQHandler(void)
{
rt_interrupt_enter();
nu_timer_isr((void *)&nu_timer_arr[TIMER0_IDX]);
rt_interrupt_leave();
}
#endif
#if defined(BSP_USING_TIMER1)
void TMR1_IRQHandler(void)
{
rt_interrupt_enter();
nu_timer_isr((void *)&nu_timer_arr[TIMER1_IDX]);
rt_interrupt_leave();
}
#endif
#if defined(BSP_USING_TIMER2)
void TMR2_IRQHandler(void)
{
rt_interrupt_enter();
nu_timer_isr((void *)&nu_timer_arr[TIMER2_IDX]);
rt_interrupt_leave();
}
#endif
#if defined(BSP_USING_TIMER3)
void TMR3_IRQHandler(void)
{
rt_interrupt_enter();
nu_timer_isr((void *)&nu_timer_arr[TIMER3_IDX]);
rt_interrupt_leave();
}
#endif
#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME))
|
