blob: 7e54ddd6c459431516f0e3fe726f1cee97a785fb (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
|
#!armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -x c
/*
** ###################################################################
** Processors: LPC55S36JBD100
** LPC55S36JHI48
**
** Compiler: Keil ARM C/C++ Compiler
** Reference manual: LPC55S3x Reference Manual Rev. DraftG, 07/2021
** Version: rev. 1.1, 2021-08-04
** Build: b210913
**
** Abstract:
** Linker file for the Keil ARM C/C++ Compiler
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2021 NXP
** All rights reserved.
**
** SPDX-License-Identifier: BSD-3-Clause
**
** http: www.nxp.com
** mail: [email protected]
**
** ###################################################################
*/
/* USB BDT size */
#define usb_bdt_size 0x0
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#endif
#if (defined(__heap_size__))
#define Heap_Size __heap_size__
#else
#define Heap_Size 0x0400
#endif
#if (defined(__pkc__))
#define retention_RAMsize 0x00004000 /* SRAM A(16K) reserved for pkc */
#elif (defined(__power_down__))
#define retention_RAMsize 0x00000604 /* The first 0x604 bytes reserved to CPU retention for power down mode */
#else
#define retention_RAMsize 0x00000000
#endif
#if (defined(__powerquad__))
#define powerquad_RAMsize 0x00004000 /* SRAM E(16K) reserved for powerquad */
#else
#define powerquad_RAMsize 0x00000000
#endif
#define m_interrupts_start 0x00000000
#define m_interrupts_size 0x00000400
#define m_text_start 0x00000400
#define m_text_size 0x0003D400
#define m_data_start 0x20000000 + retention_RAMsize
#define m_data_size 0x0001C000 - retention_RAMsize - powerquad_RAMsize
#define m_sramx_start 0x04000000
#define m_sramx_size 0x00004000
LR_m_text m_interrupts_start m_interrupts_size+m_text_size { ; load region size_region
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
* (.isr_vector,+FIRST)
}
ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
* (InRoot$$Sections)
.ANY (+RO)
}
RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}
|