summaryrefslogtreecommitdiff
path: root/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_soft_i2c.c
blob: 5190ee4a59408a8baa164120aaa3550dfe097fca (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
/*
 * Copyright (c) 2006-2024 RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2024-06-25     Andeyqi      the first version
 */
#include <rtthread.h>
#include <rthw.h>
#include <rtdevice.h>
#include <board.h>

#ifdef BSP_USING_SW_I2C

#define LOG_TAG              "drv.i2c"
#include <rtdbg.h>

/* MCXNXXX config class */
struct mcxnxxx_soft_i2c_config
{
    rt_uint8_t scl;
    rt_uint8_t sda;
    const char *bus_name;
};

/* MCXNXXX i2c dirver class */
struct mcxnxxx_i2c
{
    struct rt_i2c_bit_ops ops;
    struct rt_i2c_bus_device i2c2_bus;
};

#if defined(BSP_USING_SW_I2C0)
#define SW_I2C0_BUS_CONFIG                               \
    {                                                    \
        .scl = BSP_SW_I2C0_SCL_PIN,                      \
        .sda = BSP_SW_I2C0_SDA_PIN,                      \
        .bus_name = "swi2c0",                            \
    }
#endif

static const struct mcxnxxx_soft_i2c_config soft_i2c_config[] =
{
#if defined(BSP_USING_SW_I2C0)
    SW_I2C0_BUS_CONFIG,
#endif
};

static struct mcxnxxx_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])];

/**
  * @brief  This function initializes the i2c pin.
  * @param  i2c
  * @retval None
  */
static void mcxnxxx_i2c_gpio_init(struct mcxnxxx_i2c *i2c)
{
    struct mcxnxxx_soft_i2c_config* cfg = (struct mcxnxxx_soft_i2c_config*)i2c->ops.data;

    rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
    rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);

    rt_pin_write(cfg->scl, PIN_HIGH);
    rt_pin_write(cfg->sda, PIN_HIGH);
}

/**
  * @brief  This function sets the sda pin.
  * @param  data, state
  * @retval None
  */
static void mcxnxxx_set_sda(void *data, rt_int32_t state)
{
    struct mcxnxxx_soft_i2c_config* cfg = (struct mcxnxxx_soft_i2c_config*)data;

    rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);

    if (state)
    {
        rt_pin_write(cfg->sda, PIN_HIGH);
    }
    else
    {
        rt_pin_write(cfg->sda, PIN_LOW);
    }
}

/**
  * @brief  This function sets the scl pin.
  * @param  data, state
  * @retval None
  */
static void mcxnxxx_set_scl(void *data, rt_int32_t state)
{
    struct mcxnxxx_soft_i2c_config* cfg = (struct mcxnxxx_soft_i2c_config*)data;

    rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);

    if (state)
    {
        rt_pin_write(cfg->scl, PIN_HIGH);
    }
    else
    {
        rt_pin_write(cfg->scl, PIN_LOW);
    }
}

/**
  * @brief  This function gets the sda pin state.
  * @param  data
  * @retval None
  */
static rt_int32_t mcxnxxx_get_sda(void *data)
{
    struct mcxnxxx_soft_i2c_config* cfg = (struct mcxnxxx_soft_i2c_config*)data;

    rt_pin_mode(cfg->sda, PIN_MODE_INPUT);

    return rt_pin_read(cfg->sda);
}


/**
  * @brief  This function gets the scl pin state.
  * @param  data
  * @retval None
  */
static rt_int32_t mcxnxxx_get_scl(void *data)
{
    struct mcxnxxx_soft_i2c_config* cfg = (struct mcxnxxx_soft_i2c_config*)data;

    rt_pin_mode(cfg->scl,PIN_MODE_INPUT);

    return rt_pin_read(cfg->scl);
}

/**
  * @brief  The time delay function.
  * @param  us
  * @retval None
  */
static void mcxnxxx_udelay(rt_uint32_t us)
{
    rt_uint32_t frequency = CLOCK_GetCoreSysClkFreq();

    int i = (frequency/ 4000000 * us);
    while(i)
    {
        i--;
    }
}

static const struct rt_i2c_bit_ops mcxnxxx_bit_ops_default =
{
    .data     = RT_NULL,
    .set_sda  = mcxnxxx_set_sda,
    .set_scl  = mcxnxxx_set_scl,
    .get_sda  = mcxnxxx_get_sda,
    .get_scl  = mcxnxxx_get_scl,
    .udelay   = mcxnxxx_udelay,
    .delay_us = 1,
    .timeout  = 100
};

/**
  * @brief  if i2c is locked, this function will unlock it
  * @param  cfg
  * @retval RT_EOK indicates successful unlock.
  */
static rt_err_t mcxnxxx_i2c_bus_unlock(const struct mcxnxxx_soft_i2c_config *cfg)
{
    rt_int32_t i = 0;

    if (PIN_LOW == rt_pin_read(cfg->sda))
    {
        while (i++ < 9)
        {
            rt_pin_write(cfg->scl, PIN_HIGH);
            mcxnxxx_udelay(100);
            rt_pin_write(cfg->scl, PIN_LOW);
            mcxnxxx_udelay(100);
        }
    }
    if (PIN_LOW == rt_pin_read(cfg->sda))
    {
        return -RT_ERROR;
    }

    return RT_EOK;
}

/**
  * @brief  I2C initialization function
  * @param  None
  * @retval RT_EOK indicates successful initialization.
  */
int rt_hw_soft_i2c_init(void)
{
    rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct mcxnxxx_i2c);
    rt_err_t result;

    for (int i = 0; i < obj_num; i++)
    {
        i2c_obj[i].ops = mcxnxxx_bit_ops_default;
        i2c_obj[i].ops.data = (void*)&soft_i2c_config[i];
        i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops;
        mcxnxxx_i2c_gpio_init(&i2c_obj[i]);

        result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name);

        RT_ASSERT(result == RT_EOK);

        mcxnxxx_i2c_bus_unlock(&soft_i2c_config[i]);

        LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
        soft_i2c_config[i].bus_name,
        soft_i2c_config[i].scl,
        soft_i2c_config[i].sda);
    }

    return RT_EOK;
}
INIT_APP_EXPORT(rt_hw_soft_i2c_init);

#endif /* RT_USING_I2C */