1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
|
/**
* \file
*
* \brief SPI master common service for SAM.
*
* Copyright (c) 2011-2016 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#ifndef _SPI_MASTER_H_
#define _SPI_MASTER_H_
#include "compiler.h"
#include "sysclk.h"
#include "status_codes.h"
#include "spi.h"
/*! \name SPI Master Management Configuration */
//! @{
#include "conf_spi_master.h"
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
//! Default Configuration of SPI Master Delay BCS
#ifndef CONFIG_SPI_MASTER_DELAY_BCS
#define CONFIG_SPI_MASTER_DELAY_BCS 0
#endif
//! Default Configuration of SPI Master Bits per Transfer Definition
#ifndef CONFIG_SPI_MASTER_BITS_PER_TRANSFER
#define CONFIG_SPI_MASTER_BITS_PER_TRANSFER SPI_CSR_BITS_8_BIT
#endif
//! Default Configuration of SPI Master Delay BCT
#ifndef CONFIG_SPI_MASTER_DELAY_BCT
#define CONFIG_SPI_MASTER_DELAY_BCT 0
#endif
//! Default Configuration of SPI Master Delay BS
#ifndef CONFIG_SPI_MASTER_DELAY_BS
#define CONFIG_SPI_MASTER_DELAY_BS 0
#endif
//! Default Configuration of SPI Master Dummy Field
#ifndef CONFIG_SPI_MASTER_DUMMY
#define CONFIG_SPI_MASTER_DUMMY 0xFF
#endif
//! @}
/**
* \brief Clock phase.
*/
#define SPI_CPHA (1 << 0)
/**
* \brief Clock polarity.
*/
#define SPI_CPOL (1 << 1)
/**
* \brief SPI mode 0.
*/
#define SPI_MODE_0 0
/**
* \brief SPI mode 1.
*/
#define SPI_MODE_1 (SPI_CPHA)
/**
* \brief SPI mode 2.
*/
#define SPI_MODE_2 (SPI_CPOL)
/**
* \brief SPI mode 3.
*/
#define SPI_MODE_3 (SPI_CPOL | SPI_CPHA)
#ifndef SPI_TYPE_DEFS
#define SPI_TYPE_DEFS
//! SPI Flags Definition
typedef uint8_t spi_flags_t;
//! Board SPI Select Id Definition
typedef uint32_t board_spi_select_id_t;
#endif
//! \brief Polled SPI device definition.
struct spi_device {
//! Board specific select id
board_spi_select_id_t id;
};
/** \brief Initialize the SPI in master mode.
*
* \param p_spi Base address of the SPI instance.
*
*/
extern void spi_master_init(Spi *p_spi);
/**
* \brief Set up an SPI device.
*
* The returned device descriptor structure must be passed to the driver
* whenever that device should be used as current slave device.
*
* \param p_spi Base address of the SPI instance.
* \param device Pointer to SPI device struct that should be initialized.
* \param flags SPI configuration flags. Common flags for all
* implementations are the SPI modes SPI_MODE_0 ...
* SPI_MODE_3.
* \param baud_rate Baud rate for communication with slave device in Hz.
* \param sel_id Board specific select id.
*/
extern void spi_master_setup_device(Spi *p_spi, struct spi_device *device,
spi_flags_t flags, uint32_t baud_rate, board_spi_select_id_t sel_id);
/**
* \brief Select the given device on the SPI bus.
*
* Set device specific setting and call board chip select.
*
* \param p_spi Base address of the SPI instance.
* \param device SPI device.
*
*/
extern void spi_select_device(Spi *p_spi, struct spi_device *device);
/**
* \brief Deselect the given device on the SPI bus.
*
* Call board chip deselect.
*
* \param p_spi Base address of the SPI instance.
* \param device SPI device.
*
* \pre SPI device must be selected with spi_select_device() first.
*/
extern void spi_deselect_device(Spi *p_spi, struct spi_device *device);
/** \brief Write one byte to an SPI device.
*
* \param p_spi Base address of the SPI instance.
* \param data Data to write.
*
*/
static inline void spi_write_single(Spi *p_spi, uint8_t data)
{
spi_put(p_spi, (uint16_t)data);
}
/**
* \brief Send a sequence of bytes to an SPI device.
*
* Received bytes on the SPI bus are discarded.
*
* \param p_spi Base address of the SPI instance.
* \param data Data buffer to write.
* \param len Length of data to be written.
*
* \pre SPI device must be selected with spi_select_device() first.
*/
extern status_code_t spi_write_packet(Spi *p_spi,
const uint8_t *data, size_t len);
/** \brief Receive one byte from an SPI device.
*
* \param p_spi Base address of the SPI instance.
* \param data Data to read.
*
*/
static inline void spi_read_single(Spi *p_spi, uint8_t *data)
{
*data = (uint8_t)spi_get(p_spi);
}
/**
* \brief Receive a sequence of bytes from an SPI device.
*
* All bytes sent out on SPI bus are sent as value 0xff.
*
* \param p_spi Base address of the SPI instance.
* \param data Data buffer to read.
* \param len Length of data to be read.
*
* \pre SPI device must be selected with spi_select_device() first.
*/
extern status_code_t spi_read_packet(Spi *p_spi, uint8_t *data, size_t len);
/**
* \brief Send and receive a sequence of bytes from an SPI device.
*
* \param p_spi Base address of the SPI instance.
* \param tx_data Data buffer to send.
* \param rx_data Data buffer to read.
* \param len Length of data to be read.
*
* \pre SPI device must be selected with spi_select_device() first.
*/
extern status_code_t spi_transceive_packet(Spi *p_spi, uint8_t *tx_data, uint8_t *rx_data, size_t len);
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif // _SPI_MASTER_H_
|
