blob: 76e78b83ddd8527a58875a9b628487008c435d67 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
|
/*
* Copyright (c) 2006-2025 RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2025-2-3 yekai first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <rtthread.h>
#include <stm32h7xx.h>
#include "drv_common.h"
#include "drv_gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
#define STM32_FLASH_SIZE (128 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#define STM32_SRAM_SIZE (64*5)
#define STM32_SRAM_END (0x24000000 + STM32_SRAM_SIZE * 1024)
#if defined(__ARMCC_VERSION)
// use IRAM2(RAM D1)
extern int Image$$RW_IRAM2$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM2$$ZI$$Limit)
#define HEAP_END STM32_SRAM_END
#elif defined(__GNUC__)
extern uint8_t _heap_start[];
extern uint8_t _heap_end[];
#define HEAP_BEGIN _heap_start
#define HEAP_END _heap_end
#endif
void SystemClock_Config(void);
#ifdef __cplusplus
}
#endif
#endif
|
