1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
|
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-27 AHTYDHD the first version
*/
#include "drv_pwm.h"
#include <stdint.h>
#include <stdbool.h>
#include "inc/hw_memmap.h"
#include "driverlib/pwm.h"
#include "driverlib/sysctl.h"
#ifdef RT_USING_PWM
#include "pwm_config.h"
#include "tm4c123_config.h"
#include <string.h>
#define LOG_TAG "drv.pwm"
#include <drv_log.h>
enum
{
#ifdef BSP_USING_PWM0
PWM0_INDEX,
#endif
#ifdef BSP_USING_PWM1
PWM1_INDEX,
#endif
#ifdef BSP_USING_PWM2
PWM2_INDEX,
#endif
#ifdef BSP_USING_PWM3
PWM3_INDEX,
#endif
#ifdef BSP_USING_PWM4
PWM4_INDEX,
#endif
#ifdef BSP_USING_PWM5
PWM5_INDEX,
#endif
#ifdef BSP_USING_PWM6
PWM6_INDEX,
#endif
#ifdef BSP_USING_PWM7
PWM7_INDEX,
#endif
};
static struct tm4c123_pwm_config pwm_config[] =
{
#ifdef BSP_USING_PWM0
PWM0_CONFIG,
#endif
#ifdef BSP_USING_PWM1
PWM1_CONFIG,
#endif
#ifdef BSP_USING_PWM2
PWM2_CONFIG,
#endif
#ifdef BSP_USING_PWM3
PWM3_CONFIG,
#endif
#ifdef BSP_USING_PWM4
PWM4_CONFIG,
#endif
#ifdef BSP_USING_PWM5
PWM5_CONFIG,
#endif
#ifdef BSP_USING_PWM6
PWM6_CONFIG,
#endif
#ifdef BSP_USING_PWM7
PWM7_CONFIG,
#endif
};
static struct tm4c123_pwm pwm_obj[sizeof(pwm_config) / sizeof(pwm_config[0])] = {0};
static rt_err_t tm4c123_pwm_control(struct rt_device_pwm *device, int cmd, void *arg);
static struct rt_pwm_ops drv_ops =
{
tm4c123_pwm_control
};
static rt_err_t drv_pwm_enable(char *name, struct rt_pwm_configuration *configuration, rt_bool_t enable)
{
int num = name[3] - 0x30;
if (!enable)
{
if (num <= 3)
{
/* Converts the channel number to the channel number of Hal library */
PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT << (num * 2 + (configuration->channel - 1)), false);
}
else
{
PWMOutputState(PWM1_BASE, PWM_OUT_0_BIT << ((num % 4) * 2 + (configuration->channel - 1)), false);
}
}
else
{
if (num <= 3)
{
PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT << (num * 2 + (configuration->channel - 1)), true);
}
else
{
PWMOutputState(PWM1_BASE, PWM_OUT_0_BIT << ((num % 4) * 2 + (configuration->channel - 1)), true);
}
}
return RT_EOK;
}
static rt_err_t drv_pwm_get(char *name, struct rt_pwm_configuration *configuration)
{
switch (name[3])
{
case '0':
configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_0);
configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1));
break;
case '1':
configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_1);
configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_2 + (uint32_t)(configuration->channel - 1));
break;
case '2':
configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_2);
configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_4 + (uint32_t)(configuration->channel - 1));
break;
case '3':
configuration->period = PWMGenPeriodGet(PWM0_BASE, PWM_GEN_3);
configuration->pulse = PWMPulseWidthGet(PWM0_BASE, PWM_OUT_6 + (uint32_t)(configuration->channel - 1));
break;
case '4':
configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_0);
configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1));
break;
case '5':
configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_1);
configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_2 + (uint32_t)(configuration->channel - 1));
break;
case '6':
configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_2);
configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_4 + (uint32_t)(configuration->channel - 1));
break;
case '7':
configuration->period = PWMGenPeriodGet(PWM1_BASE, PWM_GEN_3);
configuration->pulse = PWMPulseWidthGet(PWM1_BASE, PWM_OUT_6 + (uint32_t)(configuration->channel - 1));
break;
default:
break;
}
return RT_EOK;
}
static rt_err_t drv_pwm_set(char *name, struct rt_pwm_configuration *configuration)
{
uint32_t sysPwmClock = SysCtlPWMClockGet();
switch (name[3])
{
case '0':
PWMGenPeriodSet(PWM0_BASE, PWM_GEN_0, configuration->period / 1000 * (sysPwmClock / 1000000)); // t(s)/(1/f) = ticks ns/1000/1000000
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM0_BASE, PWM_GEN_0);
break;
case '1':
PWMGenPeriodSet(PWM0_BASE, PWM_GEN_1, configuration->period / 1000 * (sysPwmClock / 1000000));
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM0_BASE, PWM_GEN_1);
break;
case '2':
PWMGenPeriodSet(PWM0_BASE, PWM_GEN_2, configuration->period / 1000 * (sysPwmClock / 1000000));
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM0_BASE, PWM_GEN_2);
break;
case '3':
PWMGenPeriodSet(PWM0_BASE, PWM_GEN_3, configuration->period / 1000 * (sysPwmClock / 1000000));
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM0_BASE, PWM_GEN_3);
break;
case '4':
PWMGenPeriodSet(PWM1_BASE, PWM_GEN_0, configuration->period / 1000 * (sysPwmClock / 1000000));
PWMPulseWidthSet(PWM1_BASE, PWM_OUT_0 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM1_BASE, PWM_GEN_0);
break;
case '5':
PWMGenPeriodSet(PWM1_BASE, PWM_GEN_1, configuration->period / 1000 * (sysPwmClock / 1000000));
PWMPulseWidthSet(PWM1_BASE, PWM_OUT_2 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM1_BASE, PWM_GEN_1);
break;
case '6':
PWMGenPeriodSet(PWM1_BASE, PWM_GEN_2, configuration->period / 1000 * (sysPwmClock / 1000000));
PWMPulseWidthSet(PWM1_BASE, PWM_OUT_4 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM1_BASE, PWM_GEN_2);
break;
case '7':
PWMGenPeriodSet(PWM1_BASE, PWM_GEN_3, configuration->period / 1000 * (sysPwmClock / 1000000));
PWMPulseWidthSet(PWM1_BASE, PWM_OUT_6 + (uint32_t)(configuration->channel - 1), configuration->pulse / 1000 * (sysPwmClock / 1000000));
PWMGenEnable(PWM1_BASE, PWM_GEN_3);
break;
default:
break;
}
return RT_EOK;
}
static rt_err_t tm4c123_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
{
struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
switch (cmd)
{
case PWM_CMD_ENABLE:
return drv_pwm_enable(device->parent.parent.name, configuration, RT_TRUE);
case PWM_CMD_DISABLE:
return drv_pwm_enable(device->parent.parent.name, configuration, RT_FALSE);
case PWM_CMD_SET:
return drv_pwm_set(device->parent.parent.name, configuration);
case PWM_CMD_GET:
return drv_pwm_get(device->parent.parent.name, configuration);
default:
return -RT_EINVAL;
}
}
static rt_err_t tm4c123_hw_pwm_init(struct tm4c123_pwm *device)
{
rt_err_t result = RT_EOK;
RT_ASSERT(device != RT_NULL);
pwm_hw_config();
switch (device->config->name[3])
{
case '0':
PWMGenConfigure(PWM0_BASE, PWM_GEN_0, device->config->counterMode |
device->config->syncMode);
break;
case '1':
PWMGenConfigure(PWM0_BASE, PWM_GEN_1, device->config->counterMode |
device->config->syncMode);
break;
case '2':
PWMGenConfigure(PWM0_BASE, PWM_GEN_2, device->config->counterMode |
device->config->syncMode);
break;
case '3':
PWMGenConfigure(PWM0_BASE, PWM_GEN_3, device->config->counterMode |
device->config->syncMode);
break;
case '4':
PWMGenConfigure(PWM1_BASE, PWM_GEN_0, device->config->counterMode |
device->config->syncMode);
break;
case '5':
PWMGenConfigure(PWM1_BASE, PWM_GEN_1, device->config->counterMode |
device->config->syncMode);
break;
case '6':
PWMGenConfigure(PWM1_BASE, PWM_GEN_2, device->config->counterMode |
device->config->syncMode);
break;
case '7':
PWMGenConfigure(PWM1_BASE, PWM_GEN_3, device->config->counterMode |
device->config->syncMode);
break;
default:
LOG_E("%s PWMGenConfigure failed", device->config->name);
result = -RT_ERROR;
return result;
}
return result;
}
int rt_hw_pwm_init(void)
{
int i = 0;
rt_size_t obj_num = sizeof(pwm_obj) / sizeof(struct tm4c123_pwm);
rt_err_t result = RT_EOK;
for (i = 0 ; i < obj_num; i++)
{
pwm_obj[i].config = &pwm_config[i];
pwm_obj[i].pwm_device.ops = &drv_ops;
/*pwm_init*/
if (tm4c123_hw_pwm_init(&pwm_obj[i]) != RT_EOK)
{
LOG_E("%s init failed", pwm_obj[i].config->name);
result = -RT_ERROR;
return result;
}
else
{
LOG_D("%s init success", pwm_obj[i].config->name);
/* register pwm device */
if (rt_device_pwm_register(&pwm_obj[i].pwm_device, pwm_obj[i].config->name, &drv_ops, RT_NULL) == RT_EOK)
{
LOG_D("%s register success", pwm_obj[i].config->name);
}
else
{
LOG_E("%s register failed", pwm_obj[i].config->name);
result = -RT_ERROR;
}
}
}
return result;
}
#endif /* RT_USING_PWM */
/************************** end of file ******************/
|