1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
|
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-06-27 AHTYDHD the first version
*/
#include "drv_uart.h"
#include <stdint.h>
#include <stdbool.h>
#include "inc/hw_memmap.h"
#include "inc/hw_ints.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
#include "driverlib/pin_map.h"
#include "driverlib/interrupt.h"
#include "driverlib/uart.h"
#ifdef RT_USING_SERIAL
#include "uart_config.h"
#include "tm4c123_config.h"
#define LOG_TAG "drv.uart"
#include <drv_log.h>
#if !defined(BSP_USING_UART0)&&!defined(BSP_USING_UART1)&&!defined(BSP_USING_UART2)&&!defined(BSP_USING_UART3)
#error "Please define at least one BSP_USING_UARTx"
#endif
enum
{
#ifdef BSP_USING_UART0
UART0_INDEX,
#endif
#ifdef BSP_USING_UART1
UART1_INDEX,
#endif
#ifdef BSP_USING_UART2
UART2_INDEX,
#endif
#ifdef BSP_USING_UART3
UART3_INDEX,
#endif
};
uint32_t uart_intbase[] =
{
#ifdef BSP_USING_UART0
INT_UART0,
#endif
#ifdef BSP_USING_UART1
INT_UART1,
#endif
#ifdef BSP_USING_UART2
INT_UART2,
#endif
#ifdef BSP_USING_UART3
INT_UART3
#endif
};
static struct tm4c123_uart_config uart_config[] =
{
#ifdef BSP_USING_UART0
UART0_CONFIG,
#endif
#ifdef BSP_USING_UART1
UART1_CONFIG,
#endif
#ifdef BSP_USING_UART2
UART2_CONFIG,
#endif
#ifdef BSP_USING_UART3
UART3_CONFIG,
#endif
};
static struct tm4c123_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
static rt_err_t tm4c123_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct tm4c123_uart *uart;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = rt_container_of(serial, struct tm4c123_uart, serial);
UARTFIFOLevelSet(uart->config->uartbase, UART_FIFO_TX1_8, UART_FIFO_RX1_8);
UARTConfigSetExpClk(uart->config->uartbase, SysCtlClockGet(), uart->config->baudrate,
uart->config->mode);
return RT_EOK;
}
static rt_err_t tm4c123_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct tm4c123_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct tm4c123_uart, serial);
switch (cmd)
{
/* disable interrupt */
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
IntDisable(uart->uartintbase);
UARTIntDisable(uart->config->uartbase, UART_INT_RX);
break;
/* enable interrupt */
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
IntEnable(uart->uartintbase);
UARTIntEnable(uart->config->uartbase, UART_INT_RX);
break;
}
return RT_EOK;
}
static int tm4c123_putc(struct rt_serial_device *serial, char c)
{
struct tm4c123_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct tm4c123_uart, serial);
UARTCharPut(uart->config->uartbase, c);
return 1;
}
static int tm4c123_getc(struct rt_serial_device *serial)
{
int ch;
struct tm4c123_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct tm4c123_uart, serial);
ch = -1;
ch = UARTCharGetNonBlocking(uart->config->uartbase);
return ch;
}
static rt_ssize_t tm4c123_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
{
/* this is an interface for uart dma, reserved for uptate. */
return 0;
}
static const struct rt_uart_ops tm4c123_uart_ops =
{
.configure = tm4c123_configure,
.control = tm4c123_control,
.putc = tm4c123_putc,
.getc = tm4c123_getc,
.dma_transmit = tm4c123_dma_transmit
};
/**
* Uart common interrupt process. This need add to uart ISR.
*
* @param serial serial device
*/
static void uart_isr(struct rt_serial_device *serial)
{
struct tm4c123_uart *uart;
uint32_t ui32Ints;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct tm4c123_uart, serial);
ui32Ints = UARTIntStatus(uart->config->uartbase, true);
UARTIntClear(uart->config->uartbase, ui32Ints);
/* UART in mode Receiver -------------------------------------------------*/
if (ui32Ints & (UART_INT_RX | UART_INT_RT))
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
}
#if defined(BSP_USING_UART0)
void UART0IntHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&(uart_obj[UART0_INDEX].serial));
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART0 */
#if defined(BSP_USING_UART1)
void UART1IntHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
uart_isr(&(uart_obj[UART1_INDEX].serial));
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* BSP_USING_UART1 */
static void tm4c123_uart_get_dma_config(void)
{
/* this is an interface for uart dma, reserved for update */
}
int rt_hw_usart_init(void)
{
rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct tm4c123_uart);
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
rt_err_t result = 0;
uart_hw_config();
for (int i = 0; i < obj_num; i++)
{
uart_obj[i].config = &uart_config[i];
uart_obj[i].uartintbase = uart_intbase[i];
uart_obj[i].serial.ops = &tm4c123_uart_ops;
uart_obj[i].serial.config = config;
/* register UART device */
result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
RT_DEVICE_FLAG_RDWR
| RT_DEVICE_FLAG_INT_RX
| RT_DEVICE_FLAG_INT_TX
| uart_obj[i].uart_dma_flag
, NULL);
RT_ASSERT(result == RT_EOK);
}
return result;
}
#endif /* RT_USING_SERIAL */
/************************** end of file ******************/
|
