summaryrefslogtreecommitdiff
path: root/bsp/xplorer4330/libraries/lpc_chip/chip_common/mem_tests.c
blob: 07c4ec05b3c4dcd9be1c4799192319b7767aaff1 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
/*
 * @brief    Generic memory tests
 *           Various memory tests for testing external memory integrity. Includes
 *           inverse address, walking bit, and pattern tests.
 *
 * @note
 * Copyright(C) NXP Semiconductors, 2012
 * All rights reserved.
 *
 * @par
 * Software that is described herein is for illustrative purposes only
 * which provides customers with programming information regarding the
 * LPC products.  This software is supplied "AS IS" without any warranties of
 * any kind, and NXP Semiconductors and its licensor disclaim any and
 * all warranties, express or implied, including all implied warranties of
 * merchantability, fitness for a particular purpose and non-infringement of
 * intellectual property rights.  NXP Semiconductors assumes no responsibility
 * or liability for the use of the software, conveys no license or rights under any
 * patent, copyright, mask work right, or any other intellectual property rights in
 * or to any products. NXP Semiconductors reserves the right to make changes
 * in the software without notification. NXP Semiconductors also makes no
 * representation or warranty that such application will be suitable for the
 * specified use without further testing or modification.
 *
 * @par
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted, under NXP Semiconductors' and its
 * licensor's relevant copyrights in the software, without fee, provided that it
 * is used in conjunction with NXP Semiconductors microcontrollers.  This
 * copyright, permission, and disclaimer notice must appear in all copies of
 * this code.
 */

#include "mem_tests.h"

/*****************************************************************************
 * Private types/enumerations/variables
 ****************************************************************************/

/*****************************************************************************
 * Public types/enumerations/variables
 ****************************************************************************/

/*****************************************************************************
 * Private functions
 ****************************************************************************/

/*****************************************************************************
 * Public functions
 ****************************************************************************/

/* Walking 0 memory test */
bool mem_test_walking0(MEM_TEST_SETUP_T *pMemSetup)
{
	int i = 0;
	uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;

	/* Must be 32-bit algined */
	if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
		return false;
	}

	/* Write walking 0 pattern */
	while (fbytes > 0) {
		*addr = ~(1 << i);

		addr++;
		fbytes -= 4;
		i++;
		if (i >= 32) {
			i = 0;
		}
	}

	/* Verify walking 0 pattern */
	i = 0;
	fbytes = pMemSetup->bytes;
	addr = pMemSetup->start_addr;
	while (fbytes > 0) {
		if (*addr != ~(1 << i)) {
			pMemSetup->fail_addr = addr;
			pMemSetup->is_val = *addr;
			pMemSetup->ex_val = ~(1 << i);
			return false;
		}

		addr++;
		fbytes -= 4;
		i++;
		if (i >= 32) {
			i = 0;
		}
	}

	return true;
}

/* Walking 1 memory test */
bool mem_test_walking1(MEM_TEST_SETUP_T *pMemSetup)
{
	int i = 0;
	uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;

	/* Must be 32-bit algined */
	if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
		return false;
	}

	/* Write walking 1 pattern */
	while (fbytes > 0) {
		*addr = (1 << i);

		addr++;
		fbytes -= 4;
		i++;
		if (i >= 32) {
			i = 0;
		}
	}

	/* Verify walking 1 pattern */
	i = 0;
	fbytes = pMemSetup->bytes;
	addr = pMemSetup->start_addr;
	while (fbytes > 0) {
		if (*addr != (1 << i)) {
			pMemSetup->fail_addr = addr;
			pMemSetup->is_val = *addr;
			pMemSetup->ex_val = (1 << i);
			return false;
		}

		addr++;
		fbytes -= 4;
		i++;
		if (i >= 32) {
			i = 0;
		}
	}

	return true;
}

/* Address memory test */
bool mem_test_address(MEM_TEST_SETUP_T *pMemSetup)
{
	uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;

	/* Must be 32-bit algined */
	if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
		return false;
	}

	/* Write address for memory location */
	while (fbytes > 0) {
		*addr =  (uint32_t) addr;

		addr++;
		fbytes -= 4;
	}

	/* Verify address for memory location */
	fbytes = pMemSetup->bytes;
	addr = pMemSetup->start_addr;
	while (fbytes > 0) {
		if (*addr != (uint32_t) addr) {
			pMemSetup->fail_addr = addr;
			pMemSetup->is_val = *addr;
			pMemSetup->ex_val = (uint32_t) addr;
			return false;
		}

		addr++;
		fbytes -= 4;
	}

	return true;
}

/* Inverse address memory test */
bool mem_test_invaddress(MEM_TEST_SETUP_T *pMemSetup)
{
	uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;

	/* Must be 32-bit algined */
	if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
		return false;
	}

	/* Write inverse address for memory location */
	while (fbytes > 0) {
		*addr =  ~(uint32_t) addr;

		addr++;
		fbytes -= 4;
	}

	/* Verify inverse address for memory location */
	fbytes = pMemSetup->bytes;
	addr = pMemSetup->start_addr;
	while (fbytes > 0) {
		if (*addr != ~(uint32_t) addr) {
			pMemSetup->fail_addr = addr;
			pMemSetup->is_val = *addr;
			pMemSetup->ex_val = ~(uint32_t) addr;
			return false;
		}

		addr++;
		fbytes -= 4;
	}

	return true;
}

/* Pattern memory test */
bool mem_test_pattern(MEM_TEST_SETUP_T *pMemSetup)
{
	uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
	uint32_t pattern = 0x55AA55AA;

	/* Must be 32-bit algined */
	if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
		return false;
	}

	/* Write pattern for memory location */
	while (fbytes > 0) {
		*addr =  pattern;

		pattern = ~pattern;
		addr++;
		fbytes -= 4;
	}

	/* Verify pattern for memory location */
	pattern = 0x55AA55AA;
	fbytes = pMemSetup->bytes;
	addr = pMemSetup->start_addr;
	while (fbytes > 0) {
		if (*addr != pattern) {
			pMemSetup->fail_addr = addr;
			pMemSetup->is_val = *addr;
			pMemSetup->ex_val = pattern;
			return false;
		}

		pattern = ~pattern;
		addr++;
		fbytes -= 4;
	}

	return true;
}

/* Pattern memory test with seed and increment value */
bool mem_test_pattern_seed(MEM_TEST_SETUP_T *pMemSetup, uint32_t seed, uint32_t incr)
{
	uint32_t fbytes = pMemSetup->bytes, *addr = pMemSetup->start_addr;
	uint32_t pattern = seed;

	/* Must be 32-bit algined */
	if ((((uint32_t) addr & 0x3) != 0) || ((fbytes & 0x3) != 0)) {
		return false;
	}

	/* Write pattern for memory location */
	while (fbytes > 0) {
		*addr =  pattern;

		pattern += incr;
		addr++;
		fbytes -= 4;
	}

	/* Verify pattern for memory location */
	pattern = seed;
	fbytes = pMemSetup->bytes;
	addr = pMemSetup->start_addr;
	while (fbytes > 0) {
		if (*addr != pattern) {
			pMemSetup->fail_addr = addr;
			pMemSetup->is_val = *addr;
			pMemSetup->ex_val = pattern;
			return false;
		}

		pattern += incr;
		addr++;
		fbytes -= 4;
	}

	return true;
}