diff options
| author | Frédéric Desbiens <[email protected]> | 2026-04-15 11:23:57 -0400 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-04-15 11:23:57 -0400 |
| commit | 454ab56fcecb35c0b24dc2f0bed6b8551a797fac (patch) | |
| tree | e909fedab1886525d96c7122a7ac82bb3d6cd636 | |
| parent | 4f1b9bfdc1b7dfc5f8406b040d57a2ee5115b568 (diff) | |
| parent | 416dfac3fd596c6fcc5b299886426eb40a42ecaa (diff) | |
Merge pull request #278 from Polarisru/master
Fixed SysTick initialization problem in tx_initialize_low_level.s for Cortex-M0.
4 files changed, 12 insertions, 0 deletions
diff --git a/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s b/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s index b16b3e20..3a585477 100644 --- a/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s +++ b/ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s @@ -169,6 +169,9 @@ _tx_initialize_low_level ; /* Configure SysTick. */ ; LDR r0, =0xE000E000 ; Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] ; Reset SysTick Control + STR r1, [r0, #0x18] ; Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] ; Setup SysTick Reload Value MOVS r1, #0x7 ; Build SysTick Control Enable Value diff --git a/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S b/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S index e9dfb329..36738f3d 100644 --- a/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S +++ b/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S @@ -123,6 +123,9 @@ _tx_initialize_low_level: @ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ @ LDR r0, =0xE000E000 @ Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] // Setup SysTick Reload Value LDR r1, =0x7 // Build SysTick Control Enable Value diff --git a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s index cec6e9b2..991f7809 100644 --- a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s +++ b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s @@ -118,6 +118,9 @@ _tx_initialize_low_level: ; /* Configure SysTick. */ ; LDR r0, =0xE000E000 ; Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] ; Reset SysTick Control + STR r1, [r0, #0x18] ; Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] ; Setup SysTick Reload Value MOVS r1, #0x7 ; Build SysTick Control Enable Value diff --git a/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s b/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s index b16b3e20..3a585477 100644 --- a/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s +++ b/ports/cortex_m0/keil/example_build/tx_initialize_low_level.s @@ -169,6 +169,9 @@ _tx_initialize_low_level ; /* Configure SysTick. */ ; LDR r0, =0xE000E000 ; Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] ; Reset SysTick Control + STR r1, [r0, #0x18] ; Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] ; Setup SysTick Reload Value MOVS r1, #0x7 ; Build SysTick Control Enable Value |