summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorFrédéric Desbiens <[email protected]>2026-04-15 09:42:41 -0400
committerGitHub <[email protected]>2026-04-15 09:42:41 -0400
commit9dcb05cb78d672017a4458676a955d0189f88fec (patch)
treece99c4b19fb89dd73312c24e6e8df7dac107092e
parent12553eaf2c3f0f97300b737f27bc07071492d6bd (diff)
parent5892fe15b5e03fabf021e33747c07cabb31e1c54 (diff)
Merge pull request #273 from hodcarrier/master
Fixed the link flag in the Cortex-A9 sample
-rw-r--r--ports_smp/cortex_a5_smp/ac5/example_build/sample_threadx/v7.h1
-rw-r--r--ports_smp/cortex_a5_smp/gnu/example_build/v7.h1
-rw-r--r--ports_smp/cortex_a7_smp/ac5/example_build/sample_threadx/v7.h1
-rw-r--r--ports_smp/cortex_a7_smp/gnu/example_build/v7.h1
-rw-r--r--ports_smp/cortex_a9_smp/gnu/example_build/build_threadx_sample.bat2
-rw-r--r--ports_smp/cortex_a9_smp/gnu/example_build/v7.h1
6 files changed, 1 insertions, 6 deletions
diff --git a/ports_smp/cortex_a5_smp/ac5/example_build/sample_threadx/v7.h b/ports_smp/cortex_a5_smp/ac5/example_build/sample_threadx/v7.h
index c18b945c..4a500a59 100644
--- a/ports_smp/cortex_a5_smp/ac5/example_build/sample_threadx/v7.h
+++ b/ports_smp/cortex_a5_smp/ac5/example_build/sample_threadx/v7.h
@@ -35,7 +35,6 @@ void disableInterrupts(void);
// ------------------------------------------------------------
// Caches
-void invalidateCaches_IS(void);
void cleanInvalidateDCache(void);
void invalidateCaches_IS(void);
void enableCaches(void);
diff --git a/ports_smp/cortex_a5_smp/gnu/example_build/v7.h b/ports_smp/cortex_a5_smp/gnu/example_build/v7.h
index c18b945c..4a500a59 100644
--- a/ports_smp/cortex_a5_smp/gnu/example_build/v7.h
+++ b/ports_smp/cortex_a5_smp/gnu/example_build/v7.h
@@ -35,7 +35,6 @@ void disableInterrupts(void);
// ------------------------------------------------------------
// Caches
-void invalidateCaches_IS(void);
void cleanInvalidateDCache(void);
void invalidateCaches_IS(void);
void enableCaches(void);
diff --git a/ports_smp/cortex_a7_smp/ac5/example_build/sample_threadx/v7.h b/ports_smp/cortex_a7_smp/ac5/example_build/sample_threadx/v7.h
index c18b945c..4a500a59 100644
--- a/ports_smp/cortex_a7_smp/ac5/example_build/sample_threadx/v7.h
+++ b/ports_smp/cortex_a7_smp/ac5/example_build/sample_threadx/v7.h
@@ -35,7 +35,6 @@ void disableInterrupts(void);
// ------------------------------------------------------------
// Caches
-void invalidateCaches_IS(void);
void cleanInvalidateDCache(void);
void invalidateCaches_IS(void);
void enableCaches(void);
diff --git a/ports_smp/cortex_a7_smp/gnu/example_build/v7.h b/ports_smp/cortex_a7_smp/gnu/example_build/v7.h
index 0fc0183f..88e88508 100644
--- a/ports_smp/cortex_a7_smp/gnu/example_build/v7.h
+++ b/ports_smp/cortex_a7_smp/gnu/example_build/v7.h
@@ -23,7 +23,6 @@ void disableInterrupts(void);
// ------------------------------------------------------------
// Caches
-void invalidateCaches_IS(void);
void cleanInvalidateDCache(void);
void invalidateCaches_IS(void);
void enableCaches(void);
diff --git a/ports_smp/cortex_a9_smp/gnu/example_build/build_threadx_sample.bat b/ports_smp/cortex_a9_smp/gnu/example_build/build_threadx_sample.bat
index 22d0a618..0e261118 100644
--- a/ports_smp/cortex_a9_smp/gnu/example_build/build_threadx_sample.bat
+++ b/ports_smp/cortex_a9_smp/gnu/example_build/build_threadx_sample.bat
@@ -1,4 +1,4 @@
-arm-none-eabi-gcc -c -g -I../../../../common_smp/inc -I../inc -mcpu=cortex-a5 sample_threadx.c
+arm-none-eabi-gcc -c -g -I../../../../common_smp/inc -I../inc -mcpu=cortex-a9 sample_threadx.c
arm-none-eabi-gcc -c -g -mcpu=cortex-a9 startup.S
arm-none-eabi-gcc -c -g -mcpu=cortex-a9 MP_GIC.S
arm-none-eabi-gcc -c -g -mcpu=cortex-a9 MP_SCU.S
diff --git a/ports_smp/cortex_a9_smp/gnu/example_build/v7.h b/ports_smp/cortex_a9_smp/gnu/example_build/v7.h
index c18b945c..4a500a59 100644
--- a/ports_smp/cortex_a9_smp/gnu/example_build/v7.h
+++ b/ports_smp/cortex_a9_smp/gnu/example_build/v7.h
@@ -35,7 +35,6 @@ void disableInterrupts(void);
// ------------------------------------------------------------
// Caches
-void invalidateCaches_IS(void);
void cleanInvalidateDCache(void);
void invalidateCaches_IS(void);
void enableCaches(void);