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authorFrédéric Desbiens <[email protected]>2026-09-30 09:40:59 -0400
committerFrédéric Desbiens <[email protected]>2026-09-30 10:49:55 -0400
commitf19d8c267d4b9f9495407f36e154c7ea6deea63a (patch)
tree93c141bac54fe3d0323b35001457fd04ee75142b /common_modules/module_lib/src/txm_queue_create.c
parent7212b366aeb0e02eae4cc1cdc6f9787b19bfd79e (diff)
Added simulator tests for Erbium interrupt regressions
Long polling UART writes can mask timer interrupts across several tick periods. PLIC enable-word updates can overwrite a change made by an interrupt handler. The board example had no simulator tests for either case. Added two simulator images and a runner. One compares hardware timer progress with ThreadX ticks after a long print. The other toggles one PLIC source in timer context while a thread changes another. Both tests fail on the PR code and pass with the corresponding local fixes. GCC 15.2.0 and Ninja built both images. erbium_emu reproduced both failures; control runs passed both tests. Port consistency checks passed. No silicon run. Assisted-by: Codex (GPT-6-Sol) <[email protected]>
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