diff options
| author | Frédéric Desbiens <[email protected]> | 2026-03-06 19:27:49 +0100 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-03-06 19:27:49 +0100 |
| commit | 3726d7906b4808bfec7855fc088e073199df9120 (patch) | |
| tree | 8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports/arc_hs | |
| parent | 4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff) | |
| parent | c3259a216026372e3833dd8996a68f77e8595fbd (diff) | |
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports/arc_hs')
17 files changed, 272 insertions, 423 deletions
diff --git a/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.c b/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.c index 81cca72b..6ce6e0d4 100644 --- a/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.c +++ b/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.c @@ -1,5 +1,5 @@ /* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight - threads of different priorities, using a message queue, semaphore, mutex, event flags group, + threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ #include "tx_api.h" @@ -83,40 +83,40 @@ CHAR *pointer = TX_NULL; /* Create the main thread. */ tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 2. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 3. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ - tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -124,23 +124,23 @@ CHAR *pointer = TX_NULL; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ - tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ - tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -243,11 +243,11 @@ UINT status; /* Retrieve a message from the queue. */ status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -306,7 +306,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -359,7 +359,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(&mutex_0); diff --git a/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.cmd b/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.cmd index 78dc1f6e..2f72e865 100644 --- a/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.cmd +++ b/ports/arc_hs/metaware/example_build/sample_threadx/sample_threadx.cmd @@ -1,24 +1,24 @@ // // This is the linker script example (SRV3-style). // (c) Synopsys, 2013 -// +// // -//number of exceptions and interrupts +//number of exceptions and interrupts NUMBER_OF_EXCEPTIONS = 16;//it is fixed (16) NUMBER_OF_INTERRUPTS = 5;//depends on HW configuration //define Interrupt Vector Table size IVT_SIZE_ITEMS = (NUMBER_OF_EXCEPTIONS + NUMBER_OF_INTERRUPTS);//the total IVT size (in "items") -IVT_SIZE_BYTES = IVT_SIZE_ITEMS * 4;//in bytes +IVT_SIZE_BYTES = IVT_SIZE_ITEMS * 4;//in bytes //define ICCM and DCCM locations MEMORY { ICCM: ORIGIN = 0x00000000, LENGTH = 128K DCCM: ORIGIN = 0x80000000, LENGTH = 128K } - -//define sections and groups + +//define sections and groups SECTIONS { GROUP: { .ivt (TEXT) : # Interrupt table @@ -26,18 +26,18 @@ SECTIONS { ___ivt1 = .; * (.ivt) ___ivt2 = .; - // Make the IVT at least IVT_SIZE_BYTES + // Make the IVT at least IVT_SIZE_BYTES . += (___ivt2 - ___ivt1 < IVT_SIZE_BYTES) ? (IVT_SIZE_BYTES - (___ivt2 - ___ivt1)) : 0; } .ivh (TEXT) : // Interrupt handlers - + //TEXT sections .text? : { *('.text$crt*') } * (TEXT): {} //Literals * (LIT): {} } > ICCM - + GROUP: { //data sections .sdata?: {} diff --git a/ports/arc_hs/metaware/example_build/sample_threadx/tx_initialize_low_level.s b/ports/arc_hs/metaware/example_build/sample_threadx/tx_initialize_low_level.s index 56ef5840..9d583370 100644 --- a/ports/arc_hs/metaware/example_build/sample_threadx/tx_initialize_low_level.s +++ b/ports/arc_hs/metaware/example_build/sample_threadx/tx_initialize_low_level.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -67,20 +67,6 @@ _tx_first_free_address: ;/* */ ;/* _tx_initialize_kernel_enter ThreadX entry function */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 10-15-2021 Andres Mlinar Modified comment(s), optimized*/ -;/* system stack usage, */ -;/* resulting in version 6.1.9 */ -;/* 01-31-2022 Andres Mlinar Modified comments(s), */ -;/* initialize interrupts right */ -;/* before enabling the task */ -;/* scheduler, */ -;/* resulting in version 6.1.10 */ -;/* */ ;/**************************************************************************/ ;VOID _tx_initialize_low_level(VOID) ;{ diff --git a/ports/arc_hs/metaware/example_build/sample_threadx/vectors.s b/ports/arc_hs/metaware/example_build/sample_threadx/vectors.s index c6cbc893..eeb9ba2a 100644 --- a/ports/arc_hs/metaware/example_build/sample_threadx/vectors.s +++ b/ports/arc_hs/metaware/example_build/sample_threadx/vectors.s @@ -1,4 +1,4 @@ - + .file "vectors.s" .section .ivt,text ;; This directive forces this section to stay resident even if stripped out by the -zpurgetext linker option diff --git a/ports/arc_hs/metaware/inc/tx_port.h b/ports/arc_hs/metaware/inc/tx_port.h index 1400ded7..7c5dc6de 100644 --- a/ports/arc_hs/metaware/inc/tx_port.h +++ b/ports/arc_hs/metaware/inc/tx_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -42,29 +43,15 @@ /* own special types that can be mapped to actual data types by this */ /* file to guarantee consistency in the interface and functionality. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s), updated */ -/* macro definition, */ -/* resulting in version 6.1.6 */ -/* 01-31-2022 Andres Mlinar Modified comments(s), */ -/* initialize interrupts right */ -/* before enabling the task */ -/* scheduler, */ -/* resulting in version 6.1.10 */ -/* */ /**************************************************************************/ #ifndef TX_PORT_H #define TX_PORT_H -/* Remove volatile for ThreadX source on the ARC. This is because the ARC - compiler generates different non-cache r/w access when using volatile - that is different from the assembly language access of the same +/* Remove volatile for ThreadX source on the ARC. This is because the ARC + compiler generates different non-cache r/w access when using volatile + that is different from the assembly language access of the same global variables in ThreadX. */ #ifdef TX_SOURCE_CODE @@ -89,7 +76,7 @@ #ifdef TX_INCLUDE_USER_DEFINE_FILE -/* Yes, include the user defines in tx_user.h. The defines in this file may +/* Yes, include the user defines in tx_user.h. The defines in this file may alternately be defined on the command line. */ #include "tx_user.h" @@ -102,7 +89,7 @@ #include <string.h> -/* Define ThreadX basic types for this port. */ +/* Define ThreadX basic types for this port. */ #define VOID void typedef char CHAR; @@ -138,8 +125,8 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_STACK_SIZE 2048 /* Default timer thread stack size */ #endif -#ifndef TX_TIMER_THREAD_PRIORITY -#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ +#ifndef TX_TIMER_THREAD_PRIORITY +#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif @@ -149,8 +136,8 @@ typedef unsigned short USHORT; #define TX_INT_DISABLE_MASK 0x00000000 /* Disable all interrupts */ -/* Define the clock source for trace event entry time stamp. The following two item are port specific. - For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock +/* Define the clock source for trace event entry time stamp. The following two item are port specific. + For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock source constants would be: #define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024) @@ -195,7 +182,7 @@ void _tx_initialize_start_interrupts(void); #define TX_PORT_SPECIFIC_PRE_SCHEDULER_INITIALIZATION _tx_initialize_start_interrupts(); -/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is +/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING define is negated, thereby forcing the stack fill which is necessary for the stack checking @@ -209,15 +196,15 @@ void _tx_initialize_start_interrupts(void); /* Define the TX_THREAD control block extensions for this port. The main reason - for the multiple macros is so that backward compatibility can be maintained with + for the multiple macros is so that backward compatibility can be maintained with existing ThreadX kernel awareness modules. */ #define TX_THREAD_EXTENSION_0 VOID *__mw_threadx_tls; \ int __mw_errnum; \ VOID (*__mw_thread_exit)(struct TX_THREAD_STRUCT *); -#define TX_THREAD_EXTENSION_1 -#define TX_THREAD_EXTENSION_2 -#define TX_THREAD_EXTENSION_3 +#define TX_THREAD_EXTENSION_1 +#define TX_THREAD_EXTENSION_2 +#define TX_THREAD_EXTENSION_3 /* Define the port extensions of the remaining ThreadX objects. */ @@ -231,11 +218,11 @@ void _tx_initialize_start_interrupts(void); #define TX_TIMER_EXTENSION -/* Define the user extension field of the thread control block. Nothing +/* Define the user extension field of the thread control block. Nothing additional is needed for this port so it is defined as white space. */ #ifndef TX_THREAD_USER_EXTENSION -#define TX_THREAD_USER_EXTENSION +#define TX_THREAD_USER_EXTENSION #endif @@ -244,16 +231,16 @@ void _tx_initialize_start_interrupts(void); #if __HIGHC__ -/* The MetaWare thread safe C/C++ runtime library needs space to +/* The MetaWare thread safe C/C++ runtime library needs space to store thread specific information. In addition, a function pointer - is also supplied so that certain thread-specific resources may be + is also supplied so that certain thread-specific resources may be released upon thread termination and/or thread completion. */ #define TX_THREAD_CREATE_EXTENSION(thread_ptr) \ thread_ptr -> __mw_threadx_tls = 0; \ thread_ptr -> __mw_errnum = 0; \ - thread_ptr -> __mw_thread_exit = TX_NULL; -#define TX_THREAD_DELETE_EXTENSION(thread_ptr) + thread_ptr -> __mw_thread_exit = TX_NULL; +#define TX_THREAD_DELETE_EXTENSION(thread_ptr) #define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) \ if (thread_ptr -> __mw_thread_exit) \ (thread_ptr -> __mw_thread_exit) (thread_ptr); @@ -263,10 +250,10 @@ void _tx_initialize_start_interrupts(void); #else -#define TX_THREAD_CREATE_EXTENSION(thread_ptr) -#define TX_THREAD_DELETE_EXTENSION(thread_ptr) -#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) -#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) +#define TX_THREAD_CREATE_EXTENSION(thread_ptr) +#define TX_THREAD_DELETE_EXTENSION(thread_ptr) +#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) +#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) #endif @@ -293,9 +280,9 @@ void _tx_initialize_start_interrupts(void); #define TX_TIMER_DELETE_EXTENSION(timer_ptr) -/* Define ThreadX interrupt lockout and restore macros for protection on - access of critical kernel information. The restore interrupt macro must - restore the interrupt posture of the running thread prior to the value +/* Define ThreadX interrupt lockout and restore macros for protection on + access of critical kernel information. The restore interrupt macro must + restore the interrupt posture of the running thread prior to the value present prior to the disable macro. In most cases, the save area macro is used to define a local function save area for the disable and restore macros. */ @@ -334,8 +321,8 @@ VOID tx_thread_register_bank_assign(VOID *thread_ptr, UINT register_bank); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) 2024 Microsoft Corporation. * ThreadX ARC_HS/MetaWare Version 6.4.2 *"; +CHAR _tx_version_id[] = + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX ARC_HS/MetaWare Version 6.5.0.202601 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/arc_hs/metaware/readme_threadx.txt b/ports/arc_hs/metaware/readme_threadx.txt index c763b850..506d89cc 100644 --- a/ports/arc_hs/metaware/readme_threadx.txt +++ b/ports/arc_hs/metaware/readme_threadx.txt @@ -2,70 +2,70 @@ Using the MetaWare Tools -1. Open the Azure RTOS Workspace +1. Open the Azure RTOS Workspace -In order to build the ThreadX library and the ThreadX demonstration first load -the Azure RTOS Workspace, which is located inside the "example_build" directory. +In order to build the ThreadX library and the ThreadX demonstration first load +the Azure RTOS Workspace, which is located inside the "example_build" directory. 2. Building the ThreadX run-time Library -Building the ThreadX library is easy; simply select the ThreadX library project -file "tx" and then select the build button. You should now observe the compilation -and assembly of the ThreadX library. This project build produces the ThreadX +Building the ThreadX library is easy; simply select the ThreadX library project +file "tx" and then select the build button. You should now observe the compilation +and assembly of the ThreadX library. This project build produces the ThreadX library file tx.a. 3. Demonstration System The ThreadX demonstration is designed to execute under the MetaWare ARC HS -simulation. The instructions that follow describe how to get the ThreadX -demonstration running. +simulation. The instructions that follow describe how to get the ThreadX +demonstration running. -Building the demonstration is easy; simply select the demonstration project file -"sample_threadx." At this point, select the build button and observe the -compilation, assembly, and linkage of the ThreadX demonstration application. +Building the demonstration is easy; simply select the demonstration project file +"sample_threadx." At this point, select the build button and observe the +compilation, assembly, and linkage of the ThreadX demonstration application. After the demonstration is built, click on the "Debug" button and it will automatically launch a pre-configured connection to the ARC HS simulator. -You are now ready to execute the ThreadX demonstration system. Select -breakpoints and data watches to observe the execution of the sample_threadx.c +You are now ready to execute the ThreadX demonstration system. Select +breakpoints and data watches to observe the execution of the sample_threadx.c application. 4. System Initialization -The system entry point using the MetaWare tools is at the label _start. -This is defined within the crt1.s file supplied by MetaWare. In addition, +The system entry point using the MetaWare tools is at the label _start. +This is defined within the crt1.s file supplied by MetaWare. In addition, this is where all static and global preset C variable initialization processing is called from. After the MetaWare startup function completes, ThreadX initialization is called. The main initialization function is _tx_initialize_low_level and -is located in the file tx_initialize_low_level.s. This function is -responsible for setting up various system data structures, and interrupt +is located in the file tx_initialize_low_level.s. This function is +responsible for setting up various system data structures, and interrupt vectors. -By default free memory is assumed to start at the section .free_memory -which is referenced in tx_initialize_low_level.s and located in the -linker control file after all the linker defined RAM addresses. This is +By default free memory is assumed to start at the section .free_memory +which is referenced in tx_initialize_low_level.s and located in the +linker control file after all the linker defined RAM addresses. This is the address passed to the application definition function, tx_application_define. 5. Register Usage and Stack Frames -The ARC compiler assumes that registers r0-r12 are scratch registers for -each function. All other registers used by a C function must be preserved -by the function. ThreadX takes advantage of this in situations where a -context switch happens as a result of making a ThreadX service call (which -is itself a C function). In such cases, the saved context of a thread is +The ARC compiler assumes that registers r0-r12 are scratch registers for +each function. All other registers used by a C function must be preserved +by the function. ThreadX takes advantage of this in situations where a +context switch happens as a result of making a ThreadX service call (which +is itself a C function). In such cases, the saved context of a thread is only the non-scratch registers. The following defines the saved context stack frames for context switches that occur as a result of interrupt handling or from thread-level API calls. All suspended threads have one of these two types of stack frames. The top -of the suspended thread's stack is pointed to by tx_thread_stack_ptr in the +of the suspended thread's stack is pointed to by tx_thread_stack_ptr in the associated thread control block TX_THREAD. @@ -114,26 +114,26 @@ associated thread control block TX_THREAD. 0x9C bta 0xA0 point of interrupt 0xA4 STATUS32 - + 6. Improving Performance -The distribution version of ThreadX is built without any compiler -optimizations. This makes it easy to debug because you can trace or set -breakpoints inside of ThreadX itself. Of course, this costs some -performance. To make it run faster, you can change the build_threadx.bat -file to remove the -g option and enable all compiler optimizations. +The distribution version of ThreadX is built without any compiler +optimizations. This makes it easy to debug because you can trace or set +breakpoints inside of ThreadX itself. Of course, this costs some +performance. To make it run faster, you can change the build_threadx.bat +file to remove the -g option and enable all compiler optimizations. -In addition, you can eliminate the ThreadX basic API error checking by -compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING -defined. +In addition, you can eliminate the ThreadX basic API error checking by +compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING +defined. 7. Interrupt Handling ThreadX provides complete and high-performance interrupt handling for the -ARC HS processor, including support for software interrupts and fast +ARC HS processor, including support for software interrupts and fast hardware interrupts. 7.1 Software Interrupt Handling @@ -147,25 +147,25 @@ _tx_interrupt_x: st blink, [sp, 16] ; Save blink (blink must be saved before _tx_thread_context_save) bl _tx_thread_context_save ; Save interrupt context ; -; /* Application ISR processing goes here! Your ISR can be written in +; /* Application ISR processing goes here! Your ISR can be written in ; assembly language or in C. If it is written in C, you must allocate -; 16 bytes of stack space before it is called. This must also be -; recovered once your C ISR return. An example of this is shown below. +; 16 bytes of stack space before it is called. This must also be +; recovered once your C ISR return. An example of this is shown below. ; ; If the ISR is written in assembly language, only the compiler scratch -; registers are available for use without saving/restoring (r0-r12). +; registers are available for use without saving/restoring (r0-r12). ; If use of additional registers are required they must be saved and ; restored. */ ; bl.d your_ISR_written_in_C ; Call an ISR written in C sub sp, sp, 16 ; Allocate stack space (delay slot) add sp, sp, 16 ; Recover stack space - + ; b _tx_thread_context_restore ; Restore interrupt context -The application handles interrupts directly, which necessitates all register +The application handles interrupts directly, which necessitates all register preservation by the application's ISR. ISRs that do not use the ThreadX _tx_thread_context_save and _tx_thread_context_restore routines are not allowed access to the ThreadX API. In addition, custom application ISRs @@ -173,11 +173,11 @@ should be higher priority than all ThreadX-managed ISRs. 7.2 Fast Interrupt Handling -ThreadX supports the ARC HS fast interrupt processing. It is assumed that +ThreadX supports the ARC HS fast interrupt processing. It is assumed that multiple register banks are available and the ARC HS processor automatically -uses register bank 1 as the fast interrupt register bank. +uses register bank 1 as the fast interrupt register bank. -In order to use fast interrupts with register bank 1, the interrupt desired +In order to use fast interrupts with register bank 1, the interrupt desired must have priority 0 and the application must call the following ThreadX API to setup register bank 1: @@ -190,7 +190,7 @@ look like: tx_initialize_fast_interrupt_setup(&fast_interrupt_stack[1020]); -As for the fast interrupt ISR, the following template should be used for +As for the fast interrupt ISR, the following template should be used for ARC HS fast interrupts managed by ThreadX: .global _tx_fast_interrupt_x @@ -207,28 +207,28 @@ _tx_fast_interrupt_x: 8. ThreadX Timer Interrupt -ThreadX requires a periodic interrupt source to manage all time-slicing, -thread sleeps, timeouts, and application timers. Without such a timer -interrupt source, these services are not functional but the remainder of +ThreadX requires a periodic interrupt source to manage all time-slicing, +thread sleeps, timeouts, and application timers. Without such a timer +interrupt source, these services are not functional but the remainder of ThreadX will still run. By default, the ThreadX timer interrupt is mapped to the ARC HS auxiliary timer 0, which generates low priority interrupts on interrupt vector 16. -It is easy to change the timer interrupt source and priority by changing the +It is easy to change the timer interrupt source and priority by changing the setup code in tx_initialize_low_level.s. 9. Thread Hardware Register Bank Context -ThreadX supports the use of hardware register banks on the ARC HS. A hardware -register bank may be associated with a specific application thread via the +ThreadX supports the use of hardware register banks on the ARC HS. A hardware +register bank may be associated with a specific application thread via the following API: void tx_thread_register_bank_assign(TX_THREAD *thread_ptr, register_bank); This API is assumed to be called from initialization (interrupts are locked out -and execution is from register bank 0) and after the specified thread has been -created. This API assumes the register bank number is correct, i.e., a valid +and execution is from register bank 0) and after the specified thread has been +created. This API assumes the register bank number is correct, i.e., a valid register bank greater than 0 and one that hasn't been used for another thread. Note: if fast interrupts are used, register bank 1 must also not be used. In this diff --git a/ports/arc_hs/metaware/src/tx_initialize_fast_interrupt_setup.s b/ports/arc_hs/metaware/src/tx_initialize_fast_interrupt_setup.s index c4aa7114..c757508b 100644 --- a/ports/arc_hs/metaware/src/tx_initialize_fast_interrupt_setup.s +++ b/ports/arc_hs/metaware/src/tx_initialize_fast_interrupt_setup.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Initialize */ ;/** */ @@ -22,10 +22,10 @@ #include "tx_user.h" #endif -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_initialize_fast_interrupt_setup ARC_HS/MetaWare */ ;/* 6.2.1 */ ;/* AUTHOR */ @@ -33,35 +33,26 @@ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function initializes register bank 1 for fast interrupt use. */ -;/* The initialization includes setting the stack pointer to the value */ -;/* supplied by the caller. */ -;/* */ -;/* INPUT */ -;/* */ +;/* */ +;/* This function initializes register bank 1 for fast interrupt use. */ +;/* The initialization includes setting the stack pointer to the value */ +;/* supplied by the caller. */ +;/* */ +;/* INPUT */ +;/* */ ;/* stack_ptr Pointer to stack for bank 1 */ -;/* */ -;/* OUTPUT */ -;/* */ +;/* */ +;/* OUTPUT */ +;/* */ ;/* None */ -;/* */ -;/* CALLS */ -;/* */ +;/* */ +;/* CALLS */ +;/* */ ;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ +;/* CALLED BY */ +;/* */ +;/* Application */ ;/* */ ;/**************************************************************************/ ;VOID _tx_initialize_fast_interrupt_setup(VOID *stack_ptr) @@ -71,7 +62,7 @@ _tx_initialize_fast_interrupt_setup: ; ; /* Assume this routine is being called from initialization, with interrupts -; disabled and from register bank 0. Also assume that the stack pointer +; disabled and from register bank 0. Also assume that the stack pointer ; input is valid, i.e., there is no error checking on the validity of ; register_bank. */ ; diff --git a/ports/arc_hs/metaware/src/tx_thread_context_fast_restore.s b/ports/arc_hs/metaware/src/tx_thread_context_fast_restore.s index 089f13de..d2f5284c 100644 --- a/ports/arc_hs/metaware/src/tx_thread_context_fast_restore.s +++ b/ports/arc_hs/metaware/src/tx_thread_context_fast_restore.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -23,11 +23,11 @@ #endif .equ BTA, 0x412 - -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_context_fast_restore ARC_HS/MetaWare */ ;/* 6.2.1 */ ;/* AUTHOR */ @@ -35,43 +35,34 @@ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function restores the fast interrupt context, which can be a */ -;/* nesting condition on a non-fast ISR, an idle system restore, a */ -;/* restore of an interrupted thread, and a preemption of an interrupted*/ -;/* thread. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling routine */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs Interrupt Service Routines */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ +;/* This function restores the fast interrupt context, which can be a */ +;/* nesting condition on a non-fast ISR, an idle system restore, a */ +;/* restore of an interrupted thread, and a preemption of an interrupted*/ +;/* thread. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_thread_schedule Thread scheduling routine */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs Interrupt Service Routines */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_fast_restore(VOID) ;{ .global _tx_thread_context_fast_restore - .type _tx_thread_context_fast_restore, @function + .type _tx_thread_context_fast_restore, @function _tx_thread_context_fast_restore: ; ; /* Note: it is assumed that the stack pointer is in the same position now as @@ -98,7 +89,7 @@ _tx_thread_context_fast_restore: ; ; /* Interrupts are nested. */ ; -; /* Just recover the saved registers and return to the point of +; /* Just recover the saved registers and return to the point of ; interrupt. */ ; @@ -160,7 +151,7 @@ __tx_thread_preempt_restore: st r0, [sp, 132] ; Temporarily save r0 mov r0, 3 ; Build hardware interrupt stack type st r0, [sp, 0] ; Setup interrupt stack type - + .ifndef TX_DISABLE_LP lr r0, [LP_START] ; Pickup LP_START st r0, [sp, 4] ; Save LP_START @@ -186,7 +177,7 @@ __tx_thread_preempt_restore: kflag ilink ; Move back to register bank 0 b __tx_preempt_save_done ; Done, finished with preemption save -__tx_software_interrupt_context: +__tx_software_interrupt_context: st ilink, [sp, 0] ; Save ilink (point of interrupt) st r3, [sp, 4] ; Save status32 mov ilink, sp ; Pass the information back to the other register bank via ilink @@ -223,7 +214,7 @@ __tx_software_interrupt_context: st r1, [sp, 128] ; Save r1 st r0, [sp, 132] ; Save r0 st r30, [sp, 136] ; Save r30 - + .ifndef TX_DISABLE_LP lr r10, [LP_START] ; Pickup LP_START lr r9, [LP_END] ; Pickup LP_END diff --git a/ports/arc_hs/metaware/src/tx_thread_context_fast_save.s b/ports/arc_hs/metaware/src/tx_thread_context_fast_save.s index d9a80463..f54176d4 100644 --- a/ports/arc_hs/metaware/src/tx_thread_context_fast_save.s +++ b/ports/arc_hs/metaware/src/tx_thread_context_fast_save.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -22,10 +22,10 @@ #include "tx_user.h" #endif -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_context_fast_save ARC_HS/MetaWare */ ;/* 6.2.1 */ ;/* AUTHOR */ @@ -33,46 +33,37 @@ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function saves the context of an executing thread in the */ -;/* beginning of fast interrupt processing. The function assumes that */ -;/* fast interrupts are enabled (priority 0) and multiple register */ -;/* banks are available. In this case, register bank 1 is reserved by */ -;/* hardware for fast interrupts. Additional assumptions include that */ -;/* there will be no nested fast interrupts and the LP_START, LP_END, */ -;/* and LP_COUNT registers are not used in the application's fast */ -;/* interrupt ISR. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ +;/* This function saves the context of an executing thread in the */ +;/* beginning of fast interrupt processing. The function assumes that */ +;/* fast interrupts are enabled (priority 0) and multiple register */ +;/* banks are available. In this case, register bank 1 is reserved by */ +;/* hardware for fast interrupts. Additional assumptions include that */ +;/* there will be no nested fast interrupts and the LP_START, LP_END, */ +;/* and LP_COUNT registers are not used in the application's fast */ +;/* interrupt ISR. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_fast_save(VOID) ;{ .global _tx_thread_context_fast_save - .type _tx_thread_context_fast_save, @function + .type _tx_thread_context_fast_save, @function _tx_thread_context_fast_save: ; ; /* Increment nested interrupt count. */ diff --git a/ports/arc_hs/metaware/src/tx_thread_context_restore.s b/ports/arc_hs/metaware/src/tx_thread_context_restore.s index 79a786c5..23d675a8 100644 --- a/ports/arc_hs/metaware/src/tx_thread_context_restore.s +++ b/ports/arc_hs/metaware/src/tx_thread_context_restore.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -56,19 +56,6 @@ ;/* */ ;/* ISRs Interrupt Service Routines */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 10-15-2021 Andres Mlinar Modified comment(s), and */ -;/* r25/r30 are caller saved, */ -;/* use schedule_reenter, */ -;/* resulting in version 6.1.9 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ -;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_restore(VOID) ;{ @@ -249,7 +236,7 @@ __tx_thread_preempt_restore: b __tx_preempt_save_done ; Done, finished with preemption save nop -__tx_software_interrupt_context: +__tx_software_interrupt_context: mov r6, 1 ; Build interrupt stack type st r6, [r7, 0] ; Setup interrupt stack type st fp, [r7, 24] ; Save fp diff --git a/ports/arc_hs/metaware/src/tx_thread_context_save.s b/ports/arc_hs/metaware/src/tx_thread_context_save.s index 9fcc82e6..27ee25b5 100644 --- a/ports/arc_hs/metaware/src/tx_thread_context_save.s +++ b/ports/arc_hs/metaware/src/tx_thread_context_save.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -55,18 +55,6 @@ ;/* */ ;/* ISRs */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 10-15-2021 Andres Mlinar Modified comment(s), and */ -;/* r25/r30 are caller saved, */ -;/* resulting in version 6.1.9 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ -;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_save(VOID) ;{ diff --git a/ports/arc_hs/metaware/src/tx_thread_interrupt_control.s b/ports/arc_hs/metaware/src/tx_thread_interrupt_control.s index 9d3dacae..3d18b9a1 100644 --- a/ports/arc_hs/metaware/src/tx_thread_interrupt_control.s +++ b/ports/arc_hs/metaware/src/tx_thread_interrupt_control.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -52,17 +52,6 @@ ;/* */ ;/* Application Code */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 04-02-2021 Andres Mlinar Modified comments, */ -;/* resulting in version 6.1.6 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ -;/* */ ;/**************************************************************************/ ;UINT _tx_thread_interrupt_control(UINT new_posture) ;{ diff --git a/ports/arc_hs/metaware/src/tx_thread_register_bank_assign.s b/ports/arc_hs/metaware/src/tx_thread_register_bank_assign.s index 7b9d1114..f9876c89 100644 --- a/ports/arc_hs/metaware/src/tx_thread_register_bank_assign.s +++ b/ports/arc_hs/metaware/src/tx_thread_register_bank_assign.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -22,10 +22,10 @@ #include "tx_user.h" #endif -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_register_bank_assign ARC_HS/MetaWare */ ;/* 6.2.1 */ ;/* AUTHOR */ @@ -33,37 +33,28 @@ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ +;/* */ ;/* This function builds a stack frame on the supplied thread's stack. */ ;/* The stack frame results in a fake interrupt return to the supplied */ -;/* function pointer. */ -;/* */ -;/* INPUT */ -;/* */ +;/* function pointer. */ +;/* */ +;/* INPUT */ +;/* */ ;/* thread_ptr Pointer to thread control blk */ ;/* register_bank Register bank number */ -;/* (1 through max-1) */ -;/* */ -;/* OUTPUT */ -;/* */ +;/* (1 through max-1) */ +;/* */ +;/* OUTPUT */ +;/* */ ;/* None */ -;/* */ -;/* CALLS */ -;/* */ +;/* */ +;/* CALLS */ +;/* */ ;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ +;/* CALLED BY */ +;/* */ +;/* Application */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_register_bank_assign(VOID *thread_ptr, UINT register_bank) @@ -75,9 +66,9 @@ _tx_thread_register_bank_assign: ; /* Assume this routine is being called from initialization, with interrupts ; disabled and from register bank 0. Also assume that the thread pointer and ; register bank input is valid, i.e., there is no error checking on the validity of -; the thread pointer or the register_bank. +; the thread pointer or the register_bank. ; -; It is worth noting that if fast interrupts are being used, register bank 1 +; It is worth noting that if fast interrupts are being used, register bank 1 ; is reserved for the fast interrupt processing, so thread register bank assignments ; should begin at bank 2. */ ; @@ -101,7 +92,7 @@ _tx_thread_register_bank_assign: bclr r3, r3, 17 ; bclr r3, r3, 18 ; kflag r3 ; Move back to register bank 0 - mov r5, 3 ; Build type for hardware interrupt context + mov r5, 3 ; Build type for hardware interrupt context j_s.d [blink] ; Return to caller st r5, [r4, 0] ; Set stack frame type ;} diff --git a/ports/arc_hs/metaware/src/tx_thread_schedule.s b/ports/arc_hs/metaware/src/tx_thread_schedule.s index 954ec371..2651cb48 100644 --- a/ports/arc_hs/metaware/src/tx_thread_schedule.s +++ b/ports/arc_hs/metaware/src/tx_thread_schedule.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -57,18 +57,6 @@ ;/* _tx_thread_system_return Return to system from thread */ ;/* _tx_thread_context_restore Restore thread's context */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 10-15-2021 Andres Mlinar Modified comment(s), */ -;/* use schedule reenter, */ -;/* resulting in version 6.1.9 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ -;/* */ ;/**************************************************************************/ ;VOID _tx_thread_schedule(VOID) ;{ @@ -149,11 +137,11 @@ __tx_thread_schedule_loop: ld r2, [sp, 4] ; Pickup status32 kflag r2 ; Enter the proper register bank ld r3, [sp, 8] ; Pickup the saved interrupt posture - add sp, sp, 12 ; Recover small stack frame - j_s.d [blink] ; Return to thread and restore flags + add sp, sp, 12 ; Recover small stack frame + j_s.d [blink] ; Return to thread and restore flags seti r3 ; Recover STATUS32 -__tx_hw_interrupt_restore: +__tx_hw_interrupt_restore: mov r0, 0x2 ; Pretend level 1 interrupt is returning sr r0, [AUX_IRQ_ACT] ; @@ -163,10 +151,10 @@ __tx_hw_interrupt_restore: sr r0, [LP_START] ; Restore LP_START ld r1, [sp, 8] ; Recover LP_END sr r1, [LP_END] ; Restore LP_END - ld r2, [sp, 12] ; Recover LP_COUNT + ld r2, [sp, 12] ; Recover LP_COUNT mov LP_COUNT, r2 .endif - + .ifdef TX_ENABLE_ACC ld r58, [sp, 140] ; Recover r58 ld r59, [sp, 144] ; Recover r59 @@ -180,7 +168,7 @@ __tx_hw_interrupt_restore: kflag r0 ; Switch to the proper register bank add sp, sp, 160 ; Recover the interrupt stack frame rtie ; Return to point of interrupt - + __tx_restore_non_hw_context: ; ; /* Determine if an interrupt frame or a synchronous task suspension frame diff --git a/ports/arc_hs/metaware/src/tx_thread_stack_build.s b/ports/arc_hs/metaware/src/tx_thread_stack_build.s index 8ef5dc98..db4becfc 100644 --- a/ports/arc_hs/metaware/src/tx_thread_stack_build.s +++ b/ports/arc_hs/metaware/src/tx_thread_stack_build.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -57,17 +57,6 @@ ;/* */ ;/* _tx_thread_create Create thread service */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 04-02-2021 Andres Mlinar Modified comments, */ -;/* resulting in version 6.1.6 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ -;/* */ ;/**************************************************************************/ ;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) ;{ diff --git a/ports/arc_hs/metaware/src/tx_thread_system_return.s b/ports/arc_hs/metaware/src/tx_thread_system_return.s index aec09bb4..453682e4 100644 --- a/ports/arc_hs/metaware/src/tx_thread_system_return.s +++ b/ports/arc_hs/metaware/src/tx_thread_system_return.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -54,18 +54,6 @@ ;/* */ ;/* ThreadX components */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 10-15-2021 Andres Mlinar Modified comments, */ -;/* use schedule reenter, */ -;/* resulting in version 6.1.9 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ -;/* */ ;/**************************************************************************/ ;VOID _tx_thread_system_return(VOID) ;{ @@ -87,7 +75,7 @@ _tx_thread_system_return: mov r4, 2 ; Build solicited hardward stack frame type st r4, [sp, 0] ; Set stack frame type st r3, [sp, 4] ; Save status32 - st r2, [sp, 8] ; Save interrupt posture + st r2, [sp, 8] ; Save interrupt posture st sp, [r0, 8] ; Save thread's stack pointer bclr r3, r3, 16 ; Build register bank 0 value bclr r3, r3, 17 ; @@ -120,7 +108,7 @@ __tx_software_context: st r30, [sp, 72] ; Save r30 st sp, [r0, 8] ; Save thread's stack pointer __tx_save_done: -; +; .ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY ; ; /* Call the thread exit function to indicate the thread is no longer executing. */ diff --git a/ports/arc_hs/metaware/src/tx_timer_interrupt.s b/ports/arc_hs/metaware/src/tx_timer_interrupt.s index 59410fdc..6f6aa521 100644 --- a/ports/arc_hs/metaware/src/tx_timer_interrupt.s +++ b/ports/arc_hs/metaware/src/tx_timer_interrupt.s @@ -1,10 +1,10 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ @@ -58,23 +58,6 @@ ;/* */ ;/* interrupt vector */ ;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ -;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -;/* 12-31-2020 Scott Larson Modified comment(s), remove */ -;/* unneeded load of */ -;/* _tx_thread_preempt_disable, */ -;/* resulting in version 6.1.3 */ -;/* 10-15-2021 Yuxin Zhou Modified comment(s), and */ -;/* fixed possible race */ -;/* condition on preemption */ -;/* resulting in version 6.1.9 */ -;/* 03-08-2023 Cindy Deng Modified comment(s), added */ -;/* #include tx_user.h, */ -;/* resulting in version 6.2.1 */ -;/* */ ;/**************************************************************************/ ;VOID _tx_timer_interrupt(VOID) ;{ |