Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel

Merge changes ahead of the v6.5.0.202601 release

5 files changed, 100 insertions, 106 deletions

diff --git a/ports/arm11/gnu/example_build/crt0.S b/ports/arm11/gnu/example_build/crt0.S
index aa0f3239..56b6c958 100644
--- a/ports/arm11/gnu/example_build/crt0.S
+++ b/ports/arm11/gnu/example_build/crt0.S
@@ -26,13 +26,13 @@ _mainCRTStartup:
     mov     a2, #0          /* Second arg: fill value */
     mov fp, a2          /* Null frame pointer */
     mov r7, a2          /* Null frame pointer for Thumb */
-    
+
     ldr a1, .LC1        /* First arg: start of memory block */
-    ldr a3, .LC2    
+    ldr a3, .LC2
     sub a3, a3, a1      /* Third arg: length of block */
-    
 
-    
+
+
         bl      memset
     mov r0, #0      /*  no arguments  */
     mov r1, #0      /*  no argv either */
@@ -48,15 +48,15 @@ _mainCRTStartup:
 /*        bl      init */
     mov r0, r4
     mov r1, r5
-#endif  
+#endif
         bl      main
 
         bl      exit         /* Should not return.  */
 
-    
-    /* For Thumb, constants must be after the code since only 
+
+    /* For Thumb, constants must be after the code since only
        positive offsets are supported for PC relative addresses.  */
-    
+
     .align 0
 .LC0:
 .LC1:
diff --git a/ports/arm11/gnu/example_build/reset.S b/ports/arm11/gnu/example_build/reset.S
index a11c826a..5d05258b 100644
--- a/ports/arm11/gnu/example_build/reset.S
+++ b/ports/arm11/gnu/example_build/reset.S
@@ -1,18 +1,18 @@
 @/***************************************************************************
-@ * Copyright (c) 2024 Microsoft Corporation 
-@ * 
+@ * Copyright (c) 2024 Microsoft Corporation
+@ *
 @ * This program and the accompanying materials are made available under the
 @ * terms of the MIT License which is available at
 @ * https://opensource.org/licenses/MIT.
-@ * 
+@ *
 @ * SPDX-License-Identifier: MIT
 @ **************************************************************************/
 @
 @
 @/**************************************************************************/
 @/**************************************************************************/
-@/**                                                                       */ 
-@/** ThreadX Component                                                     */ 
+@/**                                                                       */
+@/** ThreadX Component                                                     */
 @/**                                                                       */
 @/**   Initialize                                                          */
 @/**                                                                       */
@@ -65,11 +65,11 @@ SWI:
     .word  __tx_swi_interrupt               @ Software interrupt handler
 PREFETCH:
     .word  __tx_prefetch_handler            @ Prefetch exception handler
-ABORT:                             
+ABORT:
     .word  __tx_abort_handler               @ Abort exception handler
-RESERVED:                            
+RESERVED:
     .word  __tx_reserved_handler            @ Reserved exception handler
-IRQ:                                  
+IRQ:
     .word  __tx_irq_handler                 @ IRQ interrupt handler
 FIQ:
     .word  __tx_fiq_handler                 @ FIQ interrupt handler
diff --git a/ports/arm11/gnu/example_build/sample_threadx.c b/ports/arm11/gnu/example_build/sample_threadx.c
index 418ec634..8c61de06 100644
--- a/ports/arm11/gnu/example_build/sample_threadx.c
+++ b/ports/arm11/gnu/example_build/sample_threadx.c
@@ -1,5 +1,5 @@
 /* This is a small demo of the high-performance ThreadX kernel.  It includes examples of eight
-   threads of different priorities, using a message queue, semaphore, mutex, event flags group, 
+   threads of different priorities, using a message queue, semaphore, mutex, event flags group,
    byte pool, and block pool.  */
 
 #include "tx_api.h"
@@ -80,42 +80,42 @@ CHAR    *pointer = TX_NULL;
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
 
     /* Create the main thread.  */
-    tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0,
+            pointer, DEMO_STACK_SIZE,
             1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
 
 
     /* Allocate the stack for thread 1.  */
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
 
-    /* Create threads 1 and 2. These threads pass information through a ThreadX 
+    /* Create threads 1 and 2. These threads pass information through a ThreadX
        message queue.  It is also interesting to note that these threads have a time
        slice.  */
-    tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1,
+            pointer, DEMO_STACK_SIZE,
             16, 16, 4, TX_AUTO_START);
 
     /* Allocate the stack for thread 2.  */
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
 
-    tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2,
+            pointer, DEMO_STACK_SIZE,
             16, 16, 4, TX_AUTO_START);
 
     /* Allocate the stack for thread 3.  */
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
 
-    /* Create threads 3 and 4.  These threads compete for a ThreadX counting semaphore.  
+    /* Create threads 3 and 4.  These threads compete for a ThreadX counting semaphore.
        An interesting thing here is that both threads share the same instruction area.  */
-    tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3,
+            pointer, DEMO_STACK_SIZE,
             8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
 
     /* Allocate the stack for thread 4.  */
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
 
-    tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4,
+            pointer, DEMO_STACK_SIZE,
             8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
 
     /* Allocate the stack for thread 5.  */
@@ -123,23 +123,23 @@ CHAR    *pointer = TX_NULL;
 
     /* Create thread 5.  This thread simply pends on an event flag which will be set
        by thread_0.  */
-    tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5,
+            pointer, DEMO_STACK_SIZE,
             4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
 
     /* Allocate the stack for thread 6.  */
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
 
     /* Create threads 6 and 7.  These threads compete for a ThreadX mutex.  */
-    tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6,
+            pointer, DEMO_STACK_SIZE,
             8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
 
     /* Allocate the stack for thread 7.  */
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
 
-    tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7,  
-            pointer, DEMO_STACK_SIZE, 
+    tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7,
+            pointer, DEMO_STACK_SIZE,
             8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
 
     /* Allocate the message queue.  */
@@ -242,11 +242,11 @@ UINT    status;
         /* Retrieve a message from the queue.  */
         status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER);
 
-        /* Check completion status and make sure the message is what we 
+        /* Check completion status and make sure the message is what we
            expected.  */
         if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
             break;
-        
+
         /* Otherwise, all is okay.  Increment the received message count.  */
         thread_2_messages_received++;
     }
@@ -305,7 +305,7 @@ ULONG   actual_flags;
         thread_5_counter++;
 
         /* Wait for event flag 0.  */
-        status =  tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, 
+        status =  tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR,
                                                 &actual_flags, TX_WAIT_FOREVER);
 
         /* Check status.  */
@@ -358,7 +358,7 @@ UINT    status;
         if (status != TX_SUCCESS)
             break;
 
-        /* Release the mutex again.  This will actually 
+        /* Release the mutex again.  This will actually
            release ownership since it was obtained twice.  */
         status =  tx_mutex_put(&mutex_0);
 
diff --git a/ports/arm11/gnu/example_build/sample_threadx.ld b/ports/arm11/gnu/example_build/sample_threadx.ld
index 3dea4e1c..e940b2b8 100644
--- a/ports/arm11/gnu/example_build/sample_threadx.ld
+++ b/ports/arm11/gnu/example_build/sample_threadx.ld
@@ -7,7 +7,7 @@ OUTPUT_ARCH(arm)
 SECTIONS
 {
   . = 0x00000000;
-    
+
   .vectors      : {reset.o(.text) }
 
   /* Read-only sections, merged into text segment: */
@@ -94,8 +94,8 @@ SECTIONS
     *(.gnu.linkonce.t*)
     *(.glue_7t) *(.glue_7)
   } =0
-  .init          : 
-  { 
+  .init          :
+  {
     KEEP (*(.init))
   } =0
   _etext = .;
@@ -120,7 +120,7 @@ SECTIONS
   .data1   : { *(.data1) }
   .eh_frame : { KEEP (*(.eh_frame)) }
   .gcc_except_table : { *(.gcc_except_table) }
-  .ctors   : 
+  .ctors   :
   {
     /* gcc uses crtbegin.o to find the start of
        the constructors, so we make sure it is
@@ -153,9 +153,9 @@ SECTIONS
   /* We want the small data sections together, so single-instruction offsets
      can access them all, and initialized data all before uninitialized, so
      we can shorten the on-disk segment size.  */
-  .sdata     : 
+  .sdata     :
   {
-    *(.sdata) 
+    *(.sdata)
     *(.sdata.*)
     *(.gnu.linkonce.s.*)
   }
@@ -191,7 +191,7 @@ SECTIONS
 
     _stack_bottom = ABSOLUTE(.) ;
 
-    /* Allocate room for stack. This must be big enough for the IRQ, FIQ, and 
+    /* Allocate room for stack. This must be big enough for the IRQ, FIQ, and
        SYS stack if nested interrupts are enabled.  */
     .   =  ALIGN(8) ;
     .   += 4096 ;
diff --git a/ports/arm11/gnu/example_build/tx_initialize_low_level.S b/ports/arm11/gnu/example_build/tx_initialize_low_level.S
index f7c4617a..887ae4e0 100644
--- a/ports/arm11/gnu/example_build/tx_initialize_low_level.S
+++ b/ports/arm11/gnu/example_build/tx_initialize_low_level.S
@@ -1,18 +1,18 @@
 @/***************************************************************************
-@ * Copyright (c) 2024 Microsoft Corporation 
-@ * 
+@ * Copyright (c) 2024 Microsoft Corporation
+@ *
 @ * This program and the accompanying materials are made available under the
 @ * terms of the MIT License which is available at
 @ * https://opensource.org/licenses/MIT.
-@ * 
+@ *
 @ * SPDX-License-Identifier: MIT
 @ **************************************************************************/
 @
 @
 @/**************************************************************************/
 @/**************************************************************************/
-@/**                                                                       */ 
-@/** ThreadX Component                                                     */ 
+@/**                                                                       */
+@/** ThreadX Component                                                     */
 @/**                                                                       */
 @/**   Initialize                                                          */
 @/**                                                                       */
@@ -62,7 +62,7 @@ SYS_STACK_SIZE  =       1024                    @ System stack size
     .type   $_tx_initialize_low_level,function
 $_tx_initialize_low_level:
      BX        pc                               @ Switch to 32-bit mode
-     NOP                                        @ 
+     NOP                                        @
     .arm
      STMFD     sp!, {lr}                        @ Save return address
      BL        _tx_initialize_low_level         @ Call _tx_initialize_low_level function
@@ -72,45 +72,39 @@ $_tx_initialize_low_level:
 @
     .text
     .align 2
-@/**************************************************************************/ 
-@/*                                                                        */ 
-@/*  FUNCTION                                               RELEASE        */ 
-@/*                                                                        */ 
-@/*    _tx_initialize_low_level                            ARM11/GNU       */ 
+@/**************************************************************************/
+@/*                                                                        */
+@/*  FUNCTION                                               RELEASE        */
+@/*                                                                        */
+@/*    _tx_initialize_low_level                            ARM11/GNU       */
 @/*                                                            6.1         */
 @/*  AUTHOR                                                                */
 @/*                                                                        */
 @/*    William E. Lamie, Microsoft Corporation                             */
 @/*                                                                        */
 @/*  DESCRIPTION                                                           */
-@/*                                                                        */ 
-@/*    This function is responsible for any low-level processor            */ 
-@/*    initialization, including setting up interrupt vectors, setting     */ 
-@/*    up a periodic timer interrupt source, saving the system stack       */ 
-@/*    pointer for use in ISR processing later, and finding the first      */ 
-@/*    available RAM memory address for tx_application_define.             */ 
-@/*                                                                        */ 
-@/*  INPUT                                                                 */ 
-@/*                                                                        */ 
-@/*    None                                                                */ 
-@/*                                                                        */ 
-@/*  OUTPUT                                                                */ 
-@/*                                                                        */ 
-@/*    None                                                                */ 
-@/*                                                                        */ 
-@/*  CALLS                                                                 */ 
-@/*                                                                        */ 
-@/*    None                                                                */ 
-@/*                                                                        */ 
-@/*  CALLED BY                                                             */ 
-@/*                                                                        */ 
-@/*    _tx_initialize_kernel_enter           ThreadX entry function        */ 
-@/*                                                                        */ 
-@/*  RELEASE HISTORY                                                       */ 
-@/*                                                                        */ 
-@/*    DATE              NAME                      DESCRIPTION             */
 @/*                                                                        */
-@/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
+@/*    This function is responsible for any low-level processor            */
+@/*    initialization, including setting up interrupt vectors, setting     */
+@/*    up a periodic timer interrupt source, saving the system stack       */
+@/*    pointer for use in ISR processing later, and finding the first      */
+@/*    available RAM memory address for tx_application_define.             */
+@/*                                                                        */
+@/*  INPUT                                                                 */
+@/*                                                                        */
+@/*    None                                                                */
+@/*                                                                        */
+@/*  OUTPUT                                                                */
+@/*                                                                        */
+@/*    None                                                                */
+@/*                                                                        */
+@/*  CALLS                                                                 */
+@/*                                                                        */
+@/*    None                                                                */
+@/*                                                                        */
+@/*  CALLED BY                                                             */
+@/*                                                                        */
+@/*    _tx_initialize_kernel_enter           ThreadX entry function        */
 @/*                                                                        */
 @/**************************************************************************/
 @VOID   _tx_initialize_low_level(VOID)
@@ -125,7 +119,7 @@ _tx_initialize_low_level:
 @
     LDR     r1, =_sp                            @ Get pointer to stack area
 
-#ifdef TX_ENABLE_IRQ_NESTING 
+#ifdef TX_ENABLE_IRQ_NESTING
 @
 @    /* Setup the system mode stack for nested interrupt support  */
 @
@@ -156,7 +150,7 @@ _tx_initialize_low_level:
     MSR     CPSR, r0                            @ Enter SVC mode
     LDR     r2, =_stack_bottom                  @ Pickup stack bottom
     CMP     r3, r2                              @ Compare the current stack end with the bottom
-_stack_error_loop:                  
+_stack_error_loop:
     BLT     _stack_error_loop                   @ If the IRQ stack exceeds the stack bottom, just sit here!
 @
 @    /* Save the system stack pointer.  */
@@ -208,7 +202,7 @@ __tx_reserved_handler:
     B       __tx_reserved_handler               @ Reserved exception handler
 @
     .global __tx_irq_handler
-    .global __tx_irq_processing_return      
+    .global __tx_irq_processing_return
 __tx_irq_handler:
 @
 @    /* Jump to context save to save system context.  */
@@ -216,17 +210,17 @@ __tx_irq_handler:
 __tx_irq_processing_return:
 @
 @    /* At this point execution is still in the IRQ mode.  The CPSR, point of
-@       interrupt, and all C scratch registers are available for use.  In 
+@       interrupt, and all C scratch registers are available for use.  In
 @       addition, IRQ interrupts may be re-enabled - with certain restrictions -
 @       if nested IRQ interrupts are desired.  Interrupts may be re-enabled over
-@       small code sequences where lr is saved before enabling interrupts and 
+@       small code sequences where lr is saved before enabling interrupts and
 @       restored after interrupts are again disabled.  */
 @
-@    /* Interrupt nesting is allowed after calling _tx_thread_irq_nesting_start 
+@    /* Interrupt nesting is allowed after calling _tx_thread_irq_nesting_start
 @       from IRQ mode with interrupts disabled.  This routine switches to the
-@       system mode and returns with IRQ interrupts enabled.  
-@       
-@       NOTE:  It is very important to ensure all IRQ interrupts are cleared 
+@       system mode and returns with IRQ interrupts enabled.
+@
+@       NOTE:  It is very important to ensure all IRQ interrupts are cleared
 @       prior to enabling nested IRQ interrupts.  */
 #ifdef TX_ENABLE_IRQ_NESTING
     BL      _tx_thread_irq_nesting_start
@@ -240,7 +234,7 @@ __tx_irq_processing_return:
 @
 @
 @    /* If interrupt nesting was started earlier, the end of interrupt nesting
-@       service must be called before returning to _tx_thread_context_restore.  
+@       service must be called before returning to _tx_thread_context_restore.
 @       This routine returns in processing in IRQ mode with interrupts disabled.  */
 #ifdef TX_ENABLE_IRQ_NESTING
     BL      _tx_thread_irq_nesting_end
@@ -256,28 +250,28 @@ __tx_irq_processing_return:
 @__tx_example_vectored_irq_handler:
 @
 @
-@    /* Save initial context and call context save to prepare for 
+@    /* Save initial context and call context save to prepare for
 @       vectored ISR execution.  */
 @
 @    STMDB   sp!, {r0-r3}                        @ Save some scratch registers
 @    MRS     r0, SPSR                            @ Pickup saved SPSR
-@    SUB     lr, lr, #4                          @ Adjust point of interrupt 
+@    SUB     lr, lr, #4                          @ Adjust point of interrupt
 @    STMDB   sp!, {r0, r10, r12, lr}             @ Store other scratch registers
 @    BL      _tx_thread_vectored_context_save    @ Vectored context save
 @
 @    /* At this point execution is still in the IRQ mode.  The CPSR, point of
-@       interrupt, and all C scratch registers are available for use.  In 
+@       interrupt, and all C scratch registers are available for use.  In
 @       addition, IRQ interrupts may be re-enabled - with certain restrictions -
 @       if nested IRQ interrupts are desired.  Interrupts may be re-enabled over
-@       small code sequences where lr is saved before enabling interrupts and 
+@       small code sequences where lr is saved before enabling interrupts and
 @       restored after interrupts are again disabled.  */
 @
 @
-@    /* Interrupt nesting is allowed after calling _tx_thread_irq_nesting_start 
+@    /* Interrupt nesting is allowed after calling _tx_thread_irq_nesting_start
 @       from IRQ mode with interrupts disabled.  This routine switches to the
-@       system mode and returns with IRQ interrupts enabled.  
-@       
-@       NOTE:  It is very important to ensure all IRQ interrupts are cleared 
+@       system mode and returns with IRQ interrupts enabled.
+@
+@       NOTE:  It is very important to ensure all IRQ interrupts are cleared
 @       prior to enabling nested IRQ interrupts.  */
 @#ifdef TX_ENABLE_IRQ_NESTING
 @    BL      _tx_thread_irq_nesting_start
@@ -286,7 +280,7 @@ __tx_irq_processing_return:
 @    /* Application IRQ handlers can be called here!  */
 @
 @    /* If interrupt nesting was started earlier, the end of interrupt nesting
-@       service must be called before returning to _tx_thread_context_restore.  
+@       service must be called before returning to _tx_thread_context_restore.
 @       This routine returns in processing in IRQ mode with interrupts disabled.  */
 @#ifdef TX_ENABLE_IRQ_NESTING
 @    BL      _tx_thread_irq_nesting_end
@@ -308,11 +302,11 @@ __tx_fiq_processing_return:
 @    /* At this point execution is still in the FIQ mode.  The CPSR, point of
 @       interrupt, and all C scratch registers are available for use.  */
 @
-@    /* Interrupt nesting is allowed after calling _tx_thread_fiq_nesting_start 
+@    /* Interrupt nesting is allowed after calling _tx_thread_fiq_nesting_start
 @       from FIQ mode with interrupts disabled.  This routine switches to the
-@       system mode and returns with FIQ interrupts enabled. 
+@       system mode and returns with FIQ interrupts enabled.
 @
-@       NOTE:  It is very important to ensure all FIQ interrupts are cleared 
+@       NOTE:  It is very important to ensure all FIQ interrupts are cleared
 @       prior to enabling nested FIQ interrupts.  */
 #ifdef TX_ENABLE_FIQ_NESTING
     BL      _tx_thread_fiq_nesting_start