diff options
| author | Frédéric Desbiens <[email protected]> | 2026-03-06 19:27:49 +0100 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-03-06 19:27:49 +0100 |
| commit | 3726d7906b4808bfec7855fc088e073199df9120 (patch) | |
| tree | 8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports/arm11/gnu/src | |
| parent | 4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff) | |
| parent | c3259a216026372e3833dd8996a68f77e8595fbd (diff) | |
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports/arm11/gnu/src')
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_context_restore.S | 75 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_context_save.S | 85 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_fiq_context_restore.S | 77 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_fiq_context_save.S | 105 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_fiq_nesting_end.S | 87 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_fiq_nesting_start.S | 77 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_interrupt_control.S | 67 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_interrupt_disable.S | 65 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_interrupt_restore.S | 63 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_irq_nesting_end.S | 87 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_irq_nesting_start.S | 77 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_schedule.S | 75 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_stack_build.S | 63 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_system_return.S | 75 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_vectored_context_save.S | 73 | ||||
| -rw-r--r-- | ports/arm11/gnu/src/tx_timer_interrupt.S | 79 |
16 files changed, 543 insertions, 687 deletions
diff --git a/ports/arm11/gnu/src/tx_thread_context_restore.S b/ports/arm11/gnu/src/tx_thread_context_restore.S index 6a270b66..74fb495f 100644 --- a/ports/arm11/gnu/src/tx_thread_context_restore.S +++ b/ports/arm11/gnu/src/tx_thread_context_restore.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -43,51 +43,42 @@ IRQ_MODE = 0x92 @ Disable IRQ, IRQ mode @ @/* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_restore @ since it will never be called 16-bit mode. */ -@ +@ .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_context_restore ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_context_restore ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function restores the interrupt context if it is processing a */ -@/* nested interrupt. If not, it returns to the interrupt thread if no */ -@/* preemption is necessary. Otherwise, if preemption is necessary or */ -@/* if no thread was running, the function returns to the scheduler. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* _tx_thread_schedule Thread scheduling routine */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs Interrupt Service Routines */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function restores the interrupt context if it is processing a */ +@/* nested interrupt. If not, it returns to the interrupt thread if no */ +@/* preemption is necessary. Otherwise, if preemption is necessary or */ +@/* if no thread was running, the function returns to the scheduler. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* _tx_thread_schedule Thread scheduling routine */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs Interrupt Service Routines */ @/* */ @/**************************************************************************/ @VOID _tx_thread_context_restore(VOID) @@ -115,13 +106,13 @@ _tx_thread_context_restore: LDR r3, =_tx_thread_system_state @ Pickup address of system state variable LDR r2, [r3] @ Pickup system state SUB r2, r2, #1 @ Decrement the counter - STR r2, [r3] @ Store the counter + STR r2, [r3] @ Store the counter CMP r2, #0 @ Was this the first interrupt? BEQ __tx_thread_not_nested_restore @ If so, not a nested restore @ @ /* Interrupts are nested. */ @ -@ /* Just recover the saved registers and return to the point of +@ /* Just recover the saved registers and return to the point of @ interrupt. */ @ LDMIA sp!, {r0, r10, r12, lr} @ Recover SPSR, POI, and scratch regs diff --git a/ports/arm11/gnu/src/tx_thread_context_save.S b/ports/arm11/gnu/src/tx_thread_context_save.S index 3fe539d2..c8d7e503 100644 --- a/ports/arm11/gnu/src/tx_thread_context_save.S +++ b/ports/arm11/gnu/src/tx_thread_context_save.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -36,50 +36,41 @@ DISABLE_INTS = 0x80 @ IRQ interrupts disabled @ @/* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save @ since it will never be called 16-bit mode. */ -@ +@ .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_context_save ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_context_save ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function saves the context of an executing thread in the */ -@/* beginning of interrupt processing. The function also ensures that */ -@/* the system stack is used upon return to the calling ISR. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function saves the context of an executing thread in the */ +@/* beginning of interrupt processing. The function also ensures that */ +@/* the system stack is used upon return to the calling ISR. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @VOID _tx_thread_context_save(VOID) @@ -95,7 +86,7 @@ _tx_thread_context_save: @ if (_tx_thread_system_state++) @ { @ - STMDB sp!, {r0-r3} @ Save some working registers + STMDB sp!, {r0-r3} @ Save some working registers #ifdef TX_ENABLE_FIQ_SUPPORT MRS r0, CPSR @ Pickup the CPSR ORR r0, r0, #DISABLE_INTS @ Build disable interrupt CPSR @@ -115,7 +106,7 @@ _tx_thread_context_save: @ calling ISR. */ @ MRS r0, SPSR @ Pickup saved SPSR - SUB lr, lr, #4 @ Adjust point of interrupt + SUB lr, lr, #4 @ Adjust point of interrupt STMDB sp!, {r0, r10, r12, lr} @ Store other registers @ @ /* Return to the ISR. */ @@ -131,7 +122,7 @@ _tx_thread_context_save: POP {lr} @ Recover ISR lr #endif - B __tx_irq_processing_return @ Continue IRQ processing + B __tx_irq_processing_return @ Continue IRQ processing @ __tx_thread_not_nested_save: @ } @@ -145,13 +136,13 @@ __tx_thread_not_nested_save: LDR r1, =_tx_thread_current_ptr @ Pickup address of current thread ptr LDR r0, [r1] @ Pickup current thread pointer CMP r0, #0 @ Is it NULL? - BEQ __tx_thread_idle_system_save @ If so, interrupt occurred in + BEQ __tx_thread_idle_system_save @ If so, interrupt occurred in @ scheduling loop - nothing needs saving! @ @ /* Save minimal context of interrupted thread. */ @ MRS r2, SPSR @ Pickup saved SPSR - SUB lr, lr, #4 @ Adjust point of interrupt + SUB lr, lr, #4 @ Adjust point of interrupt STMDB sp!, {r2, r10, r12, lr} @ Store other registers @ @ /* Save the current stack pointer in the thread's control block. */ @@ -171,7 +162,7 @@ __tx_thread_not_nested_save: POP {lr} @ Recover ISR lr #endif - B __tx_irq_processing_return @ Continue IRQ processing + B __tx_irq_processing_return @ Continue IRQ processing @ @ } @ else @@ -181,7 +172,7 @@ __tx_thread_idle_system_save: @ @ /* Interrupt occurred in the scheduling loop. */ @ -@ /* Not much to do here, just adjust the stack pointer, and return to IRQ +@ /* Not much to do here, just adjust the stack pointer, and return to IRQ @ processing. */ @ MOV r10, #0 @ Clear stack limit @@ -196,7 +187,7 @@ __tx_thread_idle_system_save: #endif ADD sp, sp, #16 @ Recover saved registers - B __tx_irq_processing_return @ Continue IRQ processing + B __tx_irq_processing_return @ Continue IRQ processing @ @ } @} diff --git a/ports/arm11/gnu/src/tx_thread_fiq_context_restore.S b/ports/arm11/gnu/src/tx_thread_fiq_context_restore.S index 3d3dd37a..5d6ed149 100644 --- a/ports/arm11/gnu/src/tx_thread_fiq_context_restore.S +++ b/ports/arm11/gnu/src/tx_thread_fiq_context_restore.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -25,7 +25,7 @@ SVC_MODE = 0xD3 @ SVC mode FIQ_MODE = 0xD1 @ FIQ mode DISABLE_INTS = 0xC0 @ Disable IRQ/FIQ interrupts -MODE_MASK = 0x1F @ Mode mask +MODE_MASK = 0x1F @ Mode mask THUMB_MASK = 0x20 @ Thumb bit mask IRQ_MODE_BITS = 0x12 @ IRQ mode bits SVC_MODE_BITS = 0x13 @ SVC mode value @@ -47,47 +47,38 @@ SVC_MODE_BITS = 0x13 @ SVC mode value .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_fiq_context_restore ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_fiq_context_restore ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function restores the fiq interrupt context when processing a */ -@/* nested interrupt. If not, it returns to the interrupt thread if no */ -@/* preemption is necessary. Otherwise, if preemption is necessary or */ -@/* if no thread was running, the function returns to the scheduler. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* _tx_thread_schedule Thread scheduling routine */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* FIQ ISR Interrupt Service Routines */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function restores the fiq interrupt context when processing a */ +@/* nested interrupt. If not, it returns to the interrupt thread if no */ +@/* preemption is necessary. Otherwise, if preemption is necessary or */ +@/* if no thread was running, the function returns to the scheduler. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* _tx_thread_schedule Thread scheduling routine */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* FIQ ISR Interrupt Service Routines */ @/* */ @/**************************************************************************/ @VOID _tx_thread_fiq_context_restore(VOID) @@ -116,13 +107,13 @@ _tx_thread_fiq_context_restore: LDR r3, =_tx_thread_system_state @ Pickup address of system state variable LDR r2, [r3] @ Pickup system state SUB r2, r2, #1 @ Decrement the counter - STR r2, [r3] @ Store the counter + STR r2, [r3] @ Store the counter CMP r2, #0 @ Was this the first interrupt? BEQ __tx_thread_fiq_not_nested_restore @ If so, not a nested restore @ @ /* Interrupts are nested. */ @ -@ /* Just recover the saved registers and return to the point of +@ /* Just recover the saved registers and return to the point of @ interrupt. */ @ LDMIA sp!, {r0, r10, r12, lr} @ Recover SPSR, POI, and scratch regs @@ -213,7 +204,7 @@ __tx_thread_fiq_preempt_restore: BEQ __tx_thread_fiq_dont_save_ts @ No, don't save it @ @ _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice; -@ _tx_timer_time_slice = 0; +@ _tx_timer_time_slice = 0; @ STR r2, [r0, #24] @ Save thread's time-slice MOV r2, #0 @ Clear value diff --git a/ports/arm11/gnu/src/tx_thread_fiq_context_save.S b/ports/arm11/gnu/src/tx_thread_fiq_context_save.S index 8dc69191..93b33309 100644 --- a/ports/arm11/gnu/src/tx_thread_fiq_context_save.S +++ b/ports/arm11/gnu/src/tx_thread_fiq_context_save.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -34,46 +34,37 @@ .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_fiq_context_save ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_fiq_context_save ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function saves the context of an executing thread in the */ -@/* beginning of interrupt processing. The function also ensures that */ -@/* the system stack is used upon return to the calling ISR. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function saves the context of an executing thread in the */ +@/* beginning of interrupt processing. The function also ensures that */ +@/* the system stack is used upon return to the calling ISR. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @ VOID _tx_thread_fiq_context_save(VOID) @@ -89,7 +80,7 @@ _tx_thread_fiq_context_save: @ if (_tx_thread_system_state++) @ { @ - STMDB sp!, {r0-r3} @ Save some working registers + STMDB sp!, {r0-r3} @ Save some working registers LDR r3, =_tx_thread_system_state @ Pickup address of system state variable LDR r2, [r3] @ Pickup system state CMP r2, #0 @ Is this the first interrupt? @@ -104,7 +95,7 @@ _tx_thread_fiq_context_save: @ calling ISR. */ @ MRS r0, SPSR @ Pickup saved SPSR - SUB lr, lr, #4 @ Adjust point of interrupt + SUB lr, lr, #4 @ Adjust point of interrupt STMDB sp!, {r0, r10, r12, lr} @ Store other registers @ @ /* Return to the ISR. */ @@ -120,38 +111,38 @@ _tx_thread_fiq_context_save: POP {lr} @ Recover ISR lr #endif - B __tx_fiq_processing_return @ Continue FIQ processing + B __tx_fiq_processing_return @ Continue FIQ processing @ __tx_thread_fiq_not_nested_save: -@ } +@ } @ @ /* Otherwise, not nested, check to see if a thread was running. */ @ else if (_tx_thread_current_ptr) -@ { +@ { @ ADD r2, r2, #1 @ Increment the interrupt counter STR r2, [r3] @ Store it back in the variable LDR r1, =_tx_thread_current_ptr @ Pickup address of current thread ptr LDR r0, [r1] @ Pickup current thread pointer CMP r0, #0 @ Is it NULL? - BEQ __tx_thread_fiq_idle_system_save @ If so, interrupt occurred in -@ @ scheduling loop - nothing needs saving! + BEQ __tx_thread_fiq_idle_system_save @ If so, interrupt occurred in +@ @ scheduling loop - nothing needs saving! @ @ /* Save minimal context of interrupted thread. */ @ MRS r2, SPSR @ Pickup saved SPSR - SUB lr, lr, #4 @ Adjust point of interrupt + SUB lr, lr, #4 @ Adjust point of interrupt STMDB sp!, {r2, lr} @ Store other registers, Note that we don't -@ @ need to save sl and ip since FIQ has -@ @ copies of these registers. Nested +@ @ need to save sl and ip since FIQ has +@ @ copies of these registers. Nested @ @ interrupt processing does need to save @ @ these registers. @ @ /* Save the current stack pointer in the thread's control block. */ -@ _tx_thread_current_ptr -> tx_thread_stack_ptr = sp; +@ _tx_thread_current_ptr -> tx_thread_stack_ptr = sp; @ @ /* Switch to the system stack. */ -@ sp = _tx_thread_system_stack_ptr; +@ sp = _tx_thread_system_stack_ptr; @ MOV r10, #0 @ Clear stack limit @@ -164,7 +155,7 @@ __tx_thread_fiq_not_nested_save: POP {lr} @ Recover ISR lr #endif - B __tx_fiq_processing_return @ Continue FIQ processing + B __tx_fiq_processing_return @ Continue FIQ processing @ @ } @ else @@ -184,16 +175,16 @@ __tx_thread_fiq_idle_system_save: #endif @ @ /* Not much to do here, save the current SPSR and LR for possible -@ use in IRQ interrupted in idle system conditions, and return to +@ use in IRQ interrupted in idle system conditions, and return to @ FIQ interrupt processing. */ @ MRS r0, SPSR @ Pickup saved SPSR - SUB lr, lr, #4 @ Adjust point of interrupt + SUB lr, lr, #4 @ Adjust point of interrupt STMDB sp!, {r0, lr} @ Store other registers that will get used -@ @ or stripped off the stack in context -@ @ restore - B __tx_fiq_processing_return @ Continue FIQ processing +@ @ or stripped off the stack in context +@ @ restore + B __tx_fiq_processing_return @ Continue FIQ processing @ @ } -@} +@} diff --git a/ports/arm11/gnu/src/tx_thread_fiq_nesting_end.S b/ports/arm11/gnu/src/tx_thread_fiq_nesting_end.S index 82362bbc..1e9ba513 100644 --- a/ports/arm11/gnu/src/tx_thread_fiq_nesting_end.S +++ b/ports/arm11/gnu/src/tx_thread_fiq_nesting_end.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -27,7 +27,7 @@ DISABLE_INTS = 0xC0 @ Disable IRQ/FIQ interrupts #else DISABLE_INTS = 0x80 @ Disable IRQ interrupts #endif -MODE_MASK = 0x1F @ Mode mask +MODE_MASK = 0x1F @ Mode mask FIQ_MODE_BITS = 0x11 @ FIQ mode bits @ @ @@ -37,54 +37,45 @@ FIQ_MODE_BITS = 0x11 @ FIQ mode bits .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_fiq_nesting_end ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_fiq_nesting_end ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function is called by the application from FIQ mode after */ -@/* _tx_thread_fiq_nesting_start has been called and switches the FIQ */ -@/* processing from system mode back to FIQ mode prior to the ISR */ -@/* calling _tx_thread_fiq_context_restore. Note that this function */ -@/* assumes the system stack pointer is in the same position after */ -@/* nesting start function was called. */ -@/* */ -@/* This function assumes that the system mode stack pointer was setup */ -@/* during low-level initialization (tx_initialize_low_level.s). */ -@/* */ -@/* This function returns with FIQ interrupts disabled. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function is called by the application from FIQ mode after */ +@/* _tx_thread_fiq_nesting_start has been called and switches the FIQ */ +@/* processing from system mode back to FIQ mode prior to the ISR */ +@/* calling _tx_thread_fiq_context_restore. Note that this function */ +@/* assumes the system stack pointer is in the same position after */ +@/* nesting start function was called. */ +@/* */ +@/* This function assumes that the system mode stack pointer was setup */ +@/* during low-level initialization (tx_initialize_low_level.s). */ +@/* */ +@/* This function returns with FIQ interrupts disabled. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @VOID _tx_thread_fiq_nesting_end(VOID) @@ -96,7 +87,7 @@ _tx_thread_fiq_nesting_end: MRS r0, CPSR @ Pickup the CPSR ORR r0, r0, #DISABLE_INTS @ Build disable interrupt value MSR CPSR_cxsf, r0 @ Disable interrupts - LDMIA sp!, {r1, lr} @ Pickup saved lr (and r1 throw-away for + LDMIA sp!, {r1, lr} @ Pickup saved lr (and r1 throw-away for @ 8-byte alignment logic) BIC r0, r0, #MODE_MASK @ Clear mode bits ORR r0, r0, #FIQ_MODE_BITS @ Build IRQ mode CPSR diff --git a/ports/arm11/gnu/src/tx_thread_fiq_nesting_start.S b/ports/arm11/gnu/src/tx_thread_fiq_nesting_start.S index 5a6b6e1b..2f7f4f52 100644 --- a/ports/arm11/gnu/src/tx_thread_fiq_nesting_start.S +++ b/ports/arm11/gnu/src/tx_thread_fiq_nesting_start.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -33,51 +33,42 @@ SYS_MODE_BITS = 0x1F @ System mode bits .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_fiq_nesting_start ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_fiq_nesting_start ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function is called by the application from FIQ mode after */ -@/* _tx_thread_fiq_context_save has been called and switches the FIQ */ -@/* processing to the system mode so nested FIQ interrupt processing */ -@/* is possible (system mode has its own "lr" register). Note that */ -@/* this function assumes that the system mode stack pointer was setup */ -@/* during low-level initialization (tx_initialize_low_level.s). */ -@/* */ -@/* This function returns with FIQ interrupts enabled. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function is called by the application from FIQ mode after */ +@/* _tx_thread_fiq_context_save has been called and switches the FIQ */ +@/* processing to the system mode so nested FIQ interrupt processing */ +@/* is possible (system mode has its own "lr" register). Note that */ +@/* this function assumes that the system mode stack pointer was setup */ +@/* during low-level initialization (tx_initialize_low_level.s). */ +@/* */ +@/* This function returns with FIQ interrupts enabled. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @VOID _tx_thread_fiq_nesting_start(VOID) diff --git a/ports/arm11/gnu/src/tx_thread_interrupt_control.S b/ports/arm11/gnu/src/tx_thread_interrupt_control.S index ecc9326d..dd8b127c 100644 --- a/ports/arm11/gnu/src/tx_thread_interrupt_control.S +++ b/ports/arm11/gnu/src/tx_thread_interrupt_control.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -35,7 +35,7 @@ INT_MASK = 0x03F $_tx_thread_interrupt_control: .thumb BX pc @ Switch to 32-bit mode - NOP @ + NOP @ .arm STMFD sp!, {lr} @ Save return address BL _tx_thread_interrupt_control @ Call _tx_thread_interrupt_control function @@ -45,45 +45,36 @@ $_tx_thread_interrupt_control: @ .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_interrupt_control ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_interrupt_control ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function is responsible for changing the interrupt lockout */ -@/* posture of the system. */ -@/* */ -@/* INPUT */ -@/* */ -@/* new_posture New interrupt lockout posture */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* old_posture Old interrupt lockout posture */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* Application Code */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function is responsible for changing the interrupt lockout */ +@/* posture of the system. */ +@/* */ +@/* INPUT */ +@/* */ +@/* new_posture New interrupt lockout posture */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* old_posture Old interrupt lockout posture */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* Application Code */ @/* */ @/**************************************************************************/ @UINT _tx_thread_interrupt_control(UINT new_posture) diff --git a/ports/arm11/gnu/src/tx_thread_interrupt_disable.S b/ports/arm11/gnu/src/tx_thread_interrupt_disable.S index f51c2238..fb369d0b 100644 --- a/ports/arm11/gnu/src/tx_thread_interrupt_disable.S +++ b/ports/arm11/gnu/src/tx_thread_interrupt_disable.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -38,7 +38,7 @@ DISABLE_INTS = 0x80 @ IRQ interrupts disabled $_tx_thread_interrupt_disable: .thumb BX pc @ Switch to 32-bit mode - NOP @ + NOP @ .arm STMFD sp!, {lr} @ Save return address BL _tx_thread_interrupt_disable @ Call _tx_thread_interrupt_disable function @@ -48,44 +48,35 @@ $_tx_thread_interrupt_disable: @ .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_interrupt_disable ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_interrupt_disable ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function is responsible for disabling interrupts */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* old_posture Old interrupt lockout posture */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* Application Code */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function is responsible for disabling interrupts */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* old_posture Old interrupt lockout posture */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* Application Code */ @/* */ @/**************************************************************************/ @UINT _tx_thread_interrupt_disable(void) diff --git a/ports/arm11/gnu/src/tx_thread_interrupt_restore.S b/ports/arm11/gnu/src/tx_thread_interrupt_restore.S index 8506be1b..78c85f91 100644 --- a/ports/arm11/gnu/src/tx_thread_interrupt_restore.S +++ b/ports/arm11/gnu/src/tx_thread_interrupt_restore.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -31,7 +31,7 @@ $_tx_thread_interrupt_restore: .thumb BX pc @ Switch to 32-bit mode - NOP @ + NOP @ .arm STMFD sp!, {lr} @ Save return address BL _tx_thread_interrupt_restore @ Call _tx_thread_interrupt_restore function @@ -41,45 +41,36 @@ $_tx_thread_interrupt_restore: @ .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_interrupt_restore ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_interrupt_restore ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ +@/* */ @/* This function is responsible for restoring interrupts to the state */ @/* returned by a previous _tx_thread_interrupt_disable call. */ -@/* */ -@/* INPUT */ -@/* */ -@/* old_posture Old interrupt lockout posture */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* Application Code */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* INPUT */ +@/* */ +@/* old_posture Old interrupt lockout posture */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* Application Code */ @/* */ @/**************************************************************************/ @UINT _tx_thread_interrupt_restore(UINT old_posture) diff --git a/ports/arm11/gnu/src/tx_thread_irq_nesting_end.S b/ports/arm11/gnu/src/tx_thread_irq_nesting_end.S index 649bbbb0..26504a38 100644 --- a/ports/arm11/gnu/src/tx_thread_irq_nesting_end.S +++ b/ports/arm11/gnu/src/tx_thread_irq_nesting_end.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -27,7 +27,7 @@ DISABLE_INTS = 0xC0 @ Disable IRQ/FIQ interrupts #else DISABLE_INTS = 0x80 @ Disable IRQ interrupts #endif -MODE_MASK = 0x1F @ Mode mask +MODE_MASK = 0x1F @ Mode mask IRQ_MODE_BITS = 0x12 @ IRQ mode bits @ @ @@ -37,54 +37,45 @@ IRQ_MODE_BITS = 0x12 @ IRQ mode bits .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_irq_nesting_end ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_irq_nesting_end ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function is called by the application from IRQ mode after */ -@/* _tx_thread_irq_nesting_start has been called and switches the IRQ */ -@/* processing from system mode back to IRQ mode prior to the ISR */ -@/* calling _tx_thread_context_restore. Note that this function */ -@/* assumes the system stack pointer is in the same position after */ -@/* nesting start function was called. */ -@/* */ -@/* This function assumes that the system mode stack pointer was setup */ -@/* during low-level initialization (tx_initialize_low_level.s). */ -@/* */ -@/* This function returns with IRQ interrupts disabled. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function is called by the application from IRQ mode after */ +@/* _tx_thread_irq_nesting_start has been called and switches the IRQ */ +@/* processing from system mode back to IRQ mode prior to the ISR */ +@/* calling _tx_thread_context_restore. Note that this function */ +@/* assumes the system stack pointer is in the same position after */ +@/* nesting start function was called. */ +@/* */ +@/* This function assumes that the system mode stack pointer was setup */ +@/* during low-level initialization (tx_initialize_low_level.s). */ +@/* */ +@/* This function returns with IRQ interrupts disabled. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @VOID _tx_thread_irq_nesting_end(VOID) @@ -96,7 +87,7 @@ _tx_thread_irq_nesting_end: MRS r0, CPSR @ Pickup the CPSR ORR r0, r0, #DISABLE_INTS @ Build disable interrupt value MSR CPSR_cxsf, r0 @ Disable interrupts - LDMIA sp!, {r1, lr} @ Pickup saved lr (and r1 throw-away for + LDMIA sp!, {r1, lr} @ Pickup saved lr (and r1 throw-away for @ 8-byte alignment logic) BIC r0, r0, #MODE_MASK @ Clear mode bits ORR r0, r0, #IRQ_MODE_BITS @ Build IRQ mode CPSR diff --git a/ports/arm11/gnu/src/tx_thread_irq_nesting_start.S b/ports/arm11/gnu/src/tx_thread_irq_nesting_start.S index ee949845..12bedd93 100644 --- a/ports/arm11/gnu/src/tx_thread_irq_nesting_start.S +++ b/ports/arm11/gnu/src/tx_thread_irq_nesting_start.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -33,51 +33,42 @@ SYS_MODE_BITS = 0x1F @ System mode bits .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_irq_nesting_start ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_irq_nesting_start ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function is called by the application from IRQ mode after */ -@/* _tx_thread_context_save has been called and switches the IRQ */ -@/* processing to the system mode so nested IRQ interrupt processing */ -@/* is possible (system mode has its own "lr" register). Note that */ -@/* this function assumes that the system mode stack pointer was setup */ -@/* during low-level initialization (tx_initialize_low_level.s). */ -@/* */ -@/* This function returns with IRQ interrupts enabled. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function is called by the application from IRQ mode after */ +@/* _tx_thread_context_save has been called and switches the IRQ */ +@/* processing to the system mode so nested IRQ interrupt processing */ +@/* is possible (system mode has its own "lr" register). Note that */ +@/* this function assumes that the system mode stack pointer was setup */ +@/* during low-level initialization (tx_initialize_low_level.s). */ +@/* */ +@/* This function returns with IRQ interrupts enabled. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @VOID _tx_thread_irq_nesting_start(VOID) diff --git a/ports/arm11/gnu/src/tx_thread_schedule.S b/ports/arm11/gnu/src/tx_thread_schedule.S index 9350540c..2901fbef 100644 --- a/ports/arm11/gnu/src/tx_thread_schedule.S +++ b/ports/arm11/gnu/src/tx_thread_schedule.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -45,7 +45,7 @@ ENABLE_INTS = 0x80 @ IRQ Interrupts enabled mask $_tx_thread_schedule: .thumb BX pc @ Switch to 32-bit mode - NOP @ + NOP @ .arm STMFD sp!, {lr} @ Save return address BL _tx_thread_schedule @ Call _tx_thread_schedule function @@ -55,48 +55,39 @@ $_tx_thread_schedule: @ .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_schedule ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_schedule ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function waits for a thread control block pointer to appear in */ -@/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ -@/* in the variable, the corresponding thread is resumed. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ +@/* */ +@/* This function waits for a thread control block pointer to appear in */ +@/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ +@/* in the variable, the corresponding thread is resumed. */ +@/* */ +@/* INPUT */ +@/* */ @/* None */ -@/* */ -@/* CALLS */ -@/* */ +@/* */ +@/* OUTPUT */ +@/* */ @/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* _tx_initialize_kernel_enter ThreadX entry function */ -@/* _tx_thread_system_return Return to system from thread */ -@/* _tx_thread_context_restore Restore thread's context */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* _tx_initialize_kernel_enter ThreadX entry function */ +@/* _tx_thread_system_return Return to system from thread */ +@/* _tx_thread_context_restore Restore thread's context */ @/* */ @/**************************************************************************/ @VOID _tx_thread_schedule(VOID) @@ -124,7 +115,7 @@ __tx_thread_schedule_loop: @ @ } @ while(_tx_thread_execute_ptr == TX_NULL); -@ +@ @ /* Yes! We have a thread to execute. Lockout interrupts and @ transfer control to it. */ @ @@ -133,7 +124,7 @@ __tx_thread_schedule_loop: @ /* Setup the current thread pointer. */ @ _tx_thread_current_ptr = _tx_thread_execute_ptr; @ - LDR r1, =_tx_thread_current_ptr @ Pickup address of current thread + LDR r1, =_tx_thread_current_ptr @ Pickup address of current thread STR r0, [r1] @ Setup current thread pointer @ @ /* Increment the run count for this thread. */ @@ -147,7 +138,7 @@ __tx_thread_schedule_loop: @ /* Setup time-slice, if present. */ @ _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; @ - LDR r2, =_tx_timer_time_slice @ Pickup address of time-slice + LDR r2, =_tx_timer_time_slice @ Pickup address of time-slice @ variable LDR sp, [r0, #8] @ Switch stack pointers STR r3, [r2] @ Setup time-slice diff --git a/ports/arm11/gnu/src/tx_thread_stack_build.S b/ports/arm11/gnu/src/tx_thread_stack_build.S index 7f156ee0..989916ca 100644 --- a/ports/arm11/gnu/src/tx_thread_stack_build.S +++ b/ports/arm11/gnu/src/tx_thread_stack_build.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -42,7 +42,7 @@ CPSR_MASK = 0x9F @ Mask initial CPSR, IRQ interru .type $_tx_thread_stack_build,function $_tx_thread_stack_build: BX pc @ Switch to 32-bit mode - NOP @ + NOP @ .arm STMFD sp!, {lr} @ Save return address BL _tx_thread_stack_build @ Call _tx_thread_stack_build function @@ -52,47 +52,38 @@ $_tx_thread_stack_build: @ .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_stack_build ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_stack_build ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ +@/* */ @/* This function builds a stack frame on the supplied thread's stack. */ @/* The stack frame results in a fake interrupt return to the supplied */ -@/* function pointer. */ -@/* */ -@/* INPUT */ -@/* */ +@/* function pointer. */ +@/* */ +@/* INPUT */ +@/* */ @/* thread_ptr Pointer to thread control blk */ @/* function_ptr Pointer to return function */ -@/* */ -@/* OUTPUT */ -@/* */ +@/* */ +@/* OUTPUT */ +@/* */ @/* None */ -@/* */ -@/* CALLS */ -@/* */ +@/* */ +@/* CALLS */ +@/* */ @/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* _tx_thread_create Create thread service */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* CALLED BY */ +@/* */ +@/* _tx_thread_create Create thread service */ @/* */ @/**************************************************************************/ @VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) @@ -101,10 +92,10 @@ $_tx_thread_stack_build: .type _tx_thread_stack_build,function _tx_thread_stack_build: @ -@ +@ @ /* Build a fake interrupt frame. The form of the fake interrupt stack @ on theARM11 should look like the following after it is built: -@ +@ @ Stack Top: 1 Interrupt stack frame type @ CPSR Initial value for CPSR @ a1 (r0) Initial value for a1 diff --git a/ports/arm11/gnu/src/tx_thread_system_return.S b/ports/arm11/gnu/src/tx_thread_system_return.S index 1c26a7a0..c15ae266 100644 --- a/ports/arm11/gnu/src/tx_thread_system_return.S +++ b/ports/arm11/gnu/src/tx_thread_system_return.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -48,7 +48,7 @@ DISABLE_INTS = 0x80 @ IRQ interrupts disabled $_tx_thread_system_return: .thumb BX pc @ Switch to 32-bit mode - NOP @ + NOP @ .arm STMFD sp!, {lr} @ Save return address BL _tx_thread_system_return @ Call _tx_thread_system_return function @@ -58,47 +58,38 @@ $_tx_thread_system_return: @ .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_system_return ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_system_return ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function is target processor specific. It is used to transfer */ -@/* control from a thread back to the ThreadX system. Only a */ -@/* minimal context is saved since the compiler assumes temp registers */ -@/* are going to get slicked by a function call anyway. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* _tx_thread_schedule Thread scheduling loop */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ThreadX components */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function is target processor specific. It is used to transfer */ +@/* control from a thread back to the ThreadX system. Only a */ +@/* minimal context is saved since the compiler assumes temp registers */ +@/* are going to get slicked by a function call anyway. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* _tx_thread_schedule Thread scheduling loop */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ThreadX components */ @/* */ @/**************************************************************************/ @VOID _tx_thread_system_return(VOID) @@ -112,12 +103,12 @@ _tx_thread_system_return: MOV r0, #0 @ Build a solicited stack type MRS r1, CPSR @ Pickup the CPSR STMDB sp!, {r0-r1, r4-r11, lr} @ Save minimal context -@ +@ @ /* Lockout interrupts. */ @ ORR r2, r1, #DISABLE_INTS @ Build disable interrupt CPSR MSR CPSR_cxsf, r2 @ Disable interrupts - + #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY @ @ /* Call the thread exit function to indicate the thread is no longer executing. */ diff --git a/ports/arm11/gnu/src/tx_thread_vectored_context_save.S b/ports/arm11/gnu/src/tx_thread_vectored_context_save.S index 23f82007..391cf717 100644 --- a/ports/arm11/gnu/src/tx_thread_vectored_context_save.S +++ b/ports/arm11/gnu/src/tx_thread_vectored_context_save.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -37,50 +37,41 @@ DISABLE_INTS = 0x80 @ IRQ interrupts disabled @ @/* No 16-bit Thumb mode veneer code is needed for _tx_thread_vectored_context_save @ since it will never be called 16-bit mode. */ -@ +@ .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_vectored_context_save ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_vectored_context_save ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function saves the context of an executing thread in the */ -@/* beginning of interrupt processing. The function also ensures that */ -@/* the system stack is used upon return to the calling ISR. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function saves the context of an executing thread in the */ +@/* beginning of interrupt processing. The function also ensures that */ +@/* the system stack is used upon return to the calling ISR. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @VOID _tx_thread_vectored_context_save(VOID) @@ -140,7 +131,7 @@ __tx_thread_not_nested_save: LDR r1, =_tx_thread_current_ptr @ Pickup address of current thread ptr LDR r0, [r1, #0] @ Pickup current thread pointer CMP r0, #0 @ Is it NULL? - BEQ __tx_thread_idle_system_save @ If so, interrupt occurred in + BEQ __tx_thread_idle_system_save @ If so, interrupt occurred in @ scheduling loop - nothing needs saving! @ @ /* Note: Minimal context of interrupted thread is already saved. */ @@ -172,7 +163,7 @@ __tx_thread_idle_system_save: @ @ /* Interrupt occurred in the scheduling loop. */ @ -@ /* Not much to do here, just adjust the stack pointer, and return to IRQ +@ /* Not much to do here, just adjust the stack pointer, and return to IRQ @ processing. */ @ MOV r10, #0 @ Clear stack limit diff --git a/ports/arm11/gnu/src/tx_timer_interrupt.S b/ports/arm11/gnu/src/tx_timer_interrupt.S index 137c5883..1236ec49 100644 --- a/ports/arm11/gnu/src/tx_timer_interrupt.S +++ b/ports/arm11/gnu/src/tx_timer_interrupt.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Timer */ @/** */ @@ -48,7 +48,7 @@ .type $_tx_timer_interrupt,function $_tx_timer_interrupt: BX pc @ Switch to 32-bit mode - NOP @ + NOP @ .arm STMFD sp!, {lr} @ Save return address BL _tx_timer_interrupt @ Call _tx_timer_interrupt function @@ -58,49 +58,40 @@ $_tx_timer_interrupt: @ .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_timer_interrupt ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_timer_interrupt ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function processes the hardware timer interrupt. This */ -@/* processing includes incrementing the system clock and checking for */ -@/* time slice and/or timer expiration. If either is found, the */ -@/* interrupt context save/restore functions are called along with the */ -@/* expiration functions. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* _tx_thread_time_slice Time slice interrupted thread */ -@/* _tx_timer_expiration_process Timer expiration processing */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* interrupt vector */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function processes the hardware timer interrupt. This */ +@/* processing includes incrementing the system clock and checking for */ +@/* time slice and/or timer expiration. If either is found, the */ +@/* interrupt context save/restore functions are called along with the */ +@/* expiration functions. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* _tx_thread_time_slice Time slice interrupted thread */ +@/* _tx_timer_expiration_process Timer expiration processing */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* interrupt vector */ @/* */ @/**************************************************************************/ @VOID _tx_timer_interrupt(VOID) @@ -125,7 +116,7 @@ _tx_timer_interrupt: @ if (_tx_timer_time_slice) @ { @ - LDR r3, =_tx_timer_time_slice @ Pickup address of time-slice + LDR r3, =_tx_timer_time_slice @ Pickup address of time-slice LDR r2, [r3] @ Pickup time-slice CMP r2, #0 @ Is it non-active? BEQ __tx_timer_no_time_slice @ Yes, skip time-slice processing @@ -243,7 +234,7 @@ __tx_timer_dont_activate: @ if (_tx_timer_expired_time_slice) @ { @ - LDR r3, =_tx_timer_expired_time_slice @ Pickup address of time-slice expired + LDR r3, =_tx_timer_expired_time_slice @ Pickup address of time-slice expired LDR r2, [r3] @ Pickup the actual flag CMP r2, #0 @ See if the flag is set BEQ __tx_timer_not_ts_expiration @ No, skip time-slice processing |