diff options
| author | Frédéric Desbiens <[email protected]> | 2026-03-06 19:27:49 +0100 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-03-06 19:27:49 +0100 |
| commit | 3726d7906b4808bfec7855fc088e073199df9120 (patch) | |
| tree | 8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports/arm9/ac5/src | |
| parent | 4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff) | |
| parent | c3259a216026372e3833dd8996a68f77e8595fbd (diff) | |
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports/arm9/ac5/src')
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_context_restore.s | 72 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_context_save.s | 80 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_fiq_context_restore.s | 76 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_fiq_context_save.s | 102 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_fiq_nesting_end.s | 84 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_fiq_nesting_start.s | 74 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_interrupt_control.s | 62 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_interrupt_disable.s | 60 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_interrupt_restore.s | 58 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_irq_nesting_end.s | 84 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_irq_nesting_start.s | 74 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_schedule.s | 70 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_stack_build.s | 58 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_system_return.s | 70 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_thread_vectored_context_save.s | 68 | ||||
| -rw-r--r-- | ports/arm9/ac5/src/tx_timer_interrupt.s | 76 |
16 files changed, 536 insertions, 632 deletions
diff --git a/ports/arm9/ac5/src/tx_thread_context_restore.s b/ports/arm9/ac5/src/tx_thread_context_restore.s index ff4f3324..a1eaf668 100644 --- a/ports/arm9/ac5/src/tx_thread_context_restore.s +++ b/ports/arm9/ac5/src/tx_thread_context_restore.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -37,7 +37,7 @@ DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts ELSE DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts ENDIF -MODE_MASK EQU 0x1F ; Mode mask +MODE_MASK EQU 0x1F ; Mode mask THUMB_MASK EQU 0x20 ; Thumb bit mask SVC_MODE_BITS EQU 0x13 ; SVC mode value ; @@ -55,44 +55,38 @@ SVC_MODE_BITS EQU 0x13 ; SVC mode value ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_context_restore ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_context_restore ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function restores the interrupt context if it is processing a */ -;/* nested interrupt. If not, it returns to the interrupt thread if no */ -;/* preemption is necessary. Otherwise, if preemption is necessary or */ -;/* if no thread was running, the function returns to the scheduler. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling routine */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs Interrupt Service Routines */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function restores the interrupt context if it is processing a */ +;/* nested interrupt. If not, it returns to the interrupt thread if no */ +;/* preemption is necessary. Otherwise, if preemption is necessary or */ +;/* if no thread was running, the function returns to the scheduler. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_thread_schedule Thread scheduling routine */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs Interrupt Service Routines */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_restore(VOID) @@ -120,13 +114,13 @@ _tx_thread_context_restore LDR r3, =_tx_thread_system_state ; Pickup address of system state var LDR r2, [r3, #0] ; Pickup system state SUB r2, r2, #1 ; Decrement the counter - STR r2, [r3, #0] ; Store the counter + STR r2, [r3, #0] ; Store the counter CMP r2, #0 ; Was this the first interrupt? BEQ __tx_thread_not_nested_restore ; If so, not a nested restore ; ; /* Interrupts are nested. */ ; -; /* Just recover the saved registers and return to the point of +; /* Just recover the saved registers and return to the point of ; interrupt. */ ; LDMIA sp!, {r0, r10, r12, lr} ; Recover SPSR, POI, and scratch regs diff --git a/ports/arm9/ac5/src/tx_thread_context_save.s b/ports/arm9/ac5/src/tx_thread_context_save.s index 6e7963bf..d78110be 100644 --- a/ports/arm9/ac5/src/tx_thread_context_save.s +++ b/ports/arm9/ac5/src/tx_thread_context_save.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -45,43 +45,37 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_context_save ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_context_save ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function saves the context of an executing thread in the */ -;/* beginning of interrupt processing. The function also ensures that */ -;/* the system stack is used upon return to the calling ISR. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function saves the context of an executing thread in the */ +;/* beginning of interrupt processing. The function also ensures that */ +;/* the system stack is used upon return to the calling ISR. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_save(VOID) @@ -96,7 +90,7 @@ _tx_thread_context_save ; if (_tx_thread_system_state++) ; { ; - STMDB sp!, {r0-r3} ; Save some working registers + STMDB sp!, {r0-r3} ; Save some working registers IF :DEF:TX_ENABLE_FIQ_SUPPORT MRS r0, CPSR ; Pickup the CPSR ORR r0, r0, #DISABLE_INTS ; Build disable interrupt CPSR @@ -116,7 +110,7 @@ _tx_thread_context_save ; calling ISR. */ ; MRS r0, SPSR ; Pickup saved SPSR - SUB lr, lr, #4 ; Adjust point of interrupt + SUB lr, lr, #4 ; Adjust point of interrupt STMDB sp!, {r0, r10, r12, lr} ; Store other registers ; ; /* Return to the ISR. */ @@ -132,7 +126,7 @@ _tx_thread_context_save POP {lr} ; Recover ISR lr ENDIF - B __tx_irq_processing_return ; Continue IRQ processing + B __tx_irq_processing_return ; Continue IRQ processing ; __tx_thread_not_nested_save ; } @@ -146,13 +140,13 @@ __tx_thread_not_nested_save LDR r1, =_tx_thread_current_ptr ; Pickup address of current thread ptr LDR r0, [r1, #0] ; Pickup current thread pointer CMP r0, #0 ; Is it NULL? - BEQ __tx_thread_idle_system_save ; If so, interrupt occurred in + BEQ __tx_thread_idle_system_save ; If so, interrupt occurred in ; scheduling loop - nothing needs saving! ; ; /* Save minimal context of interrupted thread. */ ; MRS r2, SPSR ; Pickup saved SPSR - SUB lr, lr, #4 ; Adjust point of interrupt + SUB lr, lr, #4 ; Adjust point of interrupt STMDB sp!, {r2, r10, r12, lr} ; Store other registers ; ; /* Save the current stack pointer in the thread's control block. */ @@ -172,7 +166,7 @@ __tx_thread_not_nested_save POP {lr} ; Recover ISR lr ENDIF - B __tx_irq_processing_return ; Continue IRQ processing + B __tx_irq_processing_return ; Continue IRQ processing ; ; } ; else @@ -182,7 +176,7 @@ __tx_thread_idle_system_save ; ; /* Interrupt occurred in the scheduling loop. */ ; -; /* Not much to do here, just adjust the stack pointer, and return to IRQ +; /* Not much to do here, just adjust the stack pointer, and return to IRQ ; processing. */ ; MOV r10, #0 ; Clear stack limit @@ -197,7 +191,7 @@ __tx_thread_idle_system_save ENDIF ADD sp, sp, #16 ; Recover saved registers - B __tx_irq_processing_return ; Continue IRQ processing + B __tx_irq_processing_return ; Continue IRQ processing ; ; } ;} diff --git a/ports/arm9/ac5/src/tx_thread_fiq_context_restore.s b/ports/arm9/ac5/src/tx_thread_fiq_context_restore.s index 906b9bd1..fc6e01bb 100644 --- a/ports/arm9/ac5/src/tx_thread_fiq_context_restore.s +++ b/ports/arm9/ac5/src/tx_thread_fiq_context_restore.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -37,7 +37,7 @@ DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts ELSE DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts ENDIF -MODE_MASK EQU 0x1F ; Mode mask +MODE_MASK EQU 0x1F ; Mode mask THUMB_MASK EQU 0x20 ; Thumb bit mask IRQ_MODE_BITS EQU 0x12 ; IRQ mode bits SVC_MODE_BITS EQU 0x13 ; SVC mode value @@ -57,44 +57,38 @@ SVC_MODE_BITS EQU 0x13 ; SVC mode value ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_fiq_context_restore ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_fiq_context_restore ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function restores the fiq interrupt context when processing a */ -;/* nested interrupt. If not, it returns to the interrupt thread if no */ -;/* preemption is necessary. Otherwise, if preemption is necessary or */ -;/* if no thread was running, the function returns to the scheduler. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling routine */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* FIQ ISR Interrupt Service Routines */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function restores the fiq interrupt context when processing a */ +;/* nested interrupt. If not, it returns to the interrupt thread if no */ +;/* preemption is necessary. Otherwise, if preemption is necessary or */ +;/* if no thread was running, the function returns to the scheduler. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_thread_schedule Thread scheduling routine */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* FIQ ISR Interrupt Service Routines */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_fiq_context_restore(VOID) @@ -122,13 +116,13 @@ _tx_thread_fiq_context_restore LDR r3, =_tx_thread_system_state ; Pickup address of system state var LDR r2, [r3] ; Pickup system state SUB r2, r2, #1 ; Decrement the counter - STR r2, [r3] ; Store the counter + STR r2, [r3] ; Store the counter CMP r2, #0 ; Was this the first interrupt? BEQ __tx_thread_fiq_not_nested_restore ; If so, not a nested restore ; ; /* Interrupts are nested. */ ; -; /* Just recover the saved registers and return to the point of +; /* Just recover the saved registers and return to the point of ; interrupt. */ ; LDMIA sp!, {r0, r10, r12, lr} ; Recover SPSR, POI, and scratch regs @@ -172,7 +166,7 @@ __tx_thread_fiq_no_preempt_restore ; /* Restore interrupted thread or ISR. */ ; ; /* Pickup the saved stack pointer. */ -; tmp_ptr = _tx_thread_current_ptr -> tx_thread_stack_ptr; +; tmp_ptr = _tx_thread_current_ptr -> tx_thread_stack_ptr; ; ; /* Recover the saved context and return to the point of interrupt. */ ; @@ -219,7 +213,7 @@ __tx_thread_fiq_preempt_restore BEQ __tx_thread_fiq_dont_save_ts ; No, don't save it ; ; _tx_thread_current_ptr -> tx_thread_time_slice = _tx_timer_time_slice; -; _tx_timer_time_slice = 0; +; _tx_timer_time_slice = 0; ; STR r2, [r0, #24] ; Save thread's time-slice MOV r2, #0 ; Clear value diff --git a/ports/arm9/ac5/src/tx_thread_fiq_context_save.s b/ports/arm9/ac5/src/tx_thread_fiq_context_save.s index 93be71d7..da963065 100644 --- a/ports/arm9/ac5/src/tx_thread_fiq_context_save.s +++ b/ports/arm9/ac5/src/tx_thread_fiq_context_save.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -39,43 +39,37 @@ ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_fiq_context_save ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_fiq_context_save ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function saves the context of an executing thread in the */ -;/* beginning of interrupt processing. The function also ensures that */ -;/* the system stack is used upon return to the calling ISR. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function saves the context of an executing thread in the */ +;/* beginning of interrupt processing. The function also ensures that */ +;/* the system stack is used upon return to the calling ISR. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ; VOID _tx_thread_fiq_context_save(VOID) @@ -90,7 +84,7 @@ _tx_thread_fiq_context_save ; if (_tx_thread_system_state++) ; { ; - STMDB sp!, {r0-r3} ; Save some working registers + STMDB sp!, {r0-r3} ; Save some working registers LDR r3, =_tx_thread_system_state ; Pickup address of system state var LDR r2, [r3] ; Pickup system state CMP r2, #0 ; Is this the first interrupt? @@ -105,7 +99,7 @@ _tx_thread_fiq_context_save ; calling ISR. */ ; MRS r0, SPSR ; Pickup saved SPSR - SUB lr, lr, #4 ; Adjust point of interrupt + SUB lr, lr, #4 ; Adjust point of interrupt STMDB sp!, {r0, r10, r12, lr} ; Store other registers ; ; /* Return to the ISR. */ @@ -121,38 +115,38 @@ _tx_thread_fiq_context_save POP {lr} ; Recover ISR lr ENDIF - B __tx_fiq_processing_return ; Continue FIQ processing + B __tx_fiq_processing_return ; Continue FIQ processing ; __tx_thread_fiq_not_nested_save -; } +; } ; ; /* Otherwise, not nested, check to see if a thread was running. */ ; else if (_tx_thread_current_ptr) -; { +; { ; ADD r2, r2, #1 ; Increment the interrupt counter STR r2, [r3] ; Store it back in the variable LDR r1, =_tx_thread_current_ptr ; Pickup address of current thread ptr LDR r0, [r1] ; Pickup current thread pointer CMP r0, #0 ; Is it NULL? - BEQ __tx_thread_fiq_idle_system_save ; If so, interrupt occurred in -; ; scheduling loop - nothing needs saving! + BEQ __tx_thread_fiq_idle_system_save ; If so, interrupt occurred in +; ; scheduling loop - nothing needs saving! ; ; /* Save minimal context of interrupted thread. */ ; MRS r2, SPSR ; Pickup saved SPSR - SUB lr, lr, #4 ; Adjust point of interrupt + SUB lr, lr, #4 ; Adjust point of interrupt STMDB sp!, {r2, lr} ; Store other registers, Note that we don't -; ; need to save sl and ip since FIQ has -; ; copies of these registers. Nested +; ; need to save sl and ip since FIQ has +; ; copies of these registers. Nested ; ; interrupt processing does need to save ; ; these registers. ; ; /* Save the current stack pointer in the thread's control block. */ -; _tx_thread_current_ptr -> tx_thread_stack_ptr = sp; +; _tx_thread_current_ptr -> tx_thread_stack_ptr = sp; ; ; /* Switch to the system stack. */ -; sp = _tx_thread_system_stack_ptr; +; sp = _tx_thread_system_stack_ptr; ; MOV r10, #0 ; Clear stack limit @@ -165,7 +159,7 @@ __tx_thread_fiq_not_nested_save POP {lr} ; Recover ISR lr ENDIF - B __tx_fiq_processing_return ; Continue FIQ processing + B __tx_fiq_processing_return ; Continue FIQ processing ; ; } ; else @@ -185,18 +179,18 @@ __tx_thread_fiq_idle_system_save ENDIF ; ; /* Not much to do here, save the current SPSR and LR for possible -; use in IRQ interrupted in idle system conditions, and return to +; use in IRQ interrupted in idle system conditions, and return to ; FIQ interrupt processing. */ ; MRS r0, SPSR ; Pickup saved SPSR - SUB lr, lr, #4 ; Adjust point of interrupt + SUB lr, lr, #4 ; Adjust point of interrupt STMDB sp!, {r0, lr} ; Store other registers that will get used -; ; or stripped off the stack in context -; ; restore - B __tx_fiq_processing_return ; Continue FIQ processing +; ; or stripped off the stack in context +; ; restore + B __tx_fiq_processing_return ; Continue FIQ processing ; ; } -;} +;} ; END diff --git a/ports/arm9/ac5/src/tx_thread_fiq_nesting_end.s b/ports/arm9/ac5/src/tx_thread_fiq_nesting_end.s index ee8484ce..e34c5be6 100644 --- a/ports/arm9/ac5/src/tx_thread_fiq_nesting_end.s +++ b/ports/arm9/ac5/src/tx_thread_fiq_nesting_end.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -34,56 +34,50 @@ DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts ELSE DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts ENDIF -MODE_MASK EQU 0x1F ; Mode mask +MODE_MASK EQU 0x1F ; Mode mask FIQ_MODE_BITS EQU 0x11 ; FIQ mode bits ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_fiq_nesting_end ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_fiq_nesting_end ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is called by the application from FIQ mode after */ -;/* _tx_thread_fiq_nesting_start has been called and switches the FIQ */ -;/* processing from system mode back to FIQ mode prior to the ISR */ -;/* calling _tx_thread_fiq_context_restore. Note that this function */ -;/* assumes the system stack pointer is in the same position after */ -;/* nesting start function was called. */ -;/* */ -;/* This function assumes that the system mode stack pointer was setup */ -;/* during low-level initialization (tx_initialize_low_level.s). */ -;/* */ -;/* This function returns with FIQ interrupts disabled. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function is called by the application from FIQ mode after */ +;/* _tx_thread_fiq_nesting_start has been called and switches the FIQ */ +;/* processing from system mode back to FIQ mode prior to the ISR */ +;/* calling _tx_thread_fiq_context_restore. Note that this function */ +;/* assumes the system stack pointer is in the same position after */ +;/* nesting start function was called. */ +;/* */ +;/* This function assumes that the system mode stack pointer was setup */ +;/* during low-level initialization (tx_initialize_low_level.s). */ +;/* */ +;/* This function returns with FIQ interrupts disabled. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_fiq_nesting_end(VOID) @@ -94,7 +88,7 @@ _tx_thread_fiq_nesting_end MRS r0, CPSR ; Pickup the CPSR ORR r0, r0, #DISABLE_INTS ; Build disable interrupt value MSR CPSR_cxsf, r0 ; Disable interrupts - LDMIA sp!, {r1, lr} ; Pickup saved lr (and r1 throw-away for + LDMIA sp!, {r1, lr} ; Pickup saved lr (and r1 throw-away for ; 8-byte alignment logic) BIC r0, r0, #MODE_MASK ; Clear mode bits ORR r0, r0, #FIQ_MODE_BITS ; Build IRQ mode CPSR diff --git a/ports/arm9/ac5/src/tx_thread_fiq_nesting_start.s b/ports/arm9/ac5/src/tx_thread_fiq_nesting_start.s index e2e9435b..4b17fee9 100644 --- a/ports/arm9/ac5/src/tx_thread_fiq_nesting_start.s +++ b/ports/arm9/ac5/src/tx_thread_fiq_nesting_start.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -35,48 +35,42 @@ SYS_MODE_BITS EQU 0x1F ; System mode bits ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_fiq_nesting_start ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_fiq_nesting_start ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is called by the application from FIQ mode after */ -;/* _tx_thread_fiq_context_save has been called and switches the FIQ */ -;/* processing to the system mode so nested FIQ interrupt processing */ -;/* is possible (system mode has its own "lr" register). Note that */ -;/* this function assumes that the system mode stack pointer was setup */ -;/* during low-level initialization (tx_initialize_low_level.s). */ -;/* */ -;/* This function returns with FIQ interrupts enabled. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function is called by the application from FIQ mode after */ +;/* _tx_thread_fiq_context_save has been called and switches the FIQ */ +;/* processing to the system mode so nested FIQ interrupt processing */ +;/* is possible (system mode has its own "lr" register). Note that */ +;/* this function assumes that the system mode stack pointer was setup */ +;/* during low-level initialization (tx_initialize_low_level.s). */ +;/* */ +;/* This function returns with FIQ interrupts enabled. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_fiq_nesting_start(VOID) diff --git a/ports/arm9/ac5/src/tx_thread_interrupt_control.s b/ports/arm9/ac5/src/tx_thread_interrupt_control.s index b9a99e0c..14c4e4f7 100644 --- a/ports/arm9/ac5/src/tx_thread_interrupt_control.s +++ b/ports/arm9/ac5/src/tx_thread_interrupt_control.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -36,42 +36,36 @@ INT_MASK EQU 0x80 ; Interrupt bit mask ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_interrupt_control ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_interrupt_control ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for changing the interrupt lockout */ -;/* posture of the system. */ -;/* */ -;/* INPUT */ -;/* */ -;/* new_posture New interrupt lockout posture */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* old_posture Old interrupt lockout posture */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application Code */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function is responsible for changing the interrupt lockout */ +;/* posture of the system. */ +;/* */ +;/* INPUT */ +;/* */ +;/* new_posture New interrupt lockout posture */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* old_posture Old interrupt lockout posture */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* Application Code */ ;/* */ ;/**************************************************************************/ ;UINT _tx_thread_interrupt_control(UINT new_posture) diff --git a/ports/arm9/ac5/src/tx_thread_interrupt_disable.s b/ports/arm9/ac5/src/tx_thread_interrupt_disable.s index 01e85f7f..a5d83435 100644 --- a/ports/arm9/ac5/src/tx_thread_interrupt_disable.s +++ b/ports/arm9/ac5/src/tx_thread_interrupt_disable.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -36,41 +36,35 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_interrupt_disable ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_interrupt_disable ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for disabling interrupts */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* old_posture Old interrupt lockout posture */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application Code */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function is responsible for disabling interrupts */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* old_posture Old interrupt lockout posture */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* Application Code */ ;/* */ ;/**************************************************************************/ ;UINT _tx_thread_interrupt_disable(void) diff --git a/ports/arm9/ac5/src/tx_thread_interrupt_restore.s b/ports/arm9/ac5/src/tx_thread_interrupt_restore.s index 638d1d0d..d88578a8 100644 --- a/ports/arm9/ac5/src/tx_thread_interrupt_restore.s +++ b/ports/arm9/ac5/src/tx_thread_interrupt_restore.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -29,42 +29,36 @@ ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_interrupt_restore ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_interrupt_restore ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ +;/* */ ;/* This function is responsible for restoring interrupts to the state */ ;/* returned by a previous _tx_thread_interrupt_disable call. */ -;/* */ -;/* INPUT */ -;/* */ -;/* old_posture Old interrupt lockout posture */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application Code */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* INPUT */ +;/* */ +;/* old_posture Old interrupt lockout posture */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* Application Code */ ;/* */ ;/**************************************************************************/ ;UINT _tx_thread_interrupt_restore(UINT old_posture) diff --git a/ports/arm9/ac5/src/tx_thread_irq_nesting_end.s b/ports/arm9/ac5/src/tx_thread_irq_nesting_end.s index 032d4dcc..622288db 100644 --- a/ports/arm9/ac5/src/tx_thread_irq_nesting_end.s +++ b/ports/arm9/ac5/src/tx_thread_irq_nesting_end.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -34,56 +34,50 @@ DISABLE_INTS EQU 0xC0 ; Disable IRQ & FIQ interrupts ELSE DISABLE_INTS EQU 0x80 ; Disable IRQ interrupts ENDIF -MODE_MASK EQU 0x1F ; Mode mask +MODE_MASK EQU 0x1F ; Mode mask IRQ_MODE_BITS EQU 0x12 ; IRQ mode bits ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_irq_nesting_end ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_irq_nesting_end ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is called by the application from IRQ mode after */ -;/* _tx_thread_irq_nesting_start has been called and switches the IRQ */ -;/* processing from system mode back to IRQ mode prior to the ISR */ -;/* calling _tx_thread_context_restore. Note that this function */ -;/* assumes the system stack pointer is in the same position after */ -;/* nesting start function was called. */ -;/* */ -;/* This function assumes that the system mode stack pointer was setup */ -;/* during low-level initialization (tx_initialize_low_level.s). */ -;/* */ -;/* This function returns with IRQ interrupts disabled. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function is called by the application from IRQ mode after */ +;/* _tx_thread_irq_nesting_start has been called and switches the IRQ */ +;/* processing from system mode back to IRQ mode prior to the ISR */ +;/* calling _tx_thread_context_restore. Note that this function */ +;/* assumes the system stack pointer is in the same position after */ +;/* nesting start function was called. */ +;/* */ +;/* This function assumes that the system mode stack pointer was setup */ +;/* during low-level initialization (tx_initialize_low_level.s). */ +;/* */ +;/* This function returns with IRQ interrupts disabled. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_irq_nesting_end(VOID) @@ -94,7 +88,7 @@ _tx_thread_irq_nesting_end MRS r0, CPSR ; Pickup the CPSR ORR r0, r0, #DISABLE_INTS ; Build disable interrupt value MSR CPSR_cxsf, r0 ; Disable interrupts - LDMIA sp!, {r1, lr} ; Pickup saved lr (and r1 throw-away for + LDMIA sp!, {r1, lr} ; Pickup saved lr (and r1 throw-away for ; 8-byte alignment logic) BIC r0, r0, #MODE_MASK ; Clear mode bits ORR r0, r0, #IRQ_MODE_BITS ; Build IRQ mode CPSR diff --git a/ports/arm9/ac5/src/tx_thread_irq_nesting_start.s b/ports/arm9/ac5/src/tx_thread_irq_nesting_start.s index 3da96c71..7cd3cd98 100644 --- a/ports/arm9/ac5/src/tx_thread_irq_nesting_start.s +++ b/ports/arm9/ac5/src/tx_thread_irq_nesting_start.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -35,48 +35,42 @@ SYS_MODE_BITS EQU 0x1F ; System mode bits ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_irq_nesting_start ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_irq_nesting_start ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is called by the application from IRQ mode after */ -;/* _tx_thread_context_save has been called and switches the IRQ */ -;/* processing to the system mode so nested IRQ interrupt processing */ -;/* is possible (system mode has its own "lr" register). Note that */ -;/* this function assumes that the system mode stack pointer was setup */ -;/* during low-level initialization (tx_initialize_low_level.s). */ -;/* */ -;/* This function returns with IRQ interrupts enabled. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function is called by the application from IRQ mode after */ +;/* _tx_thread_context_save has been called and switches the IRQ */ +;/* processing to the system mode so nested IRQ interrupt processing */ +;/* is possible (system mode has its own "lr" register). Note that */ +;/* this function assumes that the system mode stack pointer was setup */ +;/* during low-level initialization (tx_initialize_low_level.s). */ +;/* */ +;/* This function returns with IRQ interrupts enabled. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_irq_nesting_start(VOID) diff --git a/ports/arm9/ac5/src/tx_thread_schedule.s b/ports/arm9/ac5/src/tx_thread_schedule.s index 23b678e2..20fa4d41 100644 --- a/ports/arm9/ac5/src/tx_thread_schedule.s +++ b/ports/arm9/ac5/src/tx_thread_schedule.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -47,45 +47,39 @@ ENABLE_INTS EQU 0x80 ; IRQ Interrupts enabled mask ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_schedule ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_schedule ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function waits for a thread control block pointer to appear in */ -;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ -;/* in the variable, the corresponding thread is resumed. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ +;/* */ +;/* This function waits for a thread control block pointer to appear in */ +;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ +;/* in the variable, the corresponding thread is resumed. */ +;/* */ +;/* INPUT */ +;/* */ ;/* None */ -;/* */ -;/* CALLS */ -;/* */ +;/* */ +;/* OUTPUT */ +;/* */ ;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_initialize_kernel_enter ThreadX entry function */ -;/* _tx_thread_system_return Return to system from thread */ -;/* _tx_thread_context_restore Restore thread's context */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* _tx_initialize_kernel_enter ThreadX entry function */ +;/* _tx_thread_system_return Return to system from thread */ +;/* _tx_thread_context_restore Restore thread's context */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_schedule(VOID) @@ -112,7 +106,7 @@ __tx_thread_schedule_loop ; ; } ; while(_tx_thread_execute_ptr == TX_NULL); -; +; ; /* Yes! We have a thread to execute. Lockout interrupts and ; transfer control to it. */ ; @@ -121,7 +115,7 @@ __tx_thread_schedule_loop ; /* Setup the current thread pointer. */ ; _tx_thread_current_ptr = _tx_thread_execute_ptr; ; - LDR r1, =_tx_thread_current_ptr ; Pickup address of current thread + LDR r1, =_tx_thread_current_ptr ; Pickup address of current thread STR r0, [r1, #0] ; Setup current thread pointer ; ; /* Increment the run count for this thread. */ @@ -135,7 +129,7 @@ __tx_thread_schedule_loop ; /* Setup time-slice, if present. */ ; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; ; - LDR r2, =_tx_timer_time_slice ; Pickup address of time slice + LDR r2, =_tx_timer_time_slice ; Pickup address of time slice ; variable LDR sp, [r0, #8] ; Switch stack pointers STR r3, [r2, #0] ; Setup time-slice diff --git a/ports/arm9/ac5/src/tx_thread_stack_build.s b/ports/arm9/ac5/src/tx_thread_stack_build.s index 2ca47eb6..a286e896 100644 --- a/ports/arm9/ac5/src/tx_thread_stack_build.s +++ b/ports/arm9/ac5/src/tx_thread_stack_build.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -38,44 +38,38 @@ CPSR_MASK EQU 0x9F ; Mask initial CPSR, IRQ ints en ; ; AREA ||.text||, CODE, READONLY -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_stack_build ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_stack_build ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ +;/* */ ;/* This function builds a stack frame on the supplied thread's stack. */ ;/* The stack frame results in a fake interrupt return to the supplied */ -;/* function pointer. */ -;/* */ -;/* INPUT */ -;/* */ +;/* function pointer. */ +;/* */ +;/* INPUT */ +;/* */ ;/* thread_ptr Pointer to thread control blk */ ;/* function_ptr Pointer to return function */ -;/* */ -;/* OUTPUT */ -;/* */ +;/* */ +;/* OUTPUT */ +;/* */ ;/* None */ -;/* */ -;/* CALLS */ -;/* */ +;/* */ +;/* CALLS */ +;/* */ ;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_thread_create Create thread service */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* CALLED BY */ +;/* */ +;/* _tx_thread_create Create thread service */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) @@ -83,10 +77,10 @@ CPSR_MASK EQU 0x9F ; Mask initial CPSR, IRQ ints en EXPORT _tx_thread_stack_build _tx_thread_stack_build ; -; +; ; /* Build a fake interrupt frame. The form of the fake interrupt stack ; on the ARM9 should look like the following after it is built: -; +; ; Stack Top: 1 Interrupt stack frame type ; CPSR Initial value for CPSR ; a1 (r0) Initial value for a1 diff --git a/ports/arm9/ac5/src/tx_thread_system_return.s b/ports/arm9/ac5/src/tx_thread_system_return.s index bf9f1735..83a54a0f 100644 --- a/ports/arm9/ac5/src/tx_thread_system_return.s +++ b/ports/arm9/ac5/src/tx_thread_system_return.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -40,50 +40,44 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled IMPORT _tx_timer_time_slice IMPORT _tx_thread_schedule IF :DEF:TX_ENABLE_EXECUTION_CHANGE_NOTIFY - IMPORT _tx_execution_thread_exit + IMPORT _tx_execution_thread_exit ENDIF ; ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_system_return ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_system_return ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is target processor specific. It is used to transfer */ -;/* control from a thread back to the ThreadX system. Only a */ -;/* minimal context is saved since the compiler assumes temp registers */ -;/* are going to get slicked by a function call anyway. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling loop */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ThreadX components */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function is target processor specific. It is used to transfer */ +;/* control from a thread back to the ThreadX system. Only a */ +;/* minimal context is saved since the compiler assumes temp registers */ +;/* are going to get slicked by a function call anyway. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_thread_schedule Thread scheduling loop */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ThreadX components */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_system_return(VOID) @@ -96,7 +90,7 @@ _tx_thread_system_return MOV r0, #0 ; Build a solicited stack type MRS r1, CPSR ; Pickup the CPSR STMDB sp!, {r0-r1, r4-r11, lr} ; Save minimal context -; +; ; /* Lockout interrupts. */ ; ORR r2, r1, #DISABLE_INTS ; Build disable interrupt CPSR diff --git a/ports/arm9/ac5/src/tx_thread_vectored_context_save.s b/ports/arm9/ac5/src/tx_thread_vectored_context_save.s index ede3ec49..a9283702 100644 --- a/ports/arm9/ac5/src/tx_thread_vectored_context_save.s +++ b/ports/arm9/ac5/src/tx_thread_vectored_context_save.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ @@ -45,43 +45,37 @@ DISABLE_INTS EQU 0x80 ; IRQ interrupts disabled ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_thread_vectored_context_save ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_thread_vectored_context_save ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function saves the context of an executing thread in the */ -;/* beginning of interrupt processing. The function also ensures that */ -;/* the system stack is used upon return to the calling ISR. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function saves the context of an executing thread in the */ +;/* beginning of interrupt processing. The function also ensures that */ +;/* the system stack is used upon return to the calling ISR. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_vectored_context_save(VOID) @@ -144,7 +138,7 @@ __tx_thread_not_nested_save LDR r1, =_tx_thread_current_ptr ; Pickup address of current thread ptr LDR r0, [r1, #0] ; Pickup current thread pointer CMP r0, #0 ; Is it NULL? - BEQ __tx_thread_idle_system_save ; If so, interrupt occurred in + BEQ __tx_thread_idle_system_save ; If so, interrupt occurred in ; scheduling loop - nothing needs saving! ; ; /* Note: Minimal context of interrupted thread is already saved. */ @@ -180,7 +174,7 @@ __tx_thread_idle_system_save ; ; /* Interrupt occurred in the scheduling loop. */ ; -; /* Not much to do here, just adjust the stack pointer, and return to IRQ +; /* Not much to do here, just adjust the stack pointer, and return to IRQ ; processing. */ ; MOV r10, #0 ; Clear stack limit diff --git a/ports/arm9/ac5/src/tx_timer_interrupt.s b/ports/arm9/ac5/src/tx_timer_interrupt.s index 061c5806..86ddba6f 100644 --- a/ports/arm9/ac5/src/tx_timer_interrupt.s +++ b/ports/arm9/ac5/src/tx_timer_interrupt.s @@ -1,18 +1,18 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Timer */ ;/** */ @@ -44,46 +44,40 @@ ; AREA ||.text||, CODE, READONLY PRESERVE8 -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ -;/* _tx_timer_interrupt ARM9/AC5 */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ +;/* _tx_timer_interrupt ARM9/AC5 */ ;/* 6.1 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function processes the hardware timer interrupt. This */ -;/* processing includes incrementing the system clock and checking for */ -;/* time slice and/or timer expiration. If either is found, the */ -;/* interrupt context save/restore functions are called along with the */ -;/* expiration functions. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_timer_expiration_process Timer expiration processing */ -;/* _tx_thread_time_slice Time slice interrupted thread */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* interrupt vector */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ -;/* DATE NAME DESCRIPTION */ ;/* */ -;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* This function processes the hardware timer interrupt. This */ +;/* processing includes incrementing the system clock and checking for */ +;/* time slice and/or timer expiration. If either is found, the */ +;/* interrupt context save/restore functions are called along with the */ +;/* expiration functions. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_timer_expiration_process Timer expiration processing */ +;/* _tx_thread_time_slice Time slice interrupted thread */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* interrupt vector */ ;/* */ ;/**************************************************************************/ ;VOID _tx_timer_interrupt(VOID) @@ -107,7 +101,7 @@ _tx_timer_interrupt ; if (_tx_timer_time_slice) ; { ; - LDR r3, =_tx_timer_time_slice ; Pickup address of time-slice + LDR r3, =_tx_timer_time_slice ; Pickup address of time-slice LDR r2, [r3, #0] ; Pickup time-slice CMP r2, #0 ; Is it non-active? BEQ __tx_timer_no_time_slice ; Yes, skip time-slice processing @@ -225,13 +219,13 @@ __tx_timer_dont_activate ; if (_tx_timer_expired_time_slice) ; { ; - LDR r3, =_tx_timer_expired_time_slice ; Pickup addr of time-slice expired + LDR r3, =_tx_timer_expired_time_slice ; Pickup addr of time-slice expired LDR r2, [r3, #0] ; Pickup the actual flag CMP r2, #0 ; See if the flag is set BEQ __tx_timer_not_ts_expiration ; No, skip time-slice processing ; ; /* Time slice interrupted thread. */ -; _tx_thread_time_slice(); +; _tx_thread_time_slice(); BL _tx_thread_time_slice ; Call time-slice processing ; |