diff options
| author | Frédéric Desbiens <[email protected]> | 2026-10-02 10:42:44 -0400 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-10-02 10:42:44 -0400 |
| commit | 93387b0a60382a29579bbad5045c68328e3751df (patch) | |
| tree | 42be790d602cb76f55090e5a7c418df7ea2b3428 /ports/cortex_a34/ac6 | |
| parent | 44d7c95c582d415c4ad84527180b29c93c3bf664 (diff) | |
| parent | 28281cd5647d4671236ca08d19bd18ed15b2265a (diff) | |
Merge pull request #783 from eclipse-threadx/devv6.5.2.202603_rel
Merged changes ahead of the v6.5.2.202603 release
Diffstat (limited to 'ports/cortex_a34/ac6')
19 files changed, 238 insertions, 107 deletions
diff --git a/ports/cortex_a34/ac6/example_build/sample_threadx/.cproject b/ports/cortex_a34/ac6/example_build/sample_threadx/.cproject index 7310f92f..9d1e039f 100644 --- a/ports/cortex_a34/ac6/example_build/sample_threadx/.cproject +++ b/ports/cortex_a34/ac6/example_build/sample_threadx/.cproject @@ -29,7 +29,7 @@ <toolChain id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.1388095870" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6"> - <option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.689426261" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" useByScannerDiscovery="false" value="cortex-a34.AArch64.ARMv8.Neon.Crypto" valueType="string"/> + <option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.689426261" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" useByScannerDiscovery="false" value="Cortex-A34.AArch64.ARMv8.Neon.Crypto" valueType="string"/> <targetPlatform id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.1388095870.857809581" name=""/> diff --git a/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_aliases.h b/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_aliases.h new file mode 100644 index 00000000..826ba973 --- /dev/null +++ b/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_aliases.h @@ -0,0 +1,113 @@ +// +// Aliases for GICv3 registers +// +// Copyright (c) 2016-2017 Arm Limited (or its affiliates). All rights reserved. +// Use, modification and redistribution of this file is subject to your possession of a +// valid End User License Agreement for the Arm Product of which these examples are part of +// and your compliance with all applicable terms and conditions of such licence agreement. +// + +#ifndef GICV3_ALIASES_H +#define GICV3_ALIASES_H + +#ifndef __clang__ + +/* + * Mapping of MSR and MRS to physical and virtual CPU interface registers + * + * Arm Generic Interrupt Controller Architecture Specification + * GIC architecture version 3.0 and version 4.0 + * Table 8-5 + */ +#define ICC_AP0R0_EL1 S3_0_C12_C8_4 +#define ICC_AP0R1_EL1 S3_0_C12_C8_5 +#define ICC_AP0R2_EL1 S3_0_C12_C8_6 +#define ICC_AP0R3_EL1 S3_0_C12_C8_7 + +#define ICC_AP1R0_EL1 S3_0_C12_C9_0 +#define ICC_AP1R1_EL1 S3_0_C12_C9_1 +#define ICC_AP1R2_EL1 S3_0_C12_C9_2 +#define ICC_AP1R3_EL1 S3_0_C12_C9_3 + +#define ICC_ASGI1R_EL1 S3_0_C12_C11_6 + +#define ICC_BPR0_EL1 S3_0_C12_C8_3 +#define ICC_BPR1_EL1 S3_0_C12_C12_3 + +#define ICC_CTLR_EL1 S3_0_C12_C12_4 +#define ICC_CTLR_EL3 S3_6_C12_C12_4 + +#define ICC_DIR_EL1 S3_0_C12_C11_1 + +#define ICC_EOIR0_EL1 S3_0_C12_C8_1 +#define ICC_EOIR1_EL1 S3_0_C12_C12_1 + +#define ICC_HPPIR0_EL1 S3_0_C12_C8_2 +#define ICC_HPPIR1_EL1 S3_0_C12_C12_2 + +#define ICC_IAR0_EL1 S3_0_C12_C8_0 +#define ICC_IAR1_EL1 S3_0_C12_C12_0 + +#define ICC_IGRPEN0_EL1 S3_0_C12_C12_6 +#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7 +#define ICC_IGRPEN1_EL3 S3_6_C12_C12_7 + +#define ICC_PMR_EL1 S3_0_C4_C6_0 +#define ICC_RPR_EL1 S3_0_C12_C11_3 + +#define ICC_SGI0R_EL1 S3_0_C12_C11_7 +#define ICC_SGI1R_EL1 S3_0_C12_C11_5 + +#define ICC_SRE_EL1 S3_0_C12_C12_5 +#define ICC_SRE_EL2 S3_4_C12_C9_5 +#define ICC_SRE_EL3 S3_6_C12_C12_5 + +/* + * Mapping of MSR and MRS to virtual interface control registers + * + * Arm Generic Interrupt Controller Architecture Specification + * GIC architecture version 3.0 and version 4.0 + * Table 8-6 + */ +#define ICH_AP0R0_EL2 S3_4_C12_C8_0 +#define ICH_AP0R1_EL2 S3_4_C12_C8_1 +#define ICH_AP0R2_EL2 S3_4_C12_C8_2 +#define ICH_AP0R3_EL2 S3_4_C12_C8_3 + +#define ICH_AP1R0_EL2 S3_4_C12_C9_0 +#define ICH_AP1R1_EL2 S3_4_C12_C9_1 +#define ICH_AP1R2_EL2 S3_4_C12_C9_2 +#define ICH_AP1R3_EL2 S3_4_C12_C9_3 + +#define ICH_HCR_EL2 S3_4_C12_C11_0 + +#define ICH_VTR_EL2 S3_4_C12_C11_1 + +#define ICH_MISR_EL2 S3_4_C12_C11_2 + +#define ICH_EISR_EL2 S3_4_C12_C11_3 + +#define ICH_ELRSR_EL2 S3_4_C12_C11_5 + +#define ICH_VMCR_EL2 S3_4_C12_C11_7 + +#define ICH_LR0_EL2 S3_4_C12_C12_0 +#define ICH_LR1_EL2 S3_4_C12_C12_1 +#define ICH_LR2_EL2 S3_4_C12_C12_2 +#define ICH_LR3_EL2 S3_4_C12_C12_3 +#define ICH_LR4_EL2 S3_4_C12_C12_4 +#define ICH_LR5_EL2 S3_4_C12_C12_5 +#define ICH_LR6_EL2 S3_4_C12_C12_6 +#define ICH_LR7_EL2 S3_4_C12_C12_7 +#define ICH_LR8_EL2 S3_4_C12_C13_0 +#define ICH_LR9_EL2 S3_4_C12_C13_1 +#define ICH_LR10_EL2 S3_4_C12_C13_2 +#define ICH_LR11_EL2 S3_4_C12_C13_3 +#define ICH_LR12_EL2 S3_4_C12_C13_4 +#define ICH_LR13_EL2 S3_4_C12_C13_5 +#define ICH_LR14_EL2 S3_4_C12_C13_6 +#define ICH_LR15_EL2 S3_4_C12_C13_7 + +#endif /* not __clang__ */ + +#endif /* GICV3_ALIASES */ diff --git a/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicc.h b/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicc.h index beaa9157..998d92b5 100644 --- a/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicc.h +++ b/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicc.h @@ -9,6 +9,11 @@ #ifndef GICV3_gicc_h #define GICV3_gicc_h +#include "GICv3_aliases.h" + +#define stringify_no_expansion(x) #x +#define stringify(x) stringify_no_expansion(x) + /**********************************************************************/ typedef enum @@ -21,42 +26,42 @@ typedef enum static inline void setICC_SRE_EL1(ICC_SREBits_t mode) { - asm("msr ICC_SRE_EL1, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_SRE_EL1)", %0\n; isb" :: "r" ((uint64_t)mode)); } static inline uint64_t getICC_SRE_EL1(void) { uint64_t retc; - asm("mrs %0, ICC_SRE_EL1\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_SRE_EL1)"\n" : "=r" (retc)); return retc; } static inline void setICC_SRE_EL2(ICC_SREBits_t mode) { - asm("msr ICC_SRE_EL2, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_SRE_EL2)", %0\n; isb" :: "r" ((uint64_t)mode)); } static inline uint64_t getICC_SRE_EL2(void) { uint64_t retc; - asm("mrs %0, ICC_SRE_EL2\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_SRE_EL2)"\n" : "=r" (retc)); return retc; } static inline void setICC_SRE_EL3(ICC_SREBits_t mode) { - asm("msr ICC_SRE_EL3, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_SRE_EL3)", %0\n; isb" :: "r" ((uint64_t)mode)); } static inline uint64_t getICC_SRE_EL3(void) { uint64_t retc; - asm("mrs %0, ICC_SRE_EL3\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_SRE_EL3)"\n" : "=r" (retc)); return retc; } @@ -72,17 +77,17 @@ typedef enum static inline void setICC_IGRPEN0_EL1(ICC_IGRPBits_t mode) { - asm("msr ICC_IGRPEN0_EL1, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_IGRPEN0_EL1)", %0\n; isb" :: "r" ((uint64_t)mode)); } static inline void setICC_IGRPEN1_EL1(ICC_IGRPBits_t mode) { - asm("msr ICC_IGRPEN1_EL1, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_IGRPEN1_EL1)", %0\n; isb" :: "r" ((uint64_t)mode)); } static inline void setICC_IGRPEN1_EL3(ICC_IGRPBits_t mode) { - asm("msr ICC_IGRPEN1_EL3, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_IGRPEN1_EL3)", %0\n; isb" :: "r" ((uint64_t)mode)); } /**********************************************************************/ @@ -102,28 +107,28 @@ typedef enum static inline void setICC_CTLR_EL1(ICC_CTLRBits_t mode) { - asm("msr ICC_CTLR_EL1, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_CTLR_EL1)", %0\n; isb" :: "r" ((uint64_t)mode)); } static inline uint64_t getICC_CTLR_EL1(void) { uint64_t retc; - asm("mrs %0, ICC_CTLR_EL1\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_CTLR_EL1)"\n" : "=r" (retc)); return retc; } static inline void setICC_CTLR_EL3(ICC_CTLRBits_t mode) { - asm("msr ICC_CTLR_EL3, %0\n; isb" :: "r" ((uint64_t)mode)); + asm("msr "stringify(ICC_CTLR_EL3)", %0\n; isb" :: "r" ((uint64_t)mode)); } static inline uint64_t getICC_CTLR_EL3(void) { uint64_t retc; - asm("mrs %0, ICC_CTLR_EL3\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_CTLR_EL3)"\n" : "=r" (retc)); return retc; } @@ -134,7 +139,7 @@ static inline uint64_t getICC_IAR0(void) { uint64_t retc; - asm("mrs %0, ICC_IAR0_EL1\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_IAR0_EL1)"\n" : "=r" (retc)); return retc; } @@ -143,46 +148,46 @@ static inline uint64_t getICC_IAR1(void) { uint64_t retc; - asm("mrs %0, ICC_IAR1_EL1\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_IAR1_EL1)"\n" : "=r" (retc)); return retc; } static inline void setICC_EOIR0(uint32_t interrupt) { - asm("msr ICC_EOIR0_EL1, %0\n; isb" :: "r" ((uint64_t)interrupt)); + asm("msr "stringify(ICC_EOIR0_EL1)", %0\n; isb" :: "r" ((uint64_t)interrupt)); } static inline void setICC_EOIR1(uint32_t interrupt) { - asm("msr ICC_EOIR1_EL1, %0\n; isb" :: "r" ((uint64_t)interrupt)); + asm("msr "stringify(ICC_EOIR1_EL1)", %0\n; isb" :: "r" ((uint64_t)interrupt)); } static inline void setICC_DIR(uint32_t interrupt) { - asm("msr ICC_DIR_EL1, %0\n; isb" :: "r" ((uint64_t)interrupt)); + asm("msr "stringify(ICC_DIR_EL1)", %0\n; isb" :: "r" ((uint64_t)interrupt)); } static inline void setICC_PMR(uint32_t priority) { - asm("msr ICC_PMR_EL1, %0\n; isb" :: "r" ((uint64_t)priority)); + asm("msr "stringify(ICC_PMR_EL1)", %0\n; isb" :: "r" ((uint64_t)priority)); } static inline void setICC_BPR0(uint32_t binarypoint) { - asm("msr ICC_BPR0_EL1, %0\n; isb" :: "r" ((uint64_t)binarypoint)); + asm("msr "stringify(ICC_BPR0_EL1)", %0\n; isb" :: "r" ((uint64_t)binarypoint)); } static inline void setICC_BPR1(uint32_t binarypoint) { - asm("msr ICC_BPR1_EL1, %0\n; isb" :: "r" ((uint64_t)binarypoint)); + asm("msr "stringify(ICC_BPR1_EL1)", %0\n; isb" :: "r" ((uint64_t)binarypoint)); } static inline uint64_t getICC_BPR0(void) { uint64_t retc; - asm("mrs %0, ICC_BPR0_EL1\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_BPR0_EL1)"\n" : "=r" (retc)); return retc; } @@ -191,7 +196,7 @@ static inline uint64_t getICC_BPR1(void) { uint64_t retc; - asm("mrs %0, ICC_BPR1_EL1\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_BPR1_EL1)"\n" : "=r" (retc)); return retc; } @@ -200,7 +205,7 @@ static inline uint64_t getICC_RPR(void) { uint64_t retc; - asm("mrs %0, ICC_RPR_EL1\n" : "=r" (retc)); + asm("mrs %0, "stringify(ICC_RPR_EL1)"\n" : "=r" (retc)); return retc; } @@ -221,7 +226,7 @@ static inline void setICC_SGI0R(uint8_t aff3, uint8_t aff2, ((uint64_t)aff1 << 16) | irm | targetlist | \ ((uint64_t)(intid & 0x0f) << 24)); - asm("msr ICC_SGI0R_EL1, %0\n; isb" :: "r" (packedbits)); + asm("msr "stringify(ICC_SGI0R_EL1)", %0\n; isb" :: "r" (packedbits)); } static inline void setICC_SGI1R(uint8_t aff3, uint8_t aff2, @@ -232,7 +237,7 @@ static inline void setICC_SGI1R(uint8_t aff3, uint8_t aff2, ((uint64_t)aff1 << 16) | irm | targetlist | \ ((uint64_t)(intid & 0x0f) << 24)); - asm("msr ICC_SGI1R_EL1, %0\n; isb" :: "r" (packedbits)); + asm("msr "stringify(ICC_SGI1R_EL1)", %0\n; isb" :: "r" (packedbits)); } static inline void setICC_ASGI1R(uint8_t aff3, uint8_t aff2, @@ -243,7 +248,7 @@ static inline void setICC_ASGI1R(uint8_t aff3, uint8_t aff2, ((uint64_t)aff1 << 16) | irm | targetlist | \ ((uint64_t)(intid & 0x0f) << 24)); - asm("msr ICC_ASGI1R_EL1, %0\n; isb" :: "r" (packedbits)); + asm("msr "stringify(ICC_ASGI1R_EL1)", %0\n; isb" :: "r" (packedbits)); } #endif /* ndef GICV3_gicc_h */ diff --git a/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicr.c b/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicr.c index 912ab2e4..d91aeb27 100644 --- a/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicr.c +++ b/ports/cortex_a34/ac6/example_build/sample_threadx/GICv3_gicr.c @@ -293,7 +293,7 @@ void SetPrivateIntSecurityBlock(uint32_t gicr, GICIGROUPRBits_t group) uint32_t groupmod; /* - * get each bit of group config duplicated over all 32 bits + * get each bit of group config duplicated over all 32-bits */ groupmod = (uint32_t)(((int32_t)group << (nbits - 1)) >> 31); group = (uint32_t)(((int32_t)group << nbits) >> 31); diff --git a/ports/cortex_a34/ac6/example_build/sample_threadx/sample_threadx.launch b/ports/cortex_a34/ac6/example_build/sample_threadx/sample_threadx.launch index 44afb600..7c5d62bb 100644 --- a/ports/cortex_a34/ac6/example_build/sample_threadx/sample_threadx.launch +++ b/ports/cortex_a34/ac6/example_build/sample_threadx/sample_threadx.launch @@ -5,64 +5,64 @@ <stringAttribute key="ANDROID_APP_DIR" value=""/> <stringAttribute key="ANDROID_PROCESS_NAME" value=""/> <mapAttribute key="AverageDurationTracker"> - <mapEntry key="*Fetching Data Model" value="2175329"/> - <mapEntry key="*list global low level symbols" value="1285824"/> + <mapEntry key="*Fetching Data Model" value="2164664"/> + <mapEntry key="*list global low level symbols" value="1257028"/> <mapEntry key="*loading memory from target" value="820184"/> - <mapEntry key="*loading values from target" value="19105203"/> + <mapEntry key="*loading values from target" value="17587201"/> <mapEntry key="*trace" value="71991640"/> - <mapEntry key="*updating expressions" value="116156985"/> + <mapEntry key="*updating expressions" value="65540292"/> <mapEntry key="*updating registers" value="44165495"/> <mapEntry key="*updating variables" value="8591428"/> <mapEntry key="Add Watchpoint" value="24597988"/> - <mapEntry key="AddEventObserver" value="3783094"/> - <mapEntry key="Evaluate" value="5585240"/> + <mapEntry key="AddEventObserver" value="3303997"/> + <mapEntry key="Evaluate" value="9741530"/> <mapEntry key="GlobalsLoaderCommand" value="154351059"/> <mapEntry key="areCachesAvailable" value="1362117"/> <mapEntry key="backtrace" value="5112231"/> <mapEntry key="break" value="2857608"/> <mapEntry key="checking tracepoints" value="181653"/> - <mapEntry key="compute execution mode" value="8129999"/> - <mapEntry key="continue" value="29213923"/> + <mapEntry key="compute execution mode" value="2388424"/> + <mapEntry key="continue" value="17295461"/> <mapEntry key="core" value="3940900"/> - <mapEntry key="directory" value="3909111"/> + <mapEntry key="directory" value="3642355"/> <mapEntry key="disable" value="1478680"/> - <mapEntry key="disassemble" value="108875923"/> + <mapEntry key="disassemble" value="73653580"/> <mapEntry key="enable" value="1860234"/> <mapEntry key="evaluate" value="2783965"/> <mapEntry key="evaluate address" value="17239727"/> <mapEntry key="get byte order" value="472733"/> - <mapEntry key="get capabilities" value="368069"/> - <mapEntry key="get execution addresss" value="998734"/> - <mapEntry key="get source lines" value="6158428"/> - <mapEntry key="get substitute paths" value="439569"/> + <mapEntry key="get capabilities" value="277384"/> + <mapEntry key="get execution addresss" value="803429"/> + <mapEntry key="get source lines" value="8797728"/> + <mapEntry key="get substitute paths" value="366134"/> <mapEntry key="get value" value="402104"/> <mapEntry key="getValidEncodings" value="1410473"/> - <mapEntry key="initialize command help" value="106557304"/> + <mapEntry key="initialize command help" value="91066852"/> <mapEntry key="interrupt" value="44963461"/> - <mapEntry key="list breakpoint options" value="1390967"/> - <mapEntry key="list breakpoints" value="1718183"/> - <mapEntry key="list instruction sets" value="1963806"/> - <mapEntry key="list signals" value="2235162"/> + <mapEntry key="list breakpoint options" value="1324766"/> + <mapEntry key="list breakpoints" value="1847541"/> + <mapEntry key="list instruction sets" value="1763403"/> + <mapEntry key="list signals" value="2185731"/> <mapEntry key="list source files" value="864344"/> - <mapEntry key="list watchpoint options" value="4710094"/> - <mapEntry key="list watchpoints" value="1044640"/> - <mapEntry key="loadfile" value="301226781"/> + <mapEntry key="list watchpoint options" value="4792947"/> + <mapEntry key="list watchpoints" value="1009370"/> + <mapEntry key="loadfile" value="374708990"/> <mapEntry key="next" value="25423704"/> <mapEntry key="nexti" value="29780513"/> <mapEntry key="remove" value="1521133"/> - <mapEntry key="run script" value="54442817"/> - <mapEntry key="set CWD" value="8047311"/> + <mapEntry key="run script" value="43050208"/> + <mapEntry key="set CWD" value="7281705"/> <mapEntry key="set breakpoint properties" value="4075180"/> - <mapEntry key="set debug-from" value="1635791"/> - <mapEntry key="set substitute-path" value="36281177"/> + <mapEntry key="set debug-from" value="1229495"/> + <mapEntry key="set substitute-path" value="35280088"/> <mapEntry key="set watchpoint properties" value="1458988"/> - <mapEntry key="source use_model_semihosting.ds" value="14186140"/> - <mapEntry key="start" value="61054248"/> + <mapEntry key="source use_model_semihosting.ds" value="11060320"/> + <mapEntry key="start" value="50342824"/> <mapEntry key="step" value="30959584"/> <mapEntry key="stepi" value="30815174"/> <mapEntry key="synchronizing trace ranges" value="74184"/> - <mapEntry key="toggleBreakpoint" value="5010527"/> - <mapEntry key="waitForTargetToStop" value="58813931"/> + <mapEntry key="toggleBreakpoint" value="11765863"/> + <mapEntry key="waitForTargetToStop" value="63934815"/> <mapEntry key="write expression" value="5812240"/> </mapAttribute> <stringAttribute key="CLOCK_SPEED" value="Auto"/> @@ -82,13 +82,10 @@ <stringAttribute key="FILES.DEBUG_RESIDENT_APP.RESOURCES.1.TYPE" value="APPLICATION_ON_TARGET"/> <stringAttribute key="FILES.DEBUG_RESIDENT_APP.RESOURCES.1.VALUE" value=""/> <intAttribute key="FILES.DEBUG_RESIDENT_APP.RESOURCES.COUNT" value="2"/> - <listAttribute key="FILES.DOWNLOAD_AND_DEBUG"> - <listEntry value="ON_DEMAND_LOAD"/> - <listEntry value="ALSO_LOAD_SYMBOLS"/> - </listAttribute> + <listAttribute key="FILES.DOWNLOAD_AND_DEBUG"/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.0.OPTION.ALSO_LOAD_SYMBOLS" value="true"/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.0.OPTION.ON_DEMAND_LOAD" value="true"/> - <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.0.TYPE" value="TARGET_DOWNLOAD_DIR"/> + <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.0.TYPE" value="APP_ON_HOST_TO_DOWNLOAD"/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.0.VALUE" value=""/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.1.OPTION.ALSO_LOAD_SYMBOLS" value="true"/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.1.OPTION.ON_DEMAND_LOAD" value="true"/> @@ -96,16 +93,13 @@ <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.1.VALUE" value=""/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.2.OPTION.ALSO_LOAD_SYMBOLS" value="true"/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.2.OPTION.ON_DEMAND_LOAD" value="true"/> - <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.2.TYPE" value="APP_ON_HOST_TO_DOWNLOAD"/> + <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.2.TYPE" value="TARGET_DOWNLOAD_DIR"/> <stringAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.2.VALUE" value=""/> <intAttribute key="FILES.DOWNLOAD_AND_DEBUG.RESOURCES.COUNT" value="3"/> - <listAttribute key="FILES.DOWNLOAD_DEBUG"> - <listEntry value="ON_DEMAND_LOAD"/> - <listEntry value="ALSO_LOAD_SYMBOLS"/> - </listAttribute> + <listAttribute key="FILES.DOWNLOAD_DEBUG"/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.0.OPTION.ALSO_LOAD_SYMBOLS" value="true"/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.0.OPTION.ON_DEMAND_LOAD" value="true"/> - <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.0.TYPE" value="TARGET_DOWNLOAD_DIR"/> + <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.0.TYPE" value="APP_ON_HOST_TO_DOWNLOAD"/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.0.VALUE" value=""/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.1.OPTION.ALSO_LOAD_SYMBOLS" value="true"/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.1.OPTION.ON_DEMAND_LOAD" value="true"/> @@ -113,7 +107,7 @@ <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.1.VALUE" value=""/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.2.OPTION.ALSO_LOAD_SYMBOLS" value="true"/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.2.OPTION.ON_DEMAND_LOAD" value="true"/> - <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.2.TYPE" value="APP_ON_HOST_TO_DOWNLOAD"/> + <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.2.TYPE" value="TARGET_DOWNLOAD_DIR"/> <stringAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.2.VALUE" value=""/> <intAttribute key="FILES.DOWNLOAD_DEBUG.RESOURCES.COUNT" value="3"/> <intAttribute key="FILES.DOWNLOAD_DEBUG_ANDROID.RESOURCES.COUNT" value="0"/> @@ -238,7 +232,7 @@ <stringAttribute key="config_db_platform_name" value="Arm FVP (Installed with Arm DS) - Base_A34x1"/> <stringAttribute key="config_db_project_type" value="Bare Metal Debug"/> <stringAttribute key="config_db_project_type_id" value="BARE_METAL"/> - <stringAttribute key="config_db_taxonomy_id" value="/platform/armfvp_installedwitharmds_/base_a35x1"/> + <stringAttribute key="config_db_taxonomy_id" value="/platform/armfvp_installedwitharmds_/base_a34x1"/> <stringAttribute key="config_file" value="CDB://../../Arm FVP/Base_A34x1/iris_config.xml"/> <booleanAttribute key="connectOnly" value="false"/> <stringAttribute key="connect_existing_model" value="false"/> @@ -288,7 +282,7 @@ <mapEntry key="6" value="NODE_TRANSFER_ELEMENT_COUNT,0;NODE_TRANSFER_ELEMENT_SIZE_IN_BYTES,4;NODE_TYPE,VALUE;FORMATTER,Unsigned Decimal"/> <mapEntry key="7" value="NODE_TRANSFER_ELEMENT_COUNT,0;NODE_TRANSFER_ELEMENT_SIZE_IN_BYTES,4;NODE_TYPE,VALUE;FORMATTER,Unsigned Decimal"/> </mapAttribute> - <stringAttribute key="debugger.view.ExpressionsView:DebugOutlineColumnState" value="OutlineConfig1	8	0	true	true	187	-1	true	1	false	true	90	-1	true	2	true	true	108	-1	true	3	true	true	57	-1	true	4	true	true	50	-1	true	5	true	true	37	-1	true	6	true	true	151	-1	true	7	true	true	53	-1	true"/> + <stringAttribute key="debugger.view.ExpressionsView:DebugOutlineColumnState" value="OutlineConfig1	8	0	true	true	255	-1	true	1	false	true	127	-1	true	2	true	true	159	-1	true	3	true	true	75	-1	true	4	true	true	65	-1	true	5	true	true	48	-1	true	6	true	true	240	-1	true	7	true	true	69	-1	true"/> <stringAttribute key="debugger.view.MemoryView" value="<?xml version="1.0" encoding="UTF-8"?> <page> 	<memoryView/> </page> "/> <listAttribute key="debugger.view.MemoryView:current"> <listEntry value=""/> @@ -317,15 +311,10 @@ <stringAttribute key="os_extension_id" value="com.arm.debug.os.threadx"/> <booleanAttribute key="runAfterConnect" value="false"/> <stringAttribute key="runTargetInitializationScript" value="${workspace_loc:/sample_threadx/use_model_semihosting.ds}"/> - <mapAttribute key="scripts_view_script_links"> - <mapEntry key="C:\Users\andrejm\work\git\AzureRTOS\threadx_andrejm_armv8a\ports\cortex_a35\ac6\example_build\sample_threadx\use_model_semihosting.ds" value=""/> - <mapEntry key="C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_a35\ac6\example_build\sample_threadx\use_model_semihosting.ds" value=""/> - </mapAttribute> <listAttribute key="setup"> <listEntry value="CDB://Scripts/rtsm_launcher.py"/> <listEntry value=""FVP_Base_Cortex-A34x1""/> </listAttribute> <stringAttribute key="stopAtExpression" value="*$ENTRYPOINT"/> - <stringAttribute key="substitutePath" value="<?xml version="1.0" encoding="UTF-8"?> <tuplelist> 	<tuple> 		<ta>C:\temp1702\tx\</ta> 		<tb>C:\temp1702\tx\</tb> 	</tuple> </tuplelist> "/> <stringAttribute key="watchpoints" value="<?xml version="1.0" encoding="UTF-8"?> <watchpoints> </watchpoints> "/> </launchConfiguration> diff --git a/ports/cortex_a34/ac6/example_build/sample_threadx/startup.S b/ports/cortex_a34/ac6/example_build/sample_threadx/startup.S index 9f0fc211..3952a200 100644 --- a/ports/cortex_a34/ac6/example_build/sample_threadx/startup.S +++ b/ports/cortex_a34/ac6/example_build/sample_threadx/startup.S @@ -13,7 +13,7 @@ #include "v8_mmu.h" #include "v8_system.h" - +#include "GICv3_aliases.h" .section StartUp, "ax" .balign 4 diff --git a/ports/cortex_a34/ac6/example_build/tx/.cproject b/ports/cortex_a34/ac6/example_build/tx/.cproject index a7e80321..dacd531b 100644 --- a/ports/cortex_a34/ac6/example_build/tx/.cproject +++ b/ports/cortex_a34/ac6/example_build/tx/.cproject @@ -29,7 +29,7 @@ <toolChain id="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6.174366982" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6"> - <option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.319260876" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" useByScannerDiscovery="false" value="cortex-a34.AArch64.ARMv8.Neon.Crypto" valueType="string"/> + <option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.319260876" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" useByScannerDiscovery="false" value="Cortex-A34.AArch64.ARMv8.Neon.Crypto" valueType="string"/> <targetPlatform id="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6.174366982.1434986226" name=""/> diff --git a/ports/cortex_a34/ac6/inc/tx_port.h b/ports/cortex_a34/ac6/inc/tx_port.h index 4487de47..691fedd8 100644 --- a/ports/cortex_a34/ac6/inc/tx_port.h +++ b/ports/cortex_a34/ac6/inc/tx_port.h @@ -361,7 +361,7 @@ VOID tx_thread_fp_disable(VOID); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX ARMv8-A Version 6.5.1.202602a *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX ARMv8-A Version 6.5.2.202603 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a34/ac6/src/tx_initialize_low_level.S b/ports/cortex_a34/ac6/src/tx_initialize_low_level.S index 55bcfaa8..7d2a4be3 100644 --- a/ports/cortex_a34/ac6/src/tx_initialize_low_level.S +++ b/ports/cortex_a34/ac6/src/tx_initialize_low_level.S @@ -19,6 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -27,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_initialize_low_level ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -65,16 +68,18 @@ _tx_initialize_low_level: MSR DAIFSet, 0x3 // Lockout interrupts + /* Save the system stack pointer. */ // _tx_thread_system_stack_ptr = (VOID_PTR) (sp); LDR x0, =_tx_thread_system_stack_ptr // Pickup address of system stack ptr MOV x1, sp // Pickup SP + SUB x1, x1, #15 // BIC x1, x1, #0xF // Get 16-bit alignment STR x1, [x0] // Store system stack /* Save the first available memory address. */ - /* _tx_initialize_unused_memory = (VOID_PTR) Image$$ZI$$Limit; */ + // _tx_initialize_unused_memory = (VOID_PTR) Image$$ZI$$Limit; LDR x0, =_tx_initialize_unused_memory // Pickup address of unused memory ptr LDR x1, =zi_limit // Pickup unused memory address diff --git a/ports/cortex_a34/ac6/src/tx_thread_context_restore.S b/ports/cortex_a34/ac6/src/tx_thread_context_restore.S index 3870de0d..9ba82827 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_context_restore.S +++ b/ports/cortex_a34/ac6/src/tx_thread_context_restore.S @@ -19,8 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 /**************************************************************************/ @@ -28,7 +29,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_context_restore ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ diff --git a/ports/cortex_a34/ac6/src/tx_thread_context_save.S b/ports/cortex_a34/ac6/src/tx_thread_context_save.S index 8bc7e21b..c2395155 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_context_save.S +++ b/ports/cortex_a34/ac6/src/tx_thread_context_save.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_context_save ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ diff --git a/ports/cortex_a34/ac6/src/tx_thread_fp_disable.c b/ports/cortex_a34/ac6/src/tx_thread_fp_disable.c index c69f6de5..25233f77 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_fp_disable.c +++ b/ports/cortex_a34/ac6/src/tx_thread_fp_disable.c @@ -15,18 +15,20 @@ /** */ /** ThreadX Component */ /** */ -/** Module Manager */ +/** Thread */ /** */ /**************************************************************************/ /**************************************************************************/ #define TX_SOURCE_CODE + +/* Include necessary system files. */ + #include "tx_api.h" #include "tx_thread.h" - /**************************************************************************/ /* */ /* FUNCTION RELEASE */ @@ -35,7 +37,7 @@ /* 6.1.10 */ /* AUTHOR */ /* */ -/* Scott Larson, Microsoft Corporation */ +/* William E. Lamie, Microsoft Corporation */ /* */ /* DESCRIPTION */ /* */ @@ -47,7 +49,7 @@ /* */ /* OUTPUT */ /* */ -/* status Completion status */ +/* None */ /* */ /* CALLS */ /* */ @@ -84,3 +86,4 @@ ULONG system_state; } } } + diff --git a/ports/cortex_a34/ac6/src/tx_thread_interrupt_control.S b/ports/cortex_a34/ac6/src/tx_thread_interrupt_control.S index d4235180..21ec2dd1 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_interrupt_control.S +++ b/ports/cortex_a34/ac6/src/tx_thread_interrupt_control.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_interrupt_control ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ diff --git a/ports/cortex_a34/ac6/src/tx_thread_interrupt_disable.S b/ports/cortex_a34/ac6/src/tx_thread_interrupt_disable.S index 08f0e7e1..af2ef874 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_interrupt_disable.S +++ b/ports/cortex_a34/ac6/src/tx_thread_interrupt_disable.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_interrupt_disable ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ diff --git a/ports/cortex_a34/ac6/src/tx_thread_interrupt_restore.S b/ports/cortex_a34/ac6/src/tx_thread_interrupt_restore.S index 69a859da..3e0780d0 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_interrupt_restore.S +++ b/ports/cortex_a34/ac6/src/tx_thread_interrupt_restore.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_interrupt_restore ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ diff --git a/ports/cortex_a34/ac6/src/tx_thread_schedule.S b/ports/cortex_a34/ac6/src/tx_thread_schedule.S index 4d3763eb..d15e7ded 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_a34/ac6/src/tx_thread_schedule.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_schedule ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ @@ -217,4 +219,3 @@ _skip_solicited_fp_restore: MSR DAIF, x4 // Recover DAIF RET // Return to caller // } - diff --git a/ports/cortex_a34/ac6/src/tx_thread_stack_build.S b/ports/cortex_a34/ac6/src/tx_thread_stack_build.S index d1002b2c..01084da7 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_stack_build.S +++ b/ports/cortex_a34/ac6/src/tx_thread_stack_build.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_stack_build ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ diff --git a/ports/cortex_a34/ac6/src/tx_thread_system_return.S b/ports/cortex_a34/ac6/src/tx_thread_system_return.S index 112e1454..b7593d79 100644 --- a/ports/cortex_a34/ac6/src/tx_thread_system_return.S +++ b/ports/cortex_a34/ac6/src/tx_thread_system_return.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_system_return ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ diff --git a/ports/cortex_a34/ac6/src/tx_timer_interrupt.S b/ports/cortex_a34/ac6/src/tx_timer_interrupt.S index ac61450b..1b80a7f2 100644 --- a/ports/cortex_a34/ac6/src/tx_timer_interrupt.S +++ b/ports/cortex_a34/ac6/src/tx_timer_interrupt.S @@ -19,7 +19,9 @@ /** */ /**************************************************************************/ /**************************************************************************/ - +#ifdef TX_INCLUDE_USER_DEFINE_FILE +#include "tx_user.h" +#endif .text .align 3 @@ -28,7 +30,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_timer_interrupt ARMv8-A */ -/* 6.1.10 */ +/* 6.3.0 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ |