diff options
| author | Yuxin Zhou <[email protected]> | 2021-07-28 07:24:02 +0000 |
|---|---|---|
| committer | Yuxin Zhou <[email protected]> | 2021-07-28 07:24:02 +0000 |
| commit | d0dab582506f132690b35b36ffea129ad51110b0 (patch) | |
| tree | 13add80dd314dc38efc1830f3d1f36b5a2596e98 /ports/cortex_m0/gnu | |
| parent | 244365fc6a937c754cfc6bb8e6895dc6f37bac0e (diff) | |
Release 6.1.8v6.1.8_rel
Diffstat (limited to 'ports/cortex_m0/gnu')
| -rw-r--r-- | ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S | 118 |
1 files changed, 79 insertions, 39 deletions
diff --git a/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S b/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S index b4c52df3..aaf3ece2 100644 --- a/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S +++ b/ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S @@ -135,55 +135,95 @@ _tx_initialize_low_level: @ LDR r0, =0xE000E000 @ Build address of NVIC registers LDR r1, =SYSTICK_CYCLES - STR r1, [r0, #0x14] @ Setup SysTick Reload Value - LDR r1, =0x7 @ Build SysTick Control Enable Value - STR r1, [r0, #0x10] @ Setup SysTick Control -@ -@ /* Configure handler priorities. */ -@ - LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM - LDR r0, =0xE000E000 @ Build address of NVIC registers - LDR r2, =0xD18 @ - ADD r0, r0, r2 @ - STR r1, [r0] @ Setup System Handlers 4-7 Priority Registers - LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv - LDR r0, =0xE000E000 @ Build address of NVIC registers - LDR r2, =0xD1C @ - ADD r0, r0, r2 @ - STR r1, [r0] @ Setup System Handlers 8-11 Priority Registers - @ Note: SVC must be lowest priority, which is 0xFF - LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM - LDR r0, =0xE000E000 @ Build address of NVIC registers - LDR r2, =0xD20 @ - ADD r0, r0, r2 @ - STR r1, [r0] @ Setup System Handlers 12-15 Priority Registers - @ Note: PnSV must be lowest priority, which is 0xFF - -@ -@ /* Return to caller. */ -@ - BX lr -@} -@ -@ /* System Tick timer interrupt handler */ + STR r1, [r0, #0x14] // Setup SysTick Reload Value + LDR r1, =0x7 // Build SysTick Control Enable Value + STR r1, [r0, #0x10] // Setup SysTick Control + + /* Configure handler priorities. */ + + LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM + LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r2, =0xD18 // + ADD r0, r0, r2 // + STR r1, [r0] // Setup System Handlers 4-7 Priority Registers + LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv + LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r2, =0xD1C // + ADD r0, r0, r2 // + STR r1, [r0] // Setup System Handlers 8-11 Priority Registers + // Note: SVC must be lowest priority, which is 0xFF + LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM + LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r2, =0xD20 // + ADD r0, r0, r2 // + STR r1, [r0] // Setup System Handlers 12-15 Priority Registers + // Note: PnSV must be lowest priority, which is 0xFF + + /* Return to caller. */ + BX lr +// } + +/* Define shells for each of the unused vectors. */ + .global __tx_BadHandler + .thumb_func +__tx_BadHandler: + B __tx_BadHandler + +/* added to catch the hardfault */ + .global __tx_HardfaultHandler + .thumb_func +__tx_HardfaultHandler: + B __tx_HardfaultHandler + +/* Generic interrupt handler template */ + .global __tx_IntHandler + .thumb_func +__tx_IntHandler: +// VOID InterruptHandler (VOID) +// { + PUSH {r0, lr} +#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY + BL _tx_execution_isr_enter // Call the ISR enter function +#endif + /* Do interrupt handler work here */ + /* BL <your C Function>.... */ +#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY + BL _tx_execution_isr_exit // Call the ISR exit function +#endif + POP {r0, r1} + MOV lr, r1 + BX lr +// } + +/* System Tick timer interrupt handler */ .global __tx_SysTickHandler .global SysTick_Handler .thumb_func __tx_SysTickHandler: .thumb_func SysTick_Handler: -@ VOID SysTick_Handler (VOID) -@ { -@ +// VOID SysTick_Handler (VOID) +// { PUSH {r0, lr} -#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_enter @ Call the ISR enter function +#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE)) + BL _tx_execution_isr_enter // Call the ISR enter function #endif BL _tx_timer_interrupt -#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_exit @ Call the ISR exit function +#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE)) + BL _tx_execution_isr_exit // Call the ISR exit function #endif POP {r0, r1} MOV lr, r1 BX lr -@ } +// } + +/* NMI, DBG handlers */ + .global __tx_NMIHandler + .thumb_func +__tx_NMIHandler: + B __tx_NMIHandler + + .global __tx_DBGHandler + .thumb_func +__tx_DBGHandler: + B __tx_DBGHandler |
