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authorFrédéric Desbiens <[email protected]>2026-10-02 10:42:44 -0400
committerGitHub <[email protected]>2026-10-02 10:42:44 -0400
commit93387b0a60382a29579bbad5045c68328e3751df (patch)
tree42be790d602cb76f55090e5a7c418df7ea2b3428 /ports/cortex_m0/iar
parent44d7c95c582d415c4ad84527180b29c93c3bf664 (diff)
parent28281cd5647d4671236ca08d19bd18ed15b2265a (diff)
Merge pull request #783 from eclipse-threadx/devv6.5.2.202603_rel
Merged changes ahead of the v6.5.2.202603 release
Diffstat (limited to 'ports/cortex_m0/iar')
-rw-r--r--ports/cortex_m0/iar/CMakeLists.txt1
-rw-r--r--ports/cortex_m0/iar/example_build/tx.ewp2
-rw-r--r--ports/cortex_m0/iar/example_build/tx_initialize_low_level.s19
-rw-r--r--ports/cortex_m0/iar/inc/tx_port.h7
-rw-r--r--ports/cortex_m0/iar/src/tx_iar.c9
-rw-r--r--ports/cortex_m0/iar/src/tx_thread_system_return.s3
6 files changed, 16 insertions, 25 deletions
diff --git a/ports/cortex_m0/iar/CMakeLists.txt b/ports/cortex_m0/iar/CMakeLists.txt
index 57be3aeb..e9583502 100644
--- a/ports/cortex_m0/iar/CMakeLists.txt
+++ b/ports/cortex_m0/iar/CMakeLists.txt
@@ -16,6 +16,7 @@ target_sources(${PROJECT_NAME}
)
target_include_directories(${PROJECT_NAME}
+ SYSTEM
PUBLIC
${CMAKE_CURRENT_LIST_DIR}/inc
)
diff --git a/ports/cortex_m0/iar/example_build/tx.ewp b/ports/cortex_m0/iar/example_build/tx.ewp
index 94481d2e..a3b29c58 100644
--- a/ports/cortex_m0/iar/example_build/tx.ewp
+++ b/ports/cortex_m0/iar/example_build/tx.ewp
@@ -1047,7 +1047,7 @@
</option>
<option>
<name>IarchiveOutput</name>
- <state>C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m0\iar\Debug\Exe\tx.a</state>
+ <state>###Unitialized###</state>
</option>
</data>
</settings>
diff --git a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
index 991f7809..9f83fa06 100644
--- a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
+++ b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
+; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -7,6 +8,7 @@
; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
+; Portions of this file were generated with AI assistance.
;
;
;/**************************************************************************/
@@ -20,10 +22,8 @@
;/**************************************************************************/
;
;
- EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_timer_interrupt
- EXTERN __vector_table
EXTERN _tx_execution_isr_enter
EXTERN _tx_execution_isr_exit
;
@@ -100,21 +100,6 @@ _tx_initialize_low_level:
; ORRS r1, r1, r2 ; Set the CYCCNTENA bit
; STR r1, [r0] ; Enable the cycle count register
;
-; /* Setup Vector Table Offset Register. */
-;
- LDR r0, =0xE000E000 ; Build address of NVIC registers
- LDR r2, =0xD08 ; Offset to vector base register
- ADD r0, r0, r2 ; Build vector base register
- LDR r1, =__vector_table ; Pickup address of vector table
- STR r1, [r0] ; Set vector table address
-;
-; /* Set system stack pointer from vector value. */
-;
- LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer
- LDR r1, =__vector_table ; Pickup address of vector table
- LDR r1, [r1] ; Pickup reset stack pointer
- STR r1, [r0] ; Save system stack pointer
-;
; /* Configure SysTick. */
;
LDR r0, =0xE000E000 ; Build address of NVIC registers
diff --git a/ports/cortex_m0/iar/inc/tx_port.h b/ports/cortex_m0/iar/inc/tx_port.h
index 2dcb7b4e..6c9621d6 100644
--- a/ports/cortex_m0/iar/inc/tx_port.h
+++ b/ports/cortex_m0/iar/inc/tx_port.h
@@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/
+// Portions of this file were generated with AI assistance.
+
/**************************************************************************/
/**************************************************************************/
@@ -313,12 +315,13 @@ __istate_t interrupt_save;
/* Set PendSV to invoke ThreadX scheduler. */
*((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000);
- __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory");
+ __asm__ volatile ("dsb sy \n isb sy " : : : "memory");
if (__get_IPSR() == 0)
{
interrupt_save = __get_interrupt_state();
__enable_interrupt();
__set_interrupt_state(interrupt_save);
+ __asm__ volatile ("isb sy " : : : "memory");
}
}
@@ -339,7 +342,7 @@ __istate_t interrupt_save;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
- "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0/IAR Version 6.5.1.202602a *";
+ "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0/IAR Version 6.5.2.202603 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];
diff --git a/ports/cortex_m0/iar/src/tx_iar.c b/ports/cortex_m0/iar/src/tx_iar.c
index 238b485e..ab6c209c 100644
--- a/ports/cortex_m0/iar/src/tx_iar.c
+++ b/ports/cortex_m0/iar/src/tx_iar.c
@@ -9,6 +9,7 @@
* SPDX-License-Identifier: MIT
**************************************************************************/
+// Portions of this file were generated with AI assistance.
/**************************************************************************/
/**************************************************************************/
@@ -270,7 +271,7 @@ TX_MUTEX *mutex_ptr;
mutex_ptr = &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++];
/* Check for wrap-around on the next free mutex. */
- if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK)
+ if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK)
{
/* Yes, set the free index back to 0. */
@@ -287,7 +288,7 @@ TX_MUTEX *mutex_ptr;
}
/* Determine if a free mutex was found. */
- if (i >= _MAX_LOCK)
+ if (i >= _MAX_FLOCK)
{
/* Error! No more free mutexes! */
@@ -678,7 +679,7 @@ TX_MUTEX *mutex_ptr;
mutex_ptr = &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++];
/* Check for wrap-around on the next free mutex. */
- if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK)
+ if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK)
{
/* Yes, set the free index back to 0. */
@@ -695,7 +696,7 @@ TX_MUTEX *mutex_ptr;
}
/* Determine if a free mutex was found. */
- if (i >= _MAX_LOCK)
+ if (i >= _MAX_FLOCK)
{
/* Error! No more free mutexes! */
diff --git a/ports/cortex_m0/iar/src/tx_thread_system_return.s b/ports/cortex_m0/iar/src/tx_thread_system_return.s
index 9426a137..929b3a00 100644
--- a/ports/cortex_m0/iar/src/tx_thread_system_return.s
+++ b/ports/cortex_m0/iar/src/tx_thread_system_return.s
@@ -9,7 +9,7 @@
; * SPDX-License-Identifier: MIT
; **************************************************************************/
-; Some portions generated by Gemini (Gemini 2.0 Flash).
+; Portions of this file were generated with AI assistance.
;
;
;/**************************************************************************/
@@ -79,6 +79,7 @@ _tx_thread_system_return:
MRS r1, PRIMASK ; Thread context returning, pickup PRIMASK
CPSIE i ; Enable interrupts
MSR PRIMASK, r1 ; Restore original interrupt posture
+ ISB SY ; Flush pipeline
_isr_context:
BX lr ; Return to caller
;}