summaryrefslogtreecommitdiff
path: root/ports/cortex_m23/ac6
diff options
context:
space:
mode:
authorYuxin Zhou <[email protected]>2021-04-03 01:03:21 +0000
committerYuxin Zhou <[email protected]>2021-04-03 01:03:21 +0000
commitb12bd44faaca46dbad4b06cb93a8669c6e36e02a (patch)
tree033f9c24f940f39d8c4b1b40fcd0d388e80bf317 /ports/cortex_m23/ac6
parent6ffaf848a06ce9dbf8948254ed806ed94ae58305 (diff)
Release 6.1.6v6.1.6_rel
Diffstat (limited to 'ports/cortex_m23/ac6')
-rw-r--r--ports/cortex_m23/ac6/inc/tx_port.h2
-rw-r--r--ports/cortex_m23/ac6/readme_threadx.txt6
-rw-r--r--ports/cortex_m23/ac6/src/tx_thread_schedule.s19
3 files changed, 25 insertions, 2 deletions
diff --git a/ports/cortex_m23/ac6/inc/tx_port.h b/ports/cortex_m23/ac6/inc/tx_port.h
index 0781c2b0..0e3f401c 100644
--- a/ports/cortex_m23/ac6/inc/tx_port.h
+++ b/ports/cortex_m23/ac6/inc/tx_port.h
@@ -381,7 +381,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
-#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
+#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
diff --git a/ports/cortex_m23/ac6/readme_threadx.txt b/ports/cortex_m23/ac6/readme_threadx.txt
index 66bf1636..45188e83 100644
--- a/ports/cortex_m23/ac6/readme_threadx.txt
+++ b/ports/cortex_m23/ac6/readme_threadx.txt
@@ -145,6 +145,12 @@ For generic code revision information, please refer to the readme_threadx_generi
file, which is included in your distribution. The following details the revision
information associated with this specific port of ThreadX:
+04-02-2021 Release 6.1.6 changes:
+ tx_port.h Updated macro definition
+ tx_thread_schedule.s Added low power support
+
+03-02-2021 The following files were changed/added for version 6.1.5:
+ tx_port.h Added ULONG64_DEFINED
09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using AC6 tools.
diff --git a/ports/cortex_m23/ac6/src/tx_thread_schedule.s b/ports/cortex_m23/ac6/src/tx_thread_schedule.s
index 442a0567..dfe83983 100644
--- a/ports/cortex_m23/ac6/src/tx_thread_schedule.s
+++ b/ports/cortex_m23/ac6/src/tx_thread_schedule.s
@@ -26,7 +26,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M23/AC6 */
-/* 6.1 */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,6 +59,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 Scott Larson Initial Version 6.1 */
+/* 04-02-2021 Scott Larson Modified comment(s), added */
+/* low power code, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -253,11 +256,25 @@ __tx_ts_wait:
LDR r1, [r2] // Pickup the next thread to execute pointer
STR r1, [r0] // Store it in the current pointer
CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready!
+
+#ifdef TX_LOW_POWER
+ PUSH {r0-r3}
+ BL tx_low_power_enter // Possibly enter low power mode
+ POP {r0-r3}
+#endif
+
#ifdef TX_ENABLE_WFI
DSB // Ensure no outstanding memory transactions
WFI // Wait for interrupt
ISB // Ensure pipeline is flushed
#endif
+
+#ifdef TX_LOW_POWER
+ PUSH {r0-r3}
+ BL tx_low_power_exit // Exit low power mode
+ POP {r0-r3}
+#endif
+
CPSIE i // Enable interrupts
B __tx_ts_wait // Loop to continue waiting