Merge pull request #783 from eclipse-threadx/devv6.5.2.202603_rel

Merged changes ahead of the v6.5.2.202603 release

14 files changed, 475 insertions, 256 deletions

diff --git a/ports/cortex_r4/ac5/inc/tx_port.h b/ports/cortex_r4/ac5/inc/tx_port.h
index c9d8600a..a3824f26 100644
--- a/ports/cortex_r4/ac5/inc/tx_port.h
+++ b/ports/cortex_r4/ac5/inc/tx_port.h
@@ -318,7 +318,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX  Cortex-R4/AC5 Version 6.5.1.202602a *";
+                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX  Cortex-R4/AC5 Version 6.5.2.202603 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif
diff --git a/ports/cortex_r4/ac6/example_build/sample_threadx/cortex-r4_tx.launch b/ports/cortex_r4/ac6/example_build/sample_threadx/cortex-r4_tx.launch
index 37577868..a7a8d767 100644
--- a/ports/cortex_r4/ac6/example_build/sample_threadx/cortex-r4_tx.launch
+++ b/ports/cortex_r4/ac6/example_build/sample_threadx/cortex-r4_tx.launch
@@ -155,7 +155,7 @@
 <booleanAttribute key="VFS_ENABLED" value="true"/>
 <stringAttribute key="VFS_LOCAL_DIR" value="${workspace_loc}"/>
 <stringAttribute key="VFS_REMOTE_MOUNT" value="/writeable"/>
-<stringAttribute key="breakpoints" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;&#10;&lt;breakpoints&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;94&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;94&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;95&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;95&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/CMSIS_RTOS_RTX/RTOS/RTX/Boards/ARM/VE_R4/RTX_ex1/gic.c&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\CMSIS_RTOS_RTX\RTOS\RTX\Boards\ARM\VE_R4\RTX_ex1\gic.c&quot; line=&quot;115&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/CMSIS_RTOS_RTX/RTOS/RTX/Boards/ARM/VE_R4/RTX_ex1/gic.c&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\CMSIS_RTOS_RTX\RTOS\RTX\Boards\ARM\VE_R4\RTX_ex1\gic.c&quot; line=&quot;115&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/CMSIS_RTOS_RTX/RTOS/RTX/SRC/ARM/HAL_CR4.c&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\CMSIS_RTOS_RTX\RTOS\RTX\SRC\ARM\HAL_CR4.c&quot; line=&quot;434&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/CMSIS_RTOS_RTX/RTOS/RTX/SRC/ARM/HAL_CR4.c&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\CMSIS_RTOS_RTX\RTOS\RTX\SRC\ARM\HAL_CR4.c&quot; line=&quot;434&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;97&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;97&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/CMSIS_RTOS_RTX/RTOS/RTX/Boards/ARM/VE_R4/RTX_ex1/ARM/startup_VE_R4.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\CMSIS_RTOS_RTX\RTOS\RTX\Boards\ARM\VE_R4\RTX_ex1\ARM\startup_VE_R4.S&quot; line=&quot;303&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/CMSIS_RTOS_RTX/RTOS/RTX/Boards/ARM/VE_R4/RTX_ex1/ARM/startup_VE_R4.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\CMSIS_RTOS_RTX\RTOS\RTX\Boards\ARM\VE_R4\RTX_ex1\ARM\startup_VE_R4.S&quot; line=&quot;303&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/tx_initialize_low_level.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\tx_initialize_low_level.S&quot; line=&quot;350&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/tx_initialize_low_level.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\tx_initialize_low_level.S&quot; line=&quot;350&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;96&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\startup.S&quot; line=&quot;96&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/sample_threadx.c&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\sample_threadx.c&quot; line=&quot;385&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4/sample_threadx.c&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4\sample_threadx.c&quot; line=&quot;385&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&#9;&lt;breakpoint ignorecount=&quot;0&quot; threadenabled=&quot;no&quot; core_list=&quot;&quot; continue=&quot;no&quot; verboseBreakpoints=&quot;yes&quot; kind=&quot;SOURCEPOSITION&quot;&gt;&#10;&#9;&#9;&lt;master_location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4_sample_threadx/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4_sample_threadx\startup.S&quot; line=&quot;87&quot;/&gt;&#10;&#9;&#9;&lt;location index=&quot;0&quot; enabled=&quot;true&quot; version=&quot;2&quot; debugFile=&quot;D:/Documents/DS-5 Workspace/cortex-r4_sample_threadx/startup.S&quot; hostFile=&quot;D:\Documents\DS-5 Workspace\cortex-r4_sample_threadx\startup.S&quot; line=&quot;87&quot;/&gt;&#10;&#9;&lt;/breakpoint&gt;&#10;&lt;/breakpoints&gt;&#10;"/>
+<stringAttribute key="breakpoints" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;&#10;&lt;breakpoints&gt;&#10;&lt;/breakpoints&gt;&#10;"/>
 <listAttribute key="com.arm.debug.views.common.AddressTracker.debugger.view.DisassemblyView.addresses">
 <listEntry value="&lt;Next Instruction&gt;"/>
 <listEntry value=""/>
diff --git a/ports/cortex_r4/ac6/inc/tx_port.h b/ports/cortex_r4/ac6/inc/tx_port.h
index 8c3cfce8..97d6b50a 100644
--- a/ports/cortex_r4/ac6/inc/tx_port.h
+++ b/ports/cortex_r4/ac6/inc/tx_port.h
@@ -321,7 +321,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/AC6 Version 6.5.1.202602a *";
+                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/AC6 Version 6.5.2.202603 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif
diff --git a/ports/cortex_r4/ac6/src/tx_thread_stack_build.S b/ports/cortex_r4/ac6/src/tx_thread_stack_build.S
index a2993136..57ae4152 100644
--- a/ports/cortex_r4/ac6/src/tx_thread_stack_build.S
+++ b/ports/cortex_r4/ac6/src/tx_thread_stack_build.S
@@ -8,6 +8,7 @@
  *
  * SPDX-License-Identifier: MIT
  **************************************************************************/
+// Portions of this file were generated with AI assistance.
 
 
 /**************************************************************************/
@@ -143,7 +144,7 @@ _tx_thread_stack_build:
     MRS     r3, CPSR                            // Pickup CPSR
     BIC     r3, r3, #CPSR_MASK                  // Mask mode bits of CPSR
     ORR     r3, r3, #SVC_MODE                   // Build CPSR, SVC mode, interrupts enabled
-    TST     r1, 1                               // Test if Thumb bit is set in entry function address
+    TST     r1, #1                              // Test if Thumb bit is set in entry function address
     ITE NE
     ORRNE   r3, r3, #THUMB_BIT                  // Yes, set the Thumb bit
     BICEQ   r3, r3, #THUMB_BIT                  // No, clear the Thumb bit
diff --git a/ports/cortex_r4/ghs/inc/tx_port.h b/ports/cortex_r4/ghs/inc/tx_port.h
index 6a636f2c..2247f128 100644
--- a/ports/cortex_r4/ghs/inc/tx_port.h
+++ b/ports/cortex_r4/ghs/inc/tx_port.h
@@ -376,7 +376,7 @@ asm void restore_ints(int a)
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/Green Hills Version 6.5.1.202602a *";
+                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/Green Hills Version 6.5.2.202603 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif
diff --git a/ports/cortex_r4/gnu/CMakeLists.txt b/ports/cortex_r4/gnu/CMakeLists.txt
new file mode 100644
index 00000000..328020d0
--- /dev/null
+++ b/ports/cortex_r4/gnu/CMakeLists.txt
@@ -0,0 +1,34 @@
+# Copyright (c) 2026 Eclipse ThreadX contributors
+# SPDX-License-Identifier: MIT
+# Portions of this file were generated with AI assistance.
+#
+# ThreadX port sources for cortex_r4, GNU tools.
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+    # {{BEGIN_TARGET_SOURCES}}
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_port_offset_check.c
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_context_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_nesting_end.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_fiq_nesting_start.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_irq_nesting_end.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_irq_nesting_start.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_vectored_context_save.S
+    ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+    # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+    SYSTEM
+    PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/inc
+)
diff --git a/ports/cortex_r4/gnu/example_build/build_threadx.sh b/ports/cortex_r4/gnu/example_build/build_threadx.sh
index f555a9b7..9d55743b 100755
--- a/ports/cortex_r4/gnu/example_build/build_threadx.sh
+++ b/ports/cortex_r4/gnu/example_build/build_threadx.sh
@@ -10,6 +10,7 @@
 # SPDX-License-Identifier: MIT
 #
 # AI Disclosure: This file was largely AI-generated by Copilot (Claude Sonnet 4.6).
+# Portions of this file were generated with AI assistance.
 # The AI-generated portions may be considered public domain (CC0-1.0)
 # and not subject to the project's licence. The human contributor has
 # reviewed and verified that the code is correct.
@@ -20,241 +21,277 @@
 set -e
 cd "$(dirname "$0")"
 
+# Toolchain selection. The default is the GNU toolchain, so an existing
+# invocation of this script behaves exactly as before. Set TOOLCHAIN=atfe to
+# build with Arm Toolchain for Embedded, which is LLVM based and is the
+# successor to Arm Compiler 6:
+#
+#     TOOLCHAIN=atfe ATFE_CLANG=/path/to/clang ./build_threadx.sh
+#
+: "${TOOLCHAIN:=gnu}"
+case "${TOOLCHAIN}" in
+    gnu)
+        CC="arm-none-eabi-gcc"
+        AR="arm-none-eabi-ar"
+        TARGET_FLAGS=""
+        ENTRY_FLAG="-ereset_handler"
+        SYSCALL_LIB="--specs=nosys.specs"
+        ;;
+    atfe)
+        CC="${ATFE_CLANG:-clang}"
+        # llvm-ar ships beside clang in the toolchain.
+        case "${CC}" in
+            */*) AR="$(dirname "${CC}")/llvm-ar" ;;
+            *)   AR="llvm-ar" ;;
+        esac
+        TARGET_FLAGS="--target=arm-none-eabi"
+        ENTRY_FLAG="-Wl,--entry=reset_handler"
+        # picolibc leaves _exit to the application; the toolchain's own
+        # semihosting library supplies it, which suits an example that runs on
+        # a model.
+        SYSCALL_LIB="-lsemihost"
+        ;;
+    *)
+        echo "Unknown TOOLCHAIN '${TOOLCHAIN}'; expected gnu or atfe" >&2
+        exit 1
+        ;;
+esac
+
 rm -f tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 tx_initialize_low_level.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_stack_build.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_schedule.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_system_return.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_context_save.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_context_restore.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_interrupt_control.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_interrupt_disable.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_interrupt_restore.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_context_save.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_nesting_start.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_irq_nesting_start.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_irq_nesting_end.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_nesting_end.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_context_restore.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 ../src/tx_thread_vectored_context_save.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c
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-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
-arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_disable.o tx_thread_interrupt_restore.o tx_thread_fiq_context_save.o tx_thread_fiq_nesting_start.o tx_thread_irq_nesting_start.o tx_thread_irq_nesting_end.o
-arm-none-eabi-ar -r tx.a tx_thread_fiq_nesting_end.o tx_thread_fiq_context_restore.o tx_thread_vectored_context_save.o tx_initialize_low_level.o
-arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
-arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
-arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o
-arm-none-eabi-ar -r tx.a tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o
-arm-none-eabi-ar -r tx.a tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o
-arm-none-eabi-ar -r tx.a tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o tx_event_flags_performance_system_info_get.o
-arm-none-eabi-ar -r tx.a tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o
-arm-none-eabi-ar -r tx.a tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o
-arm-none-eabi-ar -r tx.a tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o
-arm-none-eabi-ar -r tx.a tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o 
-arm-none-eabi-ar -r tx.a tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o
-arm-none-eabi-ar -r tx.a tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o
-arm-none-eabi-ar -r tx.a tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o tx_semaphore_put_notify.o
-arm-none-eabi-ar -r tx.a tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o
-arm-none-eabi-ar -r tx.a tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o
-arm-none-eabi-ar -r tx.a tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o
-arm-none-eabi-ar -r tx.a tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o
-arm-none-eabi-ar -r tx.a tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o
-arm-none-eabi-ar -r tx.a tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o
-arm-none-eabi-ar -r tx.a tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o
-arm-none-eabi-ar -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o 
-arm-none-eabi-ar -r tx.a tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o
-arm-none-eabi-ar -r tx.a tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o
-arm-none-eabi-ar -r tx.a txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o 
-arm-none-eabi-ar -r tx.a txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o 
-arm-none-eabi-ar -r tx.a txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o 
-arm-none-eabi-ar -r tx.a txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o
-arm-none-eabi-ar -r tx.a txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o txe_queue_prioritize.o
-arm-none-eabi-ar -r tx.a txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o
-arm-none-eabi-ar -r tx.a txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o
-arm-none-eabi-ar -r tx.a txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o 
-arm-none-eabi-ar -r tx.a txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o
-arm-none-eabi-ar -r tx.a txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 tx_initialize_low_level.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_stack_build.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_schedule.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_system_return.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_context_save.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_context_restore.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_interrupt_control.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_timer_interrupt.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_interrupt_disable.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_interrupt_restore.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_context_save.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_nesting_start.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_irq_nesting_start.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_irq_nesting_end.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_nesting_end.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_fiq_context_restore.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 ../src/tx_thread_vectored_context_save.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+"${AR}" -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
+"${AR}" -r tx.a tx_thread_interrupt_disable.o tx_thread_interrupt_restore.o tx_thread_fiq_context_save.o tx_thread_fiq_nesting_start.o tx_thread_irq_nesting_start.o tx_thread_irq_nesting_end.o
+"${AR}" -r tx.a tx_thread_fiq_nesting_end.o tx_thread_fiq_context_restore.o tx_thread_vectored_context_save.o tx_initialize_low_level.o
+"${AR}" -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
+"${AR}" -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
+"${AR}" -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o
+"${AR}" -r tx.a tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o
+"${AR}" -r tx.a tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o
+"${AR}" -r tx.a tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o tx_event_flags_performance_system_info_get.o
+"${AR}" -r tx.a tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o
+"${AR}" -r tx.a tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o
+"${AR}" -r tx.a tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o
+"${AR}" -r tx.a tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o 
+"${AR}" -r tx.a tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o
+"${AR}" -r tx.a tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o
+"${AR}" -r tx.a tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o tx_semaphore_put_notify.o
+"${AR}" -r tx.a tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o
+"${AR}" -r tx.a tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o
+"${AR}" -r tx.a tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o
+"${AR}" -r tx.a tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o
+"${AR}" -r tx.a tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o
+"${AR}" -r tx.a tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o
+"${AR}" -r tx.a tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o
+"${AR}" -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o 
+"${AR}" -r tx.a tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o
+"${AR}" -r tx.a tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o
+"${AR}" -r tx.a txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o 
+"${AR}" -r tx.a txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o 
+"${AR}" -r tx.a txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o 
+"${AR}" -r tx.a txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o
+"${AR}" -r tx.a txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o txe_queue_prioritize.o
+"${AR}" -r tx.a txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o
+"${AR}" -r tx.a txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o
+"${AR}" -r tx.a txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o 
+"${AR}" -r tx.a txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o
+"${AR}" -r tx.a txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o
diff --git a/ports/cortex_r4/gnu/example_build/build_threadx_sample.bat b/ports/cortex_r4/gnu/example_build/build_threadx_sample.bat
index 517b6d62..72444e4b 100644
--- a/ports/cortex_r4/gnu/example_build/build_threadx_sample.bat
+++ b/ports/cortex_r4/gnu/example_build/build_threadx_sample.bat
@@ -2,5 +2,5 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-r4 reset.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-r4 crt0.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-r4 tx_initialize_low_level.S
 arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-r4 -T sample_threadx.ld reset.o crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libc.a libgcc.a -o sample_threadx.out -M > sample_threadx.map
+arm-none-eabi-gcc -g -nostartfiles -mcpu=cortex-r4 -T sample_threadx.ld --specs=nosys.specs -o sample_threadx.out -Wl,-Map=sample_threadx.map reset.o crt0.o tx_initialize_low_level.o sample_threadx.o tx.a
 
diff --git a/ports/cortex_r4/gnu/example_build/build_threadx_sample.sh b/ports/cortex_r4/gnu/example_build/build_threadx_sample.sh
index 74fa3941..7871bae4 100755
--- a/ports/cortex_r4/gnu/example_build/build_threadx_sample.sh
+++ b/ports/cortex_r4/gnu/example_build/build_threadx_sample.sh
@@ -10,6 +10,7 @@
 # SPDX-License-Identifier: MIT
 #
 # AI Disclosure: This file was largely AI-generated by Copilot (Claude Sonnet 4.6).
+# Portions of this file were generated with AI assistance.
 # The AI-generated portions may be considered public domain (CC0-1.0)
 # and not subject to the project's licence. The human contributor has
 # reviewed and verified that the code is correct.
@@ -20,9 +21,45 @@
 set -e
 cd "$(dirname "$0")"
 
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 reset.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 crt0.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 tx_initialize_low_level.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-r4 -T sample_threadx.ld reset.o crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libc.a libgcc.a -o sample_threadx.out -M > sample_threadx.map
+# Toolchain selection. The default is the GNU toolchain, so an existing
+# invocation of this script behaves exactly as before. Set TOOLCHAIN=atfe to
+# build with Arm Toolchain for Embedded, which is LLVM based and is the
+# successor to Arm Compiler 6:
+#
+#     TOOLCHAIN=atfe ATFE_CLANG=/path/to/clang ./build_threadx_sample.sh
+#
+: "${TOOLCHAIN:=gnu}"
+case "${TOOLCHAIN}" in
+    gnu)
+        CC="arm-none-eabi-gcc"
+        AR="arm-none-eabi-ar"
+        TARGET_FLAGS=""
+        ENTRY_FLAG="-ereset_handler"
+        SYSCALL_LIB="--specs=nosys.specs"
+        ;;
+    atfe)
+        CC="${ATFE_CLANG:-clang}"
+        # llvm-ar ships beside clang in the toolchain.
+        case "${CC}" in
+            */*) AR="$(dirname "${CC}")/llvm-ar" ;;
+            *)   AR="llvm-ar" ;;
+        esac
+        TARGET_FLAGS="--target=arm-none-eabi"
+        ENTRY_FLAG="-Wl,--entry=reset_handler"
+        # picolibc leaves _exit to the application; the toolchain's own
+        # semihosting library supplies it, which suits an example that runs on
+        # a model.
+        SYSCALL_LIB="-lsemihost"
+        ;;
+    *)
+        echo "Unknown TOOLCHAIN '${TOOLCHAIN}'; expected gnu or atfe" >&2
+        exit 1
+        ;;
+esac
+
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 reset.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 crt0.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 tx_initialize_low_level.S
+"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-r4 -I../../../../common/inc -I../inc sample_threadx.c
+"${CC}" ${TARGET_FLAGS} -g -nostartfiles -mcpu=cortex-r4 -T sample_threadx.ld ${SYSCALL_LIB} -o sample_threadx.out -Wl,-Map=sample_threadx.map reset.o crt0.o tx_initialize_low_level.o sample_threadx.o tx.a
 
diff --git a/ports/cortex_r4/gnu/inc/tx_port.h b/ports/cortex_r4/gnu/inc/tx_port.h
index d85c2148..ada1a46a 100644
--- a/ports/cortex_r4/gnu/inc/tx_port.h
+++ b/ports/cortex_r4/gnu/inc/tx_port.h
@@ -8,6 +8,7 @@
  *
  * SPDX-License-Identifier: MIT
  **************************************************************************/
+// Portions of this file were generated with AI assistance.
 
 
 /**************************************************************************/
@@ -183,7 +184,16 @@ typedef unsigned short                          USHORT;
 
 #define TX_THREAD_EXTENSION_0
 #define TX_THREAD_EXTENSION_1
-#define TX_THREAD_EXTENSION_2
+
+/* TX_THREAD_EXTENSION_2 carries the per-thread VFP enable flag that the lazy
+   floating-point save and restore in tx_thread_schedule, tx_thread_system_return
+   and tx_thread_context_restore reads and writes as [thread, #144].  Without it
+   a TX_ENABLE_VFP_SUPPORT build has no such member and those accesses land on
+   tx_thread_filex_ptr instead.  Defined unconditionally, matching the Armv7-A
+   ports: the offset is hard-coded in assembly, so a conditional member would
+   move every following field and be correct in only one configuration.  */
+
+#define TX_THREAD_EXTENSION_2                   ULONG       tx_thread_vfp_enable;
 #define TX_THREAD_EXTENSION_3
 
 
@@ -238,6 +248,18 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_DELETE_EXTENSION(timer_ptr)
 
 
+/* Per-thread floating-point control, implemented in tx_thread_schedule and
+   available only in a TX_ENABLE_VFP_SUPPORT build.  Floating-point context is
+   saved lazily: only threads that ask for it pay the cost.  Note these set a
+   software flag for the context switch; enabling the FPU itself (CPACR, FPEXC)
+   remains the board support package's responsibility.  */
+
+#ifdef TX_ENABLE_VFP_SUPPORT
+void    tx_thread_vfp_enable(void);
+void    tx_thread_vfp_disable(void);
+#endif
+
+
 /* Determine if the ARM architecture has the CLZ instruction. This is available on
    architectures v5 and above. If available, redefine the macro for calculating the
    lowest bit set.  */
@@ -300,7 +322,7 @@ unsigned int   _tx_thread_interrupt_restore(UINT old_posture);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/GNU Version 6.5.1.202602a *";
+                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/GNU Version 6.5.2.202603 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif
diff --git a/ports/cortex_r4/gnu/src/tx_port_offset_check.c b/ports/cortex_r4/gnu/src/tx_port_offset_check.c
new file mode 100644
index 00000000..5504d28f
--- /dev/null
+++ b/ports/cortex_r4/gnu/src/tx_port_offset_check.c
@@ -0,0 +1,87 @@
+/***************************************************************************
+ * Copyright (C) 2026 Eclipse ThreadX contributors
+ *
+ * This program and the accompanying materials are made available under the
+ * terms of the MIT License which is available at
+ * https://opensource.org/licenses/MIT.
+ *
+ * AI Disclosure: This file was largely AI-generated by Claude Code (Opus 5).
+ * The AI-generated portions may be considered public domain (CC0-1.0)
+ * and not subject to the project's licence. The human contributor has
+ * reviewed and verified that the code is correct.
+ *
+ * SPDX-License-Identifier: MIT and CC0-1.0
+ **************************************************************************/
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Port Specific                                                       */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+/**************************************************************************/
+/*                                                                        */
+/*  PORT SPECIFIC C INFORMATION                            RELEASE        */
+/*                                                                        */
+/*    tx_port_offset_check.c                           Cortex-R4/GNU      */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    Compile-time verification of the TX_THREAD structure offsets that    */
+/*    this port's assembly reaches by hard-coded displacement.  The file   */
+/*    emits no code; it exists purely so that a layout change becomes a    */
+/*    build failure.                                                      */
+/*                                                                        */
+/*    Why this is needed: tx_thread_schedule.S,                            */
+/*    tx_thread_system_return.S and tx_thread_context_restore.S read and   */
+/*    write the per-thread VFP enable flag as [thread, #144].  Nothing in  */
+/*    the toolchain connects that literal to the C structure, so adding a  */
+/*    member, enabling an option that adds one, or reordering the port     */
+/*    extensions would silently retarget those accesses at an unrelated    */
+/*    field -- corrupting thread state in a way that is extremely hard to    */
+/*    diagnose from the symptom.  The offset was measured at 144 for the   */
+/*    default build and is asserted here.                                  */
+/*                                                                        */
+/*    NOTE: this port has no CMake build of its own, so this file takes     */
+/*    effect only in builds that compile everything under src/.  It is       */
+/*    still worthwhile: it emits no code, costs nothing, and protects every  */
+/*    build that does pick it up.                                          */
+/*                                                                        */
+/*    A negative array dimension is used rather than _Static_assert        */
+/*    because this project targets C99, where _Static_assert does not      */
+/*    exist.  If an assertion below fails, the compiler reports a negative  */
+/*    or zero-sized array for the named typedef.                           */
+/*                                                                        */
+/**************************************************************************/
+
+#include "tx_api.h"
+#include <stddef.h>
+
+/* Offset of the VFP enable flag as encoded in this port's assembly.
+   Overridable only so that the assertion itself can be tested.  */
+
+#ifndef TX_PORT_VFP_ENABLE_OFFSET
+#define TX_PORT_VFP_ENABLE_OFFSET   144
+#endif
+
+typedef char
+tx_port_assert_vfp_enable_offset_is_144[
+    (offsetof(TX_THREAD, tx_thread_vfp_enable) == TX_PORT_VFP_ENABLE_OFFSET)
+        ? 1 : -1];
+
+/* The stack pointer is read as [thread, #8] by tx_thread_schedule.S and
+   written by tx_thread_system_return.S, and the run counter as
+   [thread, #4].  Assert those too, since they are on the context-switch
+   critical path.  */
+
+typedef char
+tx_port_assert_stack_ptr_offset_is_8[
+    (offsetof(TX_THREAD, tx_thread_stack_ptr) == 8) ? 1 : -1];
+
+typedef char
+tx_port_assert_run_count_offset_is_4[
+    (offsetof(TX_THREAD, tx_thread_run_count) == 4) ? 1 : -1];
diff --git a/ports/cortex_r4/iar/example_build/tx.ewp b/ports/cortex_r4/iar/example_build/tx.ewp
index 72f432f8..c4a959b4 100644
--- a/ports/cortex_r4/iar/example_build/tx.ewp
+++ b/ports/cortex_r4/iar/example_build/tx.ewp
@@ -1047,7 +1047,7 @@
                 </option>
                 <option>
                     <name>IarchiveOutput</name>
-                    <state>C:\release\threadx\Debug\Exe\tx.a</state>
+                    <state>###Unitialized###</state>
                 </option>
             </data>
         </settings>
diff --git a/ports/cortex_r4/iar/inc/tx_port.h b/ports/cortex_r4/iar/inc/tx_port.h
index 8937bf13..2d1a2765 100644
--- a/ports/cortex_r4/iar/inc/tx_port.h
+++ b/ports/cortex_r4/iar/inc/tx_port.h
@@ -358,7 +358,7 @@ void    tx_thread_vfp_disable(void);
 
 #ifdef TX_THREAD_INIT
 CHAR                            _tx_version_id[] =
-                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/IAR Version 6.5.1.202602a *";
+                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX Cortex-R4/IAR Version 6.5.2.202603 *";
 #else
 #ifdef TX_MISRA_ENABLE
 extern  CHAR                    _tx_version_id[100];
diff --git a/ports/cortex_r4/iar/src/tx_iar.c b/ports/cortex_r4/iar/src/tx_iar.c
index 238b485e..ab6c209c 100644
--- a/ports/cortex_r4/iar/src/tx_iar.c
+++ b/ports/cortex_r4/iar/src/tx_iar.c
@@ -9,6 +9,7 @@
  * SPDX-License-Identifier: MIT
  **************************************************************************/
 
+// Portions of this file were generated with AI assistance.
 
 /**************************************************************************/
 /**************************************************************************/
@@ -270,7 +271,7 @@ TX_MUTEX    *mutex_ptr;
         mutex_ptr =  &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++];
 
         /* Check for wrap-around on the next free mutex.  */
-        if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK)
+        if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK)
         {
 
             /* Yes, set the free index back to 0.  */
@@ -287,7 +288,7 @@ TX_MUTEX    *mutex_ptr;
     }
 
     /* Determine if a free mutex was found.   */
-    if (i >= _MAX_LOCK)
+    if (i >= _MAX_FLOCK)
     {
 
         /* Error!  No more free mutexes!  */
@@ -678,7 +679,7 @@ TX_MUTEX    *mutex_ptr;
         mutex_ptr =  &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++];
 
         /* Check for wrap-around on the next free mutex.  */
-        if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK)
+        if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK)
         {
 
             /* Yes, set the free index back to 0.  */
@@ -695,7 +696,7 @@ TX_MUTEX    *mutex_ptr;
     }
 
     /* Determine if a free mutex was found.   */
-    if (i >= _MAX_LOCK)
+    if (i >= _MAX_FLOCK)
     {
 
         /* Error!  No more free mutexes!  */