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authorFrédéric Desbiens <[email protected]>2026-03-06 19:27:49 +0100
committerGitHub <[email protected]>2026-03-06 19:27:49 +0100
commit3726d7906b4808bfec7855fc088e073199df9120 (patch)
tree8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports/risc-v32/iar/src
parent4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff)
parentc3259a216026372e3833dd8996a68f77e8595fbd (diff)
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports/risc-v32/iar/src')
-rw-r--r--ports/risc-v32/iar/src/tx_initialize_low_level.s93
-rw-r--r--ports/risc-v32/iar/src/tx_thread_context_restore.s102
-rw-r--r--ports/risc-v32/iar/src/tx_thread_context_save.s89
-rw-r--r--ports/risc-v32/iar/src/tx_thread_interrupt_control.s79
-rw-r--r--ports/risc-v32/iar/src/tx_thread_schedule.s96
-rw-r--r--ports/risc-v32/iar/src/tx_thread_stack_build.s76
-rw-r--r--ports/risc-v32/iar/src/tx_thread_system_return.s95
-rw-r--r--ports/risc-v32/iar/src/tx_timer_interrupt.s85
8 files changed, 331 insertions, 384 deletions
diff --git a/ports/risc-v32/iar/src/tx_initialize_low_level.s b/ports/risc-v32/iar/src/tx_initialize_low_level.s
index af4caffc..28d81b04 100644
--- a/ports/risc-v32/iar/src/tx_initialize_low_level.s
+++ b/ports/risc-v32/iar/src/tx_initialize_low_level.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Initialize */
/** */
@@ -29,63 +30,56 @@
#include "tx_initialize.h"
#include "tx_thread.h"
#include "tx_timer.h" */
-
+
EXTERN _tx_thread_system_stack_ptr
EXTERN _tx_initialize_unused_memory
EXTERN _tx_thread_context_save
EXTERN _tx_thread_context_restore
EXTERN _tx_timer_interrupt
-
+
RSEG FREE_MEM:DATA
PUBLIC __tx_free_memory_start
__tx_free_memory_start:
- DS32 4
+ DS32 4
SECTION `.text`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_initialize_low_level RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function is responsible for any low-level processor */
-/* initialization, including setting up interrupt vectors, setting */
-/* up a periodic timer interrupt source, saving the system stack */
-/* pointer for use in ISR processing later, and finding the first */
-/* available RAM memory address for tx_application_define. */
-/* */
-/* INPUT */
-/* */
-/* None */
-/* */
-/* OUTPUT */
-/* */
-/* None */
-/* */
-/* CALLS */
-/* */
-/* None */
-/* */
-/* CALLED BY */
-/* */
-/* _tx_initialize_kernel_enter ThreadX entry function */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/* */
+/* DESCRIPTION */
+/* */
+/* This function is responsible for any low-level processor */
+/* initialization, including setting up interrupt vectors, setting */
+/* up a periodic timer interrupt source, saving the system stack */
+/* pointer for use in ISR processing later, and finding the first */
+/* available RAM memory address for tx_application_define. */
+/* */
+/* INPUT */
+/* */
+/* None */
+/* */
+/* OUTPUT */
+/* */
+/* None */
+/* */
+/* CALLS */
+/* */
+/* None */
+/* */
+/* CALLED BY */
+/* */
+/* _tx_initialize_kernel_enter ThreadX entry function */
+/**************************************************************************/
/* VOID _tx_initialize_low_level(VOID)
{ */
PUBLIC _tx_initialize_low_level
@@ -95,7 +89,7 @@ _tx_initialize_low_level:
la t0, __tx_free_memory_start ; Pickup first free address
sw t0, _tx_initialize_unused_memory, t1 ; Save unused memory address
- ret
+ ret
/* Define the actual timer interrupt/exception handler. */
@@ -110,7 +104,7 @@ __minterrupt_000007:
/* Before calling _tx_thread_context_save, we have to allocate an interrupt
stack frame and save the current value of x1 (ra). */
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
addi sp, sp, -260 ; Allocate space for all registers - with floating point enabled
#else
addi sp, sp, -128 ; Allocate space for all registers - without floating point enabled
@@ -126,4 +120,3 @@ __minterrupt_000007:
END
- \ No newline at end of file
diff --git a/ports/risc-v32/iar/src/tx_thread_context_restore.s b/ports/risc-v32/iar/src/tx_thread_context_restore.s
index 53763f64..56ab986b 100644
--- a/ports/risc-v32/iar/src/tx_thread_context_restore.s
+++ b/ports/risc-v32/iar/src/tx_thread_context_restore.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Thread */
/** */
@@ -28,7 +29,7 @@
/* #include "tx_api.h"
#include "tx_thread.h"
#include "tx_timer.h" */
-
+
EXTERN _tx_thread_execute_ptr
EXTERN _tx_thread_current_ptr
EXTERN _tx_timer_time_slice
@@ -42,47 +43,40 @@
SECTION `.text`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_thread_context_restore RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function restores the interrupt context if it is processing a */
-/* nested interrupt. If not, it returns to the interrupt thread if no */
-/* preemption is necessary. Otherwise, if preemption is necessary or */
-/* if no thread was running, the function returns to the scheduler. */
-/* */
-/* INPUT */
-/* */
-/* None */
-/* */
-/* OUTPUT */
-/* */
-/* None */
-/* */
-/* CALLS */
-/* */
-/* _tx_thread_schedule Thread scheduling routine */
-/* */
-/* CALLED BY */
-/* */
-/* ISRs Interrupt Service Routines */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/* */
+/* DESCRIPTION */
+/* */
+/* This function restores the interrupt context if it is processing a */
+/* nested interrupt. If not, it returns to the interrupt thread if no */
+/* preemption is necessary. Otherwise, if preemption is necessary or */
+/* if no thread was running, the function returns to the scheduler. */
+/* */
+/* INPUT */
+/* */
+/* None */
+/* */
+/* OUTPUT */
+/* */
+/* None */
+/* */
+/* CALLS */
+/* */
+/* _tx_thread_schedule Thread scheduling routine */
+/* */
+/* CALLED BY */
+/* */
+/* ISRs Interrupt Service Routines */
+/**************************************************************************/
/* VOID _tx_thread_context_restore(VOID)
{ */
PUBLIC _tx_thread_context_restore
@@ -108,10 +102,10 @@ _tx_thread_context_restore:
/* Interrupts are nested. */
- /* Just recover the saved registers and return to the point of
+ /* Just recover the saved registers and return to the point of
interrupt. */
-
-#if __iar_riscv_base_isa == rv32e
+
+#if __iar_riscv_base_isa == rv32e
/* Recover floating point registers. */
@@ -136,7 +130,7 @@ _tx_thread_context_restore:
flw f30,0xF4(sp) ; Recover ft10
flw f31,0xF8(sp) ; Recover ft11
lw t0, 0xFC(sp) ; Recover fcsr
- csrw fcsr, t0 ;
+ csrw fcsr, t0 ;
#endif
/* Recover standard registers. */
@@ -169,7 +163,7 @@ _tx_thread_context_restore:
lw x30, 0x38(sp) ; Recover t5
lw x31, 0x34(sp) ; Recover t6
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
addi sp, sp, 260 ; Recover stack frame - with floating point enabled
#else
addi sp, sp, 128 ; Recover stack frame - without floating point enabled
@@ -201,7 +195,7 @@ _tx_thread_no_preempt_restore:
lw sp, 8(t1) ; Switch back to thread's stack
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
/* Recover floating point registers. */
@@ -226,7 +220,7 @@ _tx_thread_no_preempt_restore:
flw f30,0xF4(sp) ; Recover ft10
flw f31,0xF8(sp) ; Recover ft11
lw t0, 0xFC(sp) ; Recover fcsr
- csrw fcsr, t0 ;
+ csrw fcsr, t0 ;
#endif
/* Recover the saved context and return to the point of interrupt. */
@@ -258,7 +252,7 @@ _tx_thread_no_preempt_restore:
lw x30, 0x38(sp) ; Recover t5
lw x31, 0x34(sp) ; Recover t6
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
addi sp, sp, 260 ; Recover stack frame - with floating point enabled
#else
addi sp, sp, 128 ; Recover stack frame - without floating point enabled
@@ -276,10 +270,10 @@ _tx_thread_preempt_restore:
ori t3, x0, 1 ; Build interrupt stack type
sw t3, 0(t0) ; Store stack type
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
/* Store floating point preserved registers. */
-
+
fsw f8, 0x9C(t0) ; Store fs0
fsw f9, 0xA0(t0) ; Store fs1
fsw f18, 0xC4(t0) ; Store fs2
diff --git a/ports/risc-v32/iar/src/tx_thread_context_save.s b/ports/risc-v32/iar/src/tx_thread_context_save.s
index c4b0f273..00b971ef 100644
--- a/ports/risc-v32/iar/src/tx_thread_context_save.s
+++ b/ports/risc-v32/iar/src/tx_thread_context_save.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Thread */
/** */
@@ -39,46 +40,39 @@
SECTION `.text`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_thread_context_save RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function saves the context of an executing thread in the */
-/* beginning of interrupt processing. The function also ensures that */
-/* the system stack is used upon return to the calling ISR. */
-/* */
-/* INPUT */
-/* */
-/* None */
-/* */
-/* OUTPUT */
-/* */
-/* None */
-/* */
-/* CALLS */
-/* */
-/* None */
-/* */
-/* CALLED BY */
-/* */
-/* ISRs */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/* */
+/* DESCRIPTION */
+/* */
+/* This function saves the context of an executing thread in the */
+/* beginning of interrupt processing. The function also ensures that */
+/* the system stack is used upon return to the calling ISR. */
+/* */
+/* INPUT */
+/* */
+/* None */
+/* */
+/* OUTPUT */
+/* */
+/* None */
+/* */
+/* CALLS */
+/* */
+/* None */
+/* */
+/* CALLED BY */
+/* */
+/* ISRs */
+/**************************************************************************/
/* VOID _tx_thread_context_save(VOID)
{ */
PUBLIC _tx_thread_context_save
@@ -122,10 +116,10 @@ _tx_thread_context_save:
csrr t0, mepc ; Load exception program counter
sw t0, 0x78(sp) ; Save it on the stack
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
/* Save floating point scratch registers. */
-
+
fsw f0, 0x7C(sp) ; Store ft0
fsw f1, 0x80(sp) ; Store ft1
fsw f2, 0x84(sp) ; Store ft2
@@ -154,7 +148,7 @@ _tx_thread_context_save:
call _tx_execution_isr_enter ; Call the ISR execution enter function
#endif
- ret ; Return to calling ISR
+ ret ; Return to calling ISR
_tx_thread_not_nested_save:
/* } */
@@ -190,7 +184,7 @@ _tx_thread_not_nested_save:
csrr t0, mepc ; Load exception program counter
sw t0, 0x78(sp) ; Save it on the stack
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
/* Save floating point scratch registers. */
@@ -251,7 +245,7 @@ _tx_thread_idle_system_save:
/* }
} */
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
addi sp, sp, 260 ; Recover stack frame - with floating point enabled
#else
addi sp, sp, 128 ; Recover the reserved stack space
@@ -259,4 +253,3 @@ _tx_thread_idle_system_save:
ret ; Return to calling ISR
END
- \ No newline at end of file
diff --git a/ports/risc-v32/iar/src/tx_thread_interrupt_control.s b/ports/risc-v32/iar/src/tx_thread_interrupt_control.s
index 08e87a9b..30a4bdda 100644
--- a/ports/risc-v32/iar/src/tx_thread_interrupt_control.s
+++ b/ports/risc-v32/iar/src/tx_thread_interrupt_control.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Thread */
/** */
@@ -32,45 +33,38 @@ SET_SR_MASK DEFINE 0xFFFFFFF0
SECTION `.text`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_thread_interrupt_control RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function is responsible for changing the interrupt lockout */
-/* posture of the system. */
-/* */
-/* INPUT */
-/* */
-/* new_posture New interrupt lockout posture */
-/* */
-/* OUTPUT */
-/* */
-/* old_posture Old interrupt lockout posture */
-/* */
-/* CALLS */
-/* */
-/* None */
-/* */
-/* CALLED BY */
-/* */
-/* Application Code */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/* */
+/* DESCRIPTION */
+/* */
+/* This function is responsible for changing the interrupt lockout */
+/* posture of the system. */
+/* */
+/* INPUT */
+/* */
+/* new_posture New interrupt lockout posture */
+/* */
+/* OUTPUT */
+/* */
+/* old_posture Old interrupt lockout posture */
+/* */
+/* CALLS */
+/* */
+/* None */
+/* */
+/* CALLED BY */
+/* */
+/* Application Code */
+/**************************************************************************/
/* UINT _tx_thread_interrupt_control(UINT new_posture)
{ */
PUBLIC _tx_thread_interrupt_control
@@ -81,7 +75,7 @@ _tx_thread_interrupt_control:
mv t1, t0 ; Save original mstatus for return
/* Apply the new interrupt posture. */
-
+
li t2, SET_SR_MASK ; Build set SR mask
and t0, t0, t2 ; Isolate interrupt lockout bits
or t0, t0, a0 ; Put new lockout bits in
@@ -90,4 +84,3 @@ _tx_thread_interrupt_control:
ret
/* } */
END
- \ No newline at end of file
diff --git a/ports/risc-v32/iar/src/tx_thread_schedule.s b/ports/risc-v32/iar/src/tx_thread_schedule.s
index 6ebccef3..d8ce66ce 100644
--- a/ports/risc-v32/iar/src/tx_thread_schedule.s
+++ b/ports/risc-v32/iar/src/tx_thread_schedule.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Thread */
/** */
@@ -40,48 +41,41 @@
SECTION `.text`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_thread_schedule RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function waits for a thread control block pointer to appear in */
-/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
-/* in the variable, the corresponding thread is resumed. */
-/* */
-/* INPUT */
-/* */
-/* None */
-/* */
-/* OUTPUT */
-/* */
+/* */
+/* DESCRIPTION */
+/* */
+/* This function waits for a thread control block pointer to appear in */
+/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
+/* in the variable, the corresponding thread is resumed. */
+/* */
+/* INPUT */
+/* */
+/* None */
+/* */
+/* OUTPUT */
+/* */
/* None */
-/* */
-/* CALLS */
-/* */
+/* */
+/* CALLS */
+/* */
/* None */
-/* */
-/* CALLED BY */
-/* */
-/* _tx_initialize_kernel_enter ThreadX entry function */
-/* _tx_thread_system_return Return to system from thread */
-/* _tx_thread_context_restore Restore thread's context */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/* */
+/* CALLED BY */
+/* */
+/* _tx_initialize_kernel_enter ThreadX entry function */
+/* _tx_thread_system_return Return to system from thread */
+/* _tx_thread_context_restore Restore thread's context */
+/**************************************************************************/
/* VOID _tx_thread_schedule(VOID)
{ */
PUBLIC _tx_thread_schedule
@@ -101,7 +95,7 @@ _tx_thread_schedule_loop:
/* }
while(_tx_thread_execute_ptr == TX_NULL); */
-
+
/* Yes! We have a thread to execute. Lockout interrupts and
transfer control to it. */
csrci mstatus, 0x08 ; Lockout interrupts
@@ -144,7 +138,7 @@ _tx_thread_schedule_loop:
/* Determine if floating point registers need to be recovered. */
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
flw f0, 0x7C(sp) ; Recover ft0
flw f1, 0x80(sp) ; Recover ft1
flw f2, 0x84(sp) ; Recover ft2
@@ -178,7 +172,7 @@ _tx_thread_schedule_loop:
flw f30,0xF4(sp) ; Recover ft10
flw f31,0xF8(sp) ; Recover ft11
lw t0, 0xFC(sp) ; Recover fcsr
- csrw fcsr, t0 ;
+ csrw fcsr, t0 ;
#endif
/* Recover standard registers. */
@@ -217,8 +211,8 @@ _tx_thread_schedule_loop:
lw x30, 0x38(sp) ; Recover t5
lw x31, 0x34(sp) ; Recover t6
-#if __iar_riscv_base_isa == rv32e
- addi sp, sp, 260 ; Recover stack frame - with floating point registers
+#if __iar_riscv_base_isa == rv32e
+ addi sp, sp, 260 ; Recover stack frame - with floating point registers
#else
addi sp, sp, 128 ; Recover stack frame - without floating point registers
#endif
@@ -226,7 +220,7 @@ _tx_thread_schedule_loop:
_tx_thread_synch_return:
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
flw f8, 0x3C(sp) ; Recover fs0
flw f9, 0x40(sp) ; Recover fs1
flw f18,0x44(sp) ; Recover fs2
@@ -240,7 +234,7 @@ _tx_thread_synch_return:
flw f26,0x64(sp) ; Recover fs10
flw f27,0x68(sp) ; Recover fs11
lw t0, 0x6C(sp) ; Recover fcsr
- csrw fcsr, t0 ;
+ csrw fcsr, t0 ;
#endif
/* Recover standard preserved registers. */
@@ -261,7 +255,7 @@ _tx_thread_synch_return:
lw x27, 0x04(sp) ; Recover s11
lw t0, 0x38(sp) ; Recover mstatus
csrw mstatus, t0 ; Store mstatus, enables interrupt
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
addi sp, sp, 116 ; Recover stack frame
#else
addi sp, sp, 64 ; Recover stack frame
@@ -270,4 +264,4 @@ _tx_thread_synch_return:
/* } */
END
-
+
diff --git a/ports/risc-v32/iar/src/tx_thread_stack_build.s b/ports/risc-v32/iar/src/tx_thread_stack_build.s
index 09b6ef09..eb850146 100644
--- a/ports/risc-v32/iar/src/tx_thread_stack_build.s
+++ b/ports/risc-v32/iar/src/tx_thread_stack_build.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Thread */
/** */
@@ -30,56 +31,49 @@
SECTION `.text`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_thread_stack_build RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
+/* */
+/* DESCRIPTION */
+/* */
/* This function builds a stack frame on the supplied thread's stack. */
/* The stack frame results in a fake interrupt return to the supplied */
-/* function pointer. */
-/* */
-/* INPUT */
-/* */
+/* function pointer. */
+/* */
+/* INPUT */
+/* */
/* thread_ptr Pointer to thread control blk */
/* function_ptr Pointer to return function */
-/* */
-/* OUTPUT */
-/* */
+/* */
+/* OUTPUT */
+/* */
/* None */
-/* */
-/* CALLS */
-/* */
+/* */
+/* CALLS */
+/* */
/* None */
-/* */
-/* CALLED BY */
-/* */
+/* */
+/* CALLED BY */
+/* */
/* _tx_thread_create Create thread service */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/**************************************************************************/
/* VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
{ */
PUBLIC _tx_thread_stack_build
_tx_thread_stack_build:
-
+
/* Build a fake interrupt frame. The form of the fake interrupt stack
on the RISC-V RV32 should look like the following after it is built:
-
+
Stack Top: 1 (00) Interrupt stack frame type
x27 (04) Initial s11
x26 (08) Initial s10
@@ -153,7 +147,7 @@ If floating point support:
/* Actually build the stack frame. */
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
addi t0, t0, -260
#else
addi t0, t0, -128 ; Allocate space for the stack frame
@@ -189,7 +183,7 @@ If floating point support:
sw x0, 108(t0) ; Initial a0
sw x0, 112(t0) ; Initial ra
sw a1, 120(t0) ; Initial mepc
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
sw x0, 124(t0) ; Inital ft0
sw x0, 128(t0) ; Inital ft1
sw x0, 132(t0) ; Inital ft2
@@ -236,4 +230,4 @@ If floating point support:
ret ; control block and return
/* } */
END
-
+
diff --git a/ports/risc-v32/iar/src/tx_thread_system_return.s b/ports/risc-v32/iar/src/tx_thread_system_return.s
index 22fcc4ef..377656f8 100644
--- a/ports/risc-v32/iar/src/tx_thread_system_return.s
+++ b/ports/risc-v32/iar/src/tx_thread_system_return.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Thread */
/** */
@@ -39,47 +40,40 @@
SECTION `.text`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_thread_system_return RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function is target processor specific. It is used to transfer */
-/* control from a thread back to the system. Only a minimal context */
-/* is saved since the compiler assumes temp registers are going to get */
-/* slicked by a function call anyway. */
-/* */
-/* INPUT */
-/* */
-/* None */
-/* */
-/* OUTPUT */
-/* */
-/* None */
-/* */
-/* CALLS */
-/* */
-/* _tx_thread_schedule Thread scheduling loop */
-/* */
-/* CALLED BY */
-/* */
-/* ThreadX components */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/* */
+/* DESCRIPTION */
+/* */
+/* This function is target processor specific. It is used to transfer */
+/* control from a thread back to the system. Only a minimal context */
+/* is saved since the compiler assumes temp registers are going to get */
+/* slicked by a function call anyway. */
+/* */
+/* INPUT */
+/* */
+/* None */
+/* */
+/* OUTPUT */
+/* */
+/* None */
+/* */
+/* CALLS */
+/* */
+/* _tx_thread_schedule Thread scheduling loop */
+/* */
+/* CALLED BY */
+/* */
+/* ThreadX components */
+/**************************************************************************/
/* VOID _tx_thread_system_return(VOID)
{ */
PUBLIC _tx_thread_system_return
@@ -87,16 +81,16 @@ _tx_thread_system_return:
/* Save minimal context on the stack. */
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
addi sp, sp, -116 ; Allocate space on the stack - with floating point enabled
#else
addi sp, sp, -64 ; Allocate space on the stack - without floating point enabled
#endif
-#if __iar_riscv_base_isa == rv32e
+#if __iar_riscv_base_isa == rv32e
/* Store floating point preserved registers. */
-
+
fsw f8, 0x3C(sp) ; Store fs0
fsw f9, 0x40(sp) ; Store fs1
fsw f18, 0x44(sp) ; Store fs2
@@ -133,14 +127,14 @@ _tx_thread_system_return:
/* Lockout interrupts. - will be enabled in _tx_thread_schedule */
-
- csrci mstatus, 0xF
-
+
+ csrci mstatus, 0xF
+
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
call _tx_execution_thread_exit ; Call the thread execution exit function
#endif
-
+
la t0, _tx_thread_current_ptr ; Pickup address of pointer
lw t1, 0(t0) ; Pickup current thread pointer
la t2,_tx_thread_system_stack_ptr ; Pickup stack pointer address
@@ -180,4 +174,3 @@ _tx_thread_dont_save_ts:
/* } */
END
- \ No newline at end of file
diff --git a/ports/risc-v32/iar/src/tx_timer_interrupt.s b/ports/risc-v32/iar/src/tx_timer_interrupt.s
index 2a4c36f8..bad9a366 100644
--- a/ports/risc-v32/iar/src/tx_timer_interrupt.s
+++ b/ports/risc-v32/iar/src/tx_timer_interrupt.s
@@ -1,18 +1,19 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
-/** ThreadX Component */
+/** */
+/** ThreadX Component */
/** */
/** Timer */
/** */
@@ -41,49 +42,42 @@
SECTION `.mtext`:CODE:REORDER:NOROOT(2)
CODE
-/**************************************************************************/
-/* */
-/* FUNCTION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* FUNCTION RELEASE */
+/* */
/* _tx_timer_interrupt RISC-V32/IAR */
/* 6.1 */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
/* Tom van Leeuwen, Technolution B.V. */
-/* */
-/* DESCRIPTION */
-/* */
-/* This function processes the hardware timer interrupt. This */
-/* processing includes incrementing the system clock and checking for */
-/* time slice and/or timer expiration. If either is found, the */
-/* interrupt context save/restore functions are called along with the */
-/* expiration functions. */
-/* */
-/* INPUT */
-/* */
-/* None */
-/* */
-/* OUTPUT */
-/* */
-/* None */
-/* */
-/* CALLS */
-/* */
-/* _tx_timer_expiration_process Timer expiration processing */
-/* _tx_thread_time_slice Time slice interrupted thread */
-/* */
-/* CALLED BY */
-/* */
-/* interrupt vector */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 09-30-2020 William E. Lamie Initial Version 6.1 */
-/* */
-/**************************************************************************/
+/* */
+/* DESCRIPTION */
+/* */
+/* This function processes the hardware timer interrupt. This */
+/* processing includes incrementing the system clock and checking for */
+/* time slice and/or timer expiration. If either is found, the */
+/* interrupt context save/restore functions are called along with the */
+/* expiration functions. */
+/* */
+/* INPUT */
+/* */
+/* None */
+/* */
+/* OUTPUT */
+/* */
+/* None */
+/* */
+/* CALLS */
+/* */
+/* _tx_timer_expiration_process Timer expiration processing */
+/* _tx_thread_time_slice Time slice interrupted thread */
+/* */
+/* CALLED BY */
+/* */
+/* interrupt vector */
+/**************************************************************************/
/* VOID _tx_timer_interrupt(VOID)
{ */
PUBLIC _tx_timer_interrupt
@@ -230,4 +224,3 @@ _tx_timer_nothing_expired:
/* } */
END
- \ No newline at end of file
generated by cgit v1.3.1 (git 2.54.0) at 2026-09-03 07:20:46 +0000