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authorFrédéric Desbiens <[email protected]>2026-03-06 19:27:49 +0100
committerGitHub <[email protected]>2026-03-06 19:27:49 +0100
commit3726d7906b4808bfec7855fc088e073199df9120 (patch)
tree8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports/rxv2/iar
parent4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff)
parentc3259a216026372e3833dd8996a68f77e8595fbd (diff)
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports/rxv2/iar')
-rw-r--r--ports/rxv2/iar/inc/tx_port.h106
-rw-r--r--ports/rxv2/iar/readme_threadx.txt70
-rw-r--r--ports/rxv2/iar/src/tx_initialize_low_level.s88
-rw-r--r--ports/rxv2/iar/src/tx_thread_context_restore.s98
-rw-r--r--ports/rxv2/iar/src/tx_thread_context_save.s90
-rw-r--r--ports/rxv2/iar/src/tx_thread_interrupt_control.s92
-rw-r--r--ports/rxv2/iar/src/tx_thread_schedule.s97
-rw-r--r--ports/rxv2/iar/src/tx_thread_stack_build.s28
-rw-r--r--ports/rxv2/iar/src/tx_thread_system_return.s20
-rw-r--r--ports/rxv2/iar/src/tx_timer_interrupt.s34
10 files changed, 302 insertions, 421 deletions
diff --git a/ports/rxv2/iar/inc/tx_port.h b/ports/rxv2/iar/inc/tx_port.h
index 97907737..351c51d0 100644
--- a/ports/rxv2/iar/inc/tx_port.h
+++ b/ports/rxv2/iar/inc/tx_port.h
@@ -1,17 +1,18 @@
/***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation
- *
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
* This program and the accompanying materials are made available under the
* terms of the MIT License which is available at
* https://opensource.org/licenses/MIT.
- *
+ *
* SPDX-License-Identifier: MIT
**************************************************************************/
/**************************************************************************/
/**************************************************************************/
-/** */
+/** */
/** ThreadX Component */
/** */
/** Port Specific */
@@ -20,46 +21,29 @@
/**************************************************************************/
-/**************************************************************************/
-/* */
-/* PORT SPECIFIC C INFORMATION RELEASE */
-/* */
+/**************************************************************************/
+/* */
+/* PORT SPECIFIC C INFORMATION RELEASE */
+/* */
/* tx_port.h RXv2/IAR */
/* 6.1.11 */
/* */
-/* AUTHOR */
-/* */
-/* William E. Lamie, Microsoft Corporation */
-/* */
-/* DESCRIPTION */
-/* */
-/* This file contains data type definitions that make the ThreadX */
-/* real-time kernel function identically on a variety of different */
-/* processor architectures. For example, the size or number of bits */
-/* in an "int" data type vary between microprocessor architectures and */
-/* even C compilers for the same microprocessor. ThreadX does not */
-/* directly use native C data types. Instead, ThreadX creates its */
-/* own special types that can be mapped to actual data types by this */
-/* file to guarantee consistency in the interface and functionality. */
-/* */
-/* RELEASE HISTORY */
-/* */
-/* DATE NAME DESCRIPTION */
-/* */
-/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-/* 06-02-2021 William E. Lamie Modified comments, */
-/* resulting in version 6.1.7 */
-/* 10-15-2021 William E. Lamie Modified comment(s), */
-/* resulting in version 6.1.9 */
-/* 01-31-2022 William E. Lamie Modified comment(s), removed */
-/* system state macro, and */
-/* added missing interrupt */
-/* control defines, */
-/* resulting in version 6.1.10 */
-/* 04-25-2022 William E. Lamie Modified comment(s), */
-/* resulting in version 6.1.11 */
-/* */
-/**************************************************************************/
+/* AUTHOR */
+/* */
+/* William E. Lamie, Microsoft Corporation */
+/* */
+/* DESCRIPTION */
+/* */
+/* This file contains data type definitions that make the ThreadX */
+/* real-time kernel function identically on a variety of different */
+/* processor architectures. For example, the size or number of bits */
+/* in an "int" data type vary between microprocessor architectures and */
+/* even C compilers for the same microprocessor. ThreadX does not */
+/* directly use native C data types. Instead, ThreadX creates its */
+/* own special types that can be mapped to actual data types by this */
+/* file to guarantee consistency in the interface and functionality. */
+/* */
+/**************************************************************************/
#ifndef TX_PORT_H
#define TX_PORT_H
@@ -72,13 +56,13 @@
#ifdef TX_INCLUDE_USER_DEFINE_FILE
-/* Yes, include the user defines in tx_user.h. The defines in this file may
+/* Yes, include the user defines in tx_user.h. The defines in this file may
alternately be defined on the command line. */
#include "tx_user.h"
#endif
-/* Define ThreadX basic types for this port. */
+/* Define ThreadX basic types for this port. */
#define VOID void
typedef char CHAR;
@@ -87,8 +71,10 @@ typedef int INT;
typedef unsigned int UINT;
typedef long LONG;
typedef unsigned long ULONG;
+typedef unsigned long long ULONG64;
typedef short SHORT;
typedef unsigned short USHORT;
+#define ULONG64_DEFINED
/* Define interrupt control options. */
@@ -120,8 +106,8 @@ typedef unsigned short USHORT;
#define TX_TIMER_THREAD_STACK_SIZE 1024 /* Default timer thread stack size */
#endif
-#ifndef TX_TIMER_THREAD_PRIORITY
-#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
+#ifndef TX_TIMER_THREAD_PRIORITY
+#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
#endif
@@ -146,7 +132,7 @@ typedef unsigned short USHORT;
#define TX_INLINE_INITIALIZATION
-/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
+/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack
checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
define is negated, thereby forcing the stack fill which is necessary for the stack checking
@@ -158,13 +144,13 @@ typedef unsigned short USHORT;
/* Define the TX_THREAD control block extensions for this port. The main reason
- for the multiple macros is so that backward compatibility can be maintained with
+ for the multiple macros is so that backward compatibility can be maintained with
existing ThreadX kernel awareness modules. */
-#define TX_THREAD_EXTENSION_0
-#define TX_THREAD_EXTENSION_1
-#define TX_THREAD_EXTENSION_2
-#define TX_THREAD_EXTENSION_3
+#define TX_THREAD_EXTENSION_0
+#define TX_THREAD_EXTENSION_1
+#define TX_THREAD_EXTENSION_2
+#define TX_THREAD_EXTENSION_3
/* Define the port extensions of the remaining ThreadX objects. */
@@ -178,11 +164,11 @@ typedef unsigned short USHORT;
#define TX_TIMER_EXTENSION
-/* Define the user extension field of the thread control block. Nothing
+/* Define the user extension field of the thread control block. Nothing
additional is needed for this port so it is defined as white space. */
#ifndef TX_THREAD_USER_EXTENSION
-#define TX_THREAD_USER_EXTENSION
+#define TX_THREAD_USER_EXTENSION
#endif
@@ -190,8 +176,8 @@ typedef unsigned short USHORT;
tx_thread_shell_entry, and tx_thread_terminate. */
-#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
-#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
@@ -217,9 +203,9 @@ typedef unsigned short USHORT;
#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
-/* Define ThreadX interrupt lockout and restore macros for protection on
- access of critical kernel information. The restore interrupt macro must
- restore the interrupt posture of the running thread prior to the value
+/* Define ThreadX interrupt lockout and restore macros for protection on
+ access of critical kernel information. The restore interrupt macro must
+ restore the interrupt posture of the running thread prior to the value
present prior to the disable macro. In most cases, the save area macro
is used to define a local function save area for the disable and restore
macros. */
@@ -269,8 +255,8 @@ static void _tx_thread_system_return_inline(void)
/* Define the version ID of ThreadX. This may be utilized by the application. */
#ifdef TX_THREAD_INIT
-CHAR _tx_version_id[] =
- "Copyright (c) 2024 Microsoft Corporation. * ThreadX RXv2/IAR Version 6.4.2 *";
+CHAR _tx_version_id[] =
+ "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX RXv2/IAR Version 6.5.0.202601 *";
#else
extern CHAR _tx_version_id[];
#endif
diff --git a/ports/rxv2/iar/readme_threadx.txt b/ports/rxv2/iar/readme_threadx.txt
index 5f09a2b3..d15e7c18 100644
--- a/ports/rxv2/iar/readme_threadx.txt
+++ b/ports/rxv2/iar/readme_threadx.txt
@@ -17,38 +17,38 @@ for the RXv2.
3. System Initialization
-The system entry point using the IAR tools is at the label __iar_program_start.
+The system entry point using the IAR tools is at the label __iar_program_start.
-The vector area is setup in the file tx_initialize_low_level.s. This file is also
-responsible for setting up various system data structures, interrupt vectors, and
-the periodic timer interrupt. This file is also an ideal place add hardware
+The vector area is setup in the file tx_initialize_low_level.s. This file is also
+responsible for setting up various system data structures, interrupt vectors, and
+the periodic timer interrupt. This file is also an ideal place add hardware
initialization code.
-The ThreadX demonstration for the RXv2 utilizes CMT0 as a periodic timer interrupt
-source. The CMT0 interrupt is typically setup for 10ms periodic interrupts and the
-interrupt priority level is set to level 5 with the symbol CMT_RX_CFG_IPR in
-r_cmt_rx_config.h of Renesas CMT timer module(r_cmt_rx). You may change any of the
+The ThreadX demonstration for the RXv2 utilizes CMT0 as a periodic timer interrupt
+source. The CMT0 interrupt is typically setup for 10ms periodic interrupts and the
+interrupt priority level is set to level 5 with the symbol CMT_RX_CFG_IPR in
+r_cmt_rx_config.h of Renesas CMT timer module(r_cmt_rx). You may change any of the
timer parameters as needed.
-In addition, _tx_initialize_low_level determines the first available address for use
-by the application, which is supplied as the sole input parameter to your application
-definition function, tx_application_define. The first available memory is determined
-by the location of the FREEMEM section so it should be placed AFTER all other RAM
+In addition, _tx_initialize_low_level determines the first available address for use
+by the application, which is supplied as the sole input parameter to your application
+definition function, tx_application_define. The first available memory is determined
+by the location of the FREEMEM section so it should be placed AFTER all other RAM
sections in your linker control file.
4. Context Switch, Register Usage and Stack Frames
The RXv2 port for ThreadX uses the first software interrupt, SWINT, i.e., interrupt #27,
-to perform context switch with the interrupt priority level 1. This ISR is thus reserved
-when using ThreadX and the SWINT should not be manipulated in any way by the application.
-The port will setup the interrupt within _tx_initialize_low_level and the compiler will
-automatically install the necessary interrupt vector. As such no additional initialization
+to perform context switch with the interrupt priority level 1. This ISR is thus reserved
+when using ThreadX and the SWINT should not be manipulated in any way by the application.
+The port will setup the interrupt within _tx_initialize_low_level and the compiler will
+automatically install the necessary interrupt vector. As such no additional initialization
is necessary by the application.
The following defines the saved context stack frame used by the ThreadX port. The
-state of the CPU registers at the time of a context switch is saved on the running
-thread's stack The top of the suspended thread's stack is pointed to by
+state of the CPU registers at the time of a context switch is saved on the running
+thread's stack The top of the suspended thread's stack is pointed to by
tx_thread_stack_ptr in the associated thread control block TX_THREAD.
Offset Interrupted Stack Frame
@@ -74,23 +74,23 @@ tx_thread_stack_ptr in the associated thread control block TX_THREAD.
0x48 R2
0x4C PC - return address
0x50 PSW
-
+
Note: By default IAR does not save the state of the accumulator registers ACC0 and ACC1
when entering an ISR. This means that if the ISR uses any of the DSP instructions the
content of those registers could be corrupted. Saving and restoring of the acummulators
can be enabled by adding the --save_acc command line option.
-
+
5. Improving Performance
-The distribution version of ThreadX is built without any compiler optimizations. This
-makes it easy to debug because you can trace or set breakpoints inside of ThreadX itself.
-Of course, this costs some performance. To make ThreadX run faster, you can change the
-ThreadX Library project to disable debug information and enable the desired optimizations.
+The distribution version of ThreadX is built without any compiler optimizations. This
+makes it easy to debug because you can trace or set breakpoints inside of ThreadX itself.
+Of course, this costs some performance. To make ThreadX run faster, you can change the
+ThreadX Library project to disable debug information and enable the desired optimizations.
-In addition, you can eliminate the ThreadX basic API error checking by compiling your
-application code with the symbol TX_DISABLE_ERROR_CHECKING defined before tx_api.h
-is included.
+In addition, you can eliminate the ThreadX basic API error checking by compiling your
+application code with the symbol TX_DISABLE_ERROR_CHECKING defined before tx_api.h
+is included.
6. Timer Processing
@@ -102,18 +102,18 @@ a Renesas Fit CMT periodic timer module (r_cmt_rx) is used as the timer source.
7. Interrupt Handling
-Interrupt handling is unaffected by the ThreadX port as such user interrupts can be
+Interrupt handling is unaffected by the ThreadX port as such user interrupts can be
written according to the toolchain's documentation. It is recommended not to use interrupt
priority 1 as this is the priority of the context switch interrupt. However using interrupt
-priority 1 won't cause any negative side effects but doing so may slightly reduce
+priority 1 won't cause any negative side effects but doing so may slightly reduce
performance. Please refer to the toolchain documentation for additional details on how to
define interrupt service routines.
8. Execution Profiling
-The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists
-of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation
+The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists
+of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation
of the EPK for generic usage details.
To add the EPK to your RXv2 release make the following modifications:
@@ -132,7 +132,7 @@ typedef unsigned long long EXECUTION_TIME;
typedef unsigned long EXECUTION_TIME;
#define TX_EXECUTION_MAX_TIME_SOURCE 0xFFFF
#endif
-
+
/* Define basic constants for the execution profile kit. */
#define TX_EXECUTION_TIME_SOURCE (EXECUTION_TIME) *((USHORT *) 0x8800A)
@@ -151,14 +151,14 @@ information associated with this specific port of ThreadX:
tx_thread_schedule.s Added low power support
01-31-2022 Release 6.1.10 changes:
- tx_port.h Removed system state macro, and added
+ tx_port.h Removed system state macro, and added
missing interrupt control defines
tx_timer_interrupt.s Added missing thread preemption logic
10-15-2021 Release 6.1.9 changes:
- tx_thread_context_restore.s Removed unnecessary stack type placement
+ tx_thread_context_restore.s Removed unnecessary stack type placement
tx_thread_schedule.s Removed unnecessary stack type checking
- tx_thread_stack_build.s Removed unnecessary stack type placement
+ tx_thread_stack_build.s Removed unnecessary stack type placement
06-02-2021 Release 6.1.7 changes:
readme_threadx.txt Updated instructions on how to use execution profile.
diff --git a/ports/rxv2/iar/src/tx_initialize_low_level.s b/ports/rxv2/iar/src/tx_initialize_low_level.s
index eafcd6c0..482b29af 100644
--- a/ports/rxv2/iar/src/tx_initialize_low_level.s
+++ b/ports/rxv2/iar/src/tx_initialize_low_level.s
@@ -1,18 +1,18 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
-;/** */
-;/** ThreadX Component */
+;/** */
+;/** ThreadX Component */
;/** */
;/** Initialize */
;/** */
@@ -25,53 +25,41 @@
section .text:CODE:ROOT
;
-;/**************************************************************************/
-;/* */
-;/* FUNCTION RELEASE */
-;/* */
+;/**************************************************************************/
+;/* */
+;/* FUNCTION RELEASE */
+;/* */
;/* _tx_initialize_low_level RXv2/IAR */
;/* 6.1.11 */
-;/* AUTHOR */
-;/* */
+;/* AUTHOR */
+;/* */
;/* William E. Lamie, Microsoft Corporation */
-;/* */
-;/* DESCRIPTION */
-;/* */
-;/* This function is responsible for any low-level processor */
-;/* initialization, including setting up interrupt vectors, setting */
-;/* up a periodic timer interrupt source, saving the system stack */
-;/* pointer for use in ISR processing later, and finding the first */
-;/* available RAM memory address for tx_application_define. */
-;/* */
-;/* INPUT */
-;/* */
-;/* None */
-;/* */
-;/* OUTPUT */
-;/* */
-;/* None */
-;/* */
-;/* CALLS */
-;/* */
-;/* None */
-;/* */
-;/* CALLED BY */
-;/* */
-;/* _tx_initialize_kernel_enter ThreadX entry function */
-;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
-;/**************************************************************************/
+;/* */
+;/* DESCRIPTION */
+;/* */
+;/* This function is responsible for any low-level processor */
+;/* initialization, including setting up interrupt vectors, setting */
+;/* up a periodic timer interrupt source, saving the system stack */
+;/* pointer for use in ISR processing later, and finding the first */
+;/* available RAM memory address for tx_application_define. */
+;/* */
+;/* INPUT */
+;/* */
+;/* None */
+;/* */
+;/* OUTPUT */
+;/* */
+;/* None */
+;/* */
+;/* CALLS */
+;/* */
+;/* None */
+;/* */
+;/* CALLED BY */
+;/* */
+;/* _tx_initialize_kernel_enter ThreadX entry function */
+;/* */
+;/**************************************************************************/
public __tx_initialize_low_level
__tx_initialize_low_level:
@@ -80,7 +68,7 @@ __tx_initialize_low_level:
; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
;
MOV.L #__tx_free_memory_start, R1 ; Pickup unused memory address
- MOV.L #__tx_initialize_unused_memory,R2
+ MOV.L #__tx_initialize_unused_memory,R2
MOV.L R1,[R2] ; Save first free memory address
; /* Set priority of SWINT to 1. */
diff --git a/ports/rxv2/iar/src/tx_thread_context_restore.s b/ports/rxv2/iar/src/tx_thread_context_restore.s
index c8a452ed..7998506d 100644
--- a/ports/rxv2/iar/src/tx_thread_context_restore.s
+++ b/ports/rxv2/iar/src/tx_thread_context_restore.s
@@ -1,18 +1,18 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
-;/** */
-;/** ThreadX Component */
+;/** */
+;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
@@ -39,54 +39,40 @@
section .text:CODE:ROOT
-;/**************************************************************************/
-;/* */
-;/* FUNCTION RELEASE */
-;/* */
+;/**************************************************************************/
+;/* */
+;/* FUNCTION RELEASE */
+;/* */
;/* _tx_thread_context_restore RXv2/IAR */
;/* 6.1.11 */
-;/* AUTHOR */
-;/* */
+;/* AUTHOR */
+;/* */
;/* William E. Lamie, Microsoft Corporation */
-;/* */
-;/* DESCRIPTION */
-;/* */
-;/* This function restores the interrupt context if it is processing a */
-;/* nested interrupt. If not, it returns to the interrupt thread if no */
-;/* preemption is necessary. Otherwise, if preemption is necessary or */
-;/* if no thread was running, the function returns to the scheduler. */
-;/* */
-;/* INPUT */
-;/* */
-;/* None */
-;/* */
-;/* OUTPUT */
-;/* */
-;/* None */
-;/* */
-;/* CALLS */
-;/* */
-;/* _tx_thread_schedule Thread scheduling routine */
-;/* */
-;/* CALLED BY */
-;/* */
-;/* ISRs Interrupt Service Routines */
-;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), and */
-;/* removed unnecessary stack */
-;/* type placement, */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
-;/**************************************************************************/
+;/* */
+;/* DESCRIPTION */
+;/* */
+;/* This function restores the interrupt context if it is processing a */
+;/* nested interrupt. If not, it returns to the interrupt thread if no */
+;/* preemption is necessary. Otherwise, if preemption is necessary or */
+;/* if no thread was running, the function returns to the scheduler. */
+;/* */
+;/* INPUT */
+;/* */
+;/* None */
+;/* */
+;/* OUTPUT */
+;/* */
+;/* None */
+;/* */
+;/* CALLS */
+;/* */
+;/* _tx_thread_schedule Thread scheduling routine */
+;/* */
+;/* CALLED BY */
+;/* */
+;/* ISRs Interrupt Service Routines */
+;/* */
+;/**************************************************************************/
public __tx_thread_context_restore
__tx_thread_context_restore:
@@ -103,7 +89,7 @@ __tx_thread_context_restore:
MOV.L [R1], R2
SUB #1, R2
MOV.L R2,[R1]
- BEQ __tx_thread_not_nested_restore
+ BEQ __tx_thread_not_nested_restore
;
; /* Interrupts are nested. */
@@ -125,17 +111,17 @@ __tx_thread_not_nested_restore:
; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr))
; || (_tx_thread_preempt_disable))
; {
-
+
MOV.L #__tx_thread_current_ptr, R1 ; Pickup current thread ptr address
MOV.L [R1], R2
CMP #0, R2
- BEQ __tx_thread_idle_system_restore
-
+ BEQ __tx_thread_idle_system_restore
+
MOV.L #__tx_thread_preempt_disable, R3 ; Pick up preempt disable flag
MOV.L [R3], R3
CMP #0, R3
BNE __tx_thread_no_preempt_restore ; If pre-empt disable flag set, we simply return to the original point of interrupt regardless
-
+
MOV.L #__tx_thread_execute_ptr, R3 ; (_tx_thread_current_ptr != _tx_thread_execute_ptr)
CMP [R3], R2
BNE __tx_thread_preempt_restore ; Jump to pre-empt restoring
@@ -176,7 +162,7 @@ __tx_thread_dont_save_ts:
SETPSW U ; User stack
PUSHM R6-R13
-
+
MVFACGU #0, A1, R4 ; Save accumulators.
MVFACHI #0, A1, R5
MVFACLO #0, A1, R6
diff --git a/ports/rxv2/iar/src/tx_thread_context_save.s b/ports/rxv2/iar/src/tx_thread_context_save.s
index 28c0ea5f..dd29a288 100644
--- a/ports/rxv2/iar/src/tx_thread_context_save.s
+++ b/ports/rxv2/iar/src/tx_thread_context_save.s
@@ -1,18 +1,18 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
-;/** */
-;/** ThreadX Component */
+;/** */
+;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
@@ -33,51 +33,39 @@
extern __tx_thread_current_ptr
section .text:CODE:ROOT
-;/**************************************************************************/
-;/* */
-;/* FUNCTION RELEASE */
-;/* */
+;/**************************************************************************/
+;/* */
+;/* FUNCTION RELEASE */
+;/* */
;/* _tx_thread_context_save RXv2/IAR */
;/* 6.1.11 */
-;/* AUTHOR */
-;/* */
+;/* AUTHOR */
+;/* */
;/* William E. Lamie, Microsoft Corporation */
-;/* */
-;/* DESCRIPTION */
-;/* */
-;/* This function saves the context of an executing thread in the */
-;/* beginning of interrupt processing. The function also ensures that */
-;/* the system stack is used upon return to the calling ISR. */
-;/* */
-;/* INPUT */
-;/* */
-;/* None */
-;/* */
-;/* OUTPUT */
-;/* */
-;/* None */
-;/* */
-;/* CALLS */
-;/* */
-;/* None */
-;/* */
-;/* CALLED BY */
-;/* */
-;/* ISRs */
-;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
-;/**************************************************************************/
+;/* */
+;/* DESCRIPTION */
+;/* */
+;/* This function saves the context of an executing thread in the */
+;/* beginning of interrupt processing. The function also ensures that */
+;/* the system stack is used upon return to the calling ISR. */
+;/* */
+;/* INPUT */
+;/* */
+;/* None */
+;/* */
+;/* OUTPUT */
+;/* */
+;/* None */
+;/* */
+;/* CALLS */
+;/* */
+;/* None */
+;/* */
+;/* CALLED BY */
+;/* */
+;/* ISRs */
+;/* */
+;/**************************************************************************/
;VOID _tx_thread_context_save(VOID)
;{
public __tx_thread_context_save
@@ -104,7 +92,7 @@ __tx_thread_context_save:
BEQ __tx_thread_not_nested_save
;
; /* Nested interrupt condition. */
-;
+;
ADD #1, r2 ; _tx_thread_system_state++
MOV.L r2, [r1]
@@ -130,7 +118,7 @@ __tx_thread_not_nested_save:
MOV.L #__tx_thread_current_ptr, R2 ; Pickup current thread pointer
MOV.L [R2], R2
- CMP #0,R2 ; Is it NULL?
+ CMP #0,R2 ; Is it NULL?
BEQ __tx_thread_idle_system_save ; Yes, idle system is running - idle restore
;
; /* Move stack frame over to the current threads stack. */
@@ -152,7 +140,7 @@ __tx_thread_not_nested_save:
MOV.L R14, [-R1] ; Save R14 on thread stack
MVFC FPSW, R3
MOV.L R3, [-R1] ; Save FPSW on thread stack
-
+
POP R2 ; Pick up return address from interrupt stack
ADD #16, R0, R0 ; Correct interrupt stack pointer back to the bottom
MVTC R1, USP ; Set user/thread stack pointer
@@ -171,5 +159,5 @@ __tx_thread_idle_system_save:
JMP R1 ; Return to caller
;
; }
-;}
+;}
END
diff --git a/ports/rxv2/iar/src/tx_thread_interrupt_control.s b/ports/rxv2/iar/src/tx_thread_interrupt_control.s
index d4656214..1c29ec80 100644
--- a/ports/rxv2/iar/src/tx_thread_interrupt_control.s
+++ b/ports/rxv2/iar/src/tx_thread_interrupt_control.s
@@ -1,18 +1,18 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
-;/** */
-;/** ThreadX Component */
+;/** */
+;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
@@ -28,50 +28,38 @@
;#include "tx_thread.h"
;
section .text:CODE:ROOT
-;/**************************************************************************/
-;/* */
-;/* FUNCTION RELEASE */
-;/* */
+;/**************************************************************************/
+;/* */
+;/* FUNCTION RELEASE */
+;/* */
;/* _tx_thread_interrupt_control RXv2/IAR */
;/* 6.1.11 */
-;/* AUTHOR */
-;/* */
+;/* AUTHOR */
+;/* */
;/* William E. Lamie, Microsoft Corporation */
-;/* */
-;/* DESCRIPTION */
-;/* */
-;/* This function is responsible for changing the interrupt lockout */
-;/* posture of the system. */
-;/* */
-;/* INPUT */
-;/* */
-;/* new_posture New interrupt lockout posture */
-;/* */
-;/* OUTPUT */
-;/* */
-;/* old_posture Old interrupt lockout posture */
-;/* */
-;/* CALLS */
-;/* */
-;/* None */
-;/* */
-;/* CALLED BY */
-;/* */
-;/* Application Code */
-;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
-;/**************************************************************************/
+;/* */
+;/* DESCRIPTION */
+;/* */
+;/* This function is responsible for changing the interrupt lockout */
+;/* posture of the system. */
+;/* */
+;/* INPUT */
+;/* */
+;/* new_posture New interrupt lockout posture */
+;/* */
+;/* OUTPUT */
+;/* */
+;/* old_posture Old interrupt lockout posture */
+;/* */
+;/* CALLS */
+;/* */
+;/* None */
+;/* */
+;/* CALLED BY */
+;/* */
+;/* Application Code */
+;/* */
+;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
;{
public __tx_thread_interrupt_control
@@ -79,20 +67,20 @@ __tx_thread_interrupt_control:
;
; /* Pickup current interrupt lockout posture. */
;
-
+
MVFC PSW, R2 ; Save PSW to R2
MOV.L R2, R3 ; Make a copy of PSW in r3
-
+
;
; /* Apply the new interrupt posture. */
;
-
+
BTST #16, R1 ; Test I bit of PSW of "new posture"
BMNE #16, R2 ; Conditionally set I bit of intermediate posture
-
+
MVTC R2, PSW ; Save intermediate posture to PSW
-
- MOV.L R3,R1 ; Get original SR
+
+ MOV.L R3,R1 ; Get original SR
RTS ; Return to caller
;}
END
diff --git a/ports/rxv2/iar/src/tx_thread_schedule.s b/ports/rxv2/iar/src/tx_thread_schedule.s
index 5cf106c7..8d0c02f6 100644
--- a/ports/rxv2/iar/src/tx_thread_schedule.s
+++ b/ports/rxv2/iar/src/tx_thread_schedule.s
@@ -1,18 +1,18 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
-;/** */
-;/** ThreadX Component */
+;/** */
+;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
@@ -41,56 +41,41 @@
section .text:CODE:ROOT
-;/**************************************************************************/
-;/* */
-;/* FUNCTION RELEASE */
-;/* */
+;/**************************************************************************/
+;/* */
+;/* FUNCTION RELEASE */
+;/* */
;/* _tx_thread_schedule RXv2/IAR */
;/* 6.1.11 */
-;/* AUTHOR */
-;/* */
+;/* AUTHOR */
+;/* */
;/* William E. Lamie, Microsoft Corporation */
-;/* */
-;/* DESCRIPTION */
-;/* */
-;/* This function waits for a thread control block pointer to appear in */
-;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
-;/* in the variable, the corresponding thread is resumed. */
-;/* */
-;/* INPUT */
-;/* */
-;/* None */
-;/* */
-;/* OUTPUT */
-;/* */
+;/* */
+;/* DESCRIPTION */
+;/* */
+;/* This function waits for a thread control block pointer to appear in */
+;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */
+;/* in the variable, the corresponding thread is resumed. */
+;/* */
+;/* INPUT */
+;/* */
;/* None */
-;/* */
-;/* CALLS */
-;/* */
+;/* */
+;/* OUTPUT */
+;/* */
;/* None */
-;/* */
-;/* CALLED BY */
-;/* */
-;/* _tx_initialize_kernel_enter ThreadX entry function */
-;/* _tx_thread_system_return Return to system from thread */
-;/* _tx_thread_context_restore Restore thread's context */
-;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), and */
-;/* removed unnecessary stack */
-;/* type checking, */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), and */
-;/* added low power support, */
-;/* resulting in version 6.1.11 */
-;/* */
-;/**************************************************************************/
+;/* */
+;/* CALLS */
+;/* */
+;/* None */
+;/* */
+;/* CALLED BY */
+;/* */
+;/* _tx_initialize_kernel_enter ThreadX entry function */
+;/* _tx_thread_system_return Return to system from thread */
+;/* _tx_thread_context_restore Restore thread's context */
+;/* */
+;/**************************************************************************/
;VOID _tx_thread_schedule(VOID)
;{
public __tx_thread_schedule
@@ -108,7 +93,7 @@ __tx_thread_schedule_loop:
MOV.L [R1],R2 ; Pickup next thread to execute
CMP #0,R2 ; Is it NULL?
BNE __tx_thread_thread_ready ; Not NULL, schedule the thread
- ; Idle system - no thread is ready
+ ; Idle system - no thread is ready
#if (TX_LOW_POWER == 1)
MOV.L #__tx_thread_preempt_disable, R1 ; Load prempt disable flag.
MOV.L [R1], R2
@@ -137,7 +122,7 @@ __tx_thread_thread_ready:
;
; }
; while(_tx_thread_execute_ptr == TX_NULL);
-;
+;
; /* Yes! We have a thread to execute. Note that interrupts are locked out at this point. */
;
; /* Setup the current thread pointer. */
@@ -173,14 +158,14 @@ __tx_thread_thread_ready:
MVTACLO R3, A1
MVTACHI R2, A1
MVTACGU R1, A1
-
+
POPM R6-R13 ; Recover interrupt stack frame
- POPC FPSW
+ POPC FPSW
POPM R14-R15
POPM R3-R5
- POPM R1-R2
+ POPM R1-R2
RTE ; Return to point of interrupt, this restores PC and PSW
-
+
;}
extern __tx_thread_context_save
diff --git a/ports/rxv2/iar/src/tx_thread_stack_build.s b/ports/rxv2/iar/src/tx_thread_stack_build.s
index 1d6be57f..632ac6e3 100644
--- a/ports/rxv2/iar/src/tx_thread_stack_build.s
+++ b/ports/rxv2/iar/src/tx_thread_stack_build.s
@@ -1,10 +1,10 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
@@ -55,28 +55,14 @@
;/* */
;/* _tx_thread_create Create thread service */
;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), and */
-;/* removed unnecessary stack */
-;/* type placement, */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
;/**************************************************************************/
public __tx_thread_stack_build
__tx_thread_stack_build:
;
-;
+;
; /* Build an interrupt frame. The form of the fake interrupt stack
; on the Renesas RX should look like the following after it is built:
-;
+;
; Stack Top: ACC0
; ACC1
; R6
@@ -139,11 +125,11 @@ __tx_thread_stack_build:
MOV.L R4,[-R3]
; /* Setup stack pointer. */
-; thread_ptr -> tx_thread_stack_ptr = R1;
+; thread_ptr -> tx_thread_stack_ptr = R1;
MOV.L R3, 8[R1]
; Store initial SP in thread control block
RTS
-
+
;}
END
diff --git a/ports/rxv2/iar/src/tx_thread_system_return.s b/ports/rxv2/iar/src/tx_thread_system_return.s
index 0e312291..53f0855f 100644
--- a/ports/rxv2/iar/src/tx_thread_system_return.s
+++ b/ports/rxv2/iar/src/tx_thread_system_return.s
@@ -1,10 +1,10 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
@@ -20,7 +20,7 @@
;/**************************************************************************/
section .text:CODE:ROOT
-
+
;/**************************************************************************/
;/* */
;/* FUNCTION RELEASE */
@@ -54,18 +54,6 @@
;/* */
;/* ThreadX components */
;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-31-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
;/**************************************************************************/
public __tx_thread_system_return
diff --git a/ports/rxv2/iar/src/tx_timer_interrupt.s b/ports/rxv2/iar/src/tx_timer_interrupt.s
index 9bc43b24..a1ec6147 100644
--- a/ports/rxv2/iar/src/tx_timer_interrupt.s
+++ b/ports/rxv2/iar/src/tx_timer_interrupt.s
@@ -1,10 +1,10 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
@@ -73,20 +73,6 @@ SWI0 EQU 0x872E0
;/* */
;/* interrupt vector */
;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 12-30-2020 William E. Lamie Initial Version 6.1.3 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), and */
-;/* added missing thread */
-;/* preemption logic, */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
;/**************************************************************************/
public __tx_timer_interrupt
@@ -149,14 +135,14 @@ __tx_timer_no_time_slice:
MOV.L [R2+], R1 ; Pickup timer list entry, _tx_timer_current_ptr++
CMP #0, R1 ; Is timer pointer NULL?
BEQ __tx_timer_no_timer ; Yes, no timer has expired
-
+
;
; /* Set expiration flag. */
; _tx_timer_expired = TX_TRUE;
;
MOV.L #__tx_timer_expired,R2 ; Build address of expired flag
MOV.L #1, R1 ; Build expired value
- MOV.L R1, [R2]
+ MOV.L R1, [R2]
BRA __tx_timer_done ; Finished with timer processing
;
; }
@@ -167,7 +153,7 @@ __tx_timer_no_timer:
; /* No timer expired, increment the timer pointer. */
; _tx_timer_current_ptr++;
;
-; /* R2 already contains __tx_timer_current_ptr++ */
+; /* R2 already contains __tx_timer_current_ptr++ */
;
; /* Check for wrap-around. */
; if (_tx_timer_current_ptr == _tx_timer_list_end)
@@ -186,9 +172,9 @@ __tx_timer_no_timer:
; }
;
__tx_timer_skip_wrap:
- MOV.L #__tx_timer_current_ptr,R1
+ MOV.L #__tx_timer_current_ptr,R1
MOV.L R2, [R1] ; Store in updated pointer in _tx_timer_current_ptr
-
+
__tx_timer_done:
;
; /* See if anything has expired. */
@@ -222,14 +208,14 @@ __tx_timer_dont_activate:
; /* Did time slice expire? */
; if (_tx_timer_expired_time_slice)
; {
-;
+;
MOV.L #__tx_timer_expired_time_slice, R1 ; Pickup time-slice expired flag addr
MOV.L [R1], R1 ; Pickup actual flag
CMP #0,R1 ; Has time-slice expired?
BEQ __tx_timer_not_ts_expiration ; No, skip time-slice expiration
;
; /* Time slice interrupted thread. */
-; _tx_thread_time_slice();
+; _tx_thread_time_slice();
BSR __tx_thread_time_slice ; Call time-slice processing
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-13 09:47:44 +0000