diff options
| author | Yuxin Zhou <[email protected]> | 2022-07-26 02:04:40 +0000 |
|---|---|---|
| committer | Yuxin Zhou <[email protected]> | 2022-07-26 02:04:40 +0000 |
| commit | 8c3c08f10826c4d5332a6d8e2fdf014b793a456a (patch) | |
| tree | c6c2528d7901b11ec5173bdd0bc38339ab18288f /ports | |
| parent | 54cda6ee9e68cd9701d759df13e3f6e41429b9bc (diff) | |
Release 6.1.12v6.1.12_rel
Diffstat (limited to 'ports')
115 files changed, 6683 insertions, 11451 deletions
diff --git a/ports/cortex_a12/ac6/inc/tx_port.h b/ports/cortex_a12/ac6/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a12/ac6/inc/tx_port.h +++ b/ports/cortex_a12/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a12/gnu/inc/tx_port.h b/ports/cortex_a12/gnu/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a12/gnu/inc/tx_port.h +++ b/ports/cortex_a12/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a15/ac6/inc/tx_port.h b/ports/cortex_a15/ac6/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a15/ac6/inc/tx_port.h +++ b/ports/cortex_a15/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a15/gnu/inc/tx_port.h b/ports/cortex_a15/gnu/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a15/gnu/inc/tx_port.h +++ b/ports/cortex_a15/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a17/ac6/inc/tx_port.h b/ports/cortex_a17/ac6/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a17/ac6/inc/tx_port.h +++ b/ports/cortex_a17/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a17/gnu/inc/tx_port.h b/ports/cortex_a17/gnu/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a17/gnu/inc/tx_port.h +++ b/ports/cortex_a17/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a5/ac6/inc/tx_port.h b/ports/cortex_a5/ac6/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a5/ac6/inc/tx_port.h +++ b/ports/cortex_a5/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a5/gnu/inc/tx_port.h b/ports/cortex_a5/gnu/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a5/gnu/inc/tx_port.h +++ b/ports/cortex_a5/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a7/ac6/inc/tx_port.h b/ports/cortex_a7/ac6/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a7/ac6/inc/tx_port.h +++ b/ports/cortex_a7/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a7/gnu/inc/tx_port.h b/ports/cortex_a7/gnu/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a7/gnu/inc/tx_port.h +++ b/ports/cortex_a7/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a8/ac6/inc/tx_port.h b/ports/cortex_a8/ac6/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a8/ac6/inc/tx_port.h +++ b/ports/cortex_a8/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a8/gnu/inc/tx_port.h b/ports/cortex_a8/gnu/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a8/gnu/inc/tx_port.h +++ b/ports/cortex_a8/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a9/ac6/inc/tx_port.h b/ports/cortex_a9/ac6/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a9/ac6/inc/tx_port.h +++ b/ports/cortex_a9/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_a9/gnu/inc/tx_port.h b/ports/cortex_a9/gnu/inc/tx_port.h index 19463de1..2155a2f6 100644 --- a/ports/cortex_a9/gnu/inc/tx_port.h +++ b/ports/cortex_a9/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARMv7-A */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,12 +47,15 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ -/* 04-25-2022 Zhen Kong Updated comments, */ +/* 04-25-2022 Zhen Kong Updated comments, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -284,7 +287,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_m0/gnu/example_build/build_threadx.bat b/ports/cortex_m0/gnu/example_build/build_threadx.bat index c74b194e..dbcac3a5 100644 --- a/ports/cortex_m0/gnu/example_build/build_threadx.bat +++ b/ports/cortex_m0/gnu/example_build/build_threadx.bat @@ -1,5 +1,4 @@ del tx.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_stack_build.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_schedule.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_system_return.S @@ -7,7 +6,7 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_save.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_restore.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_timer_interrupt.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S + arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c @@ -192,8 +191,8 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../in arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c + arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o -arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o diff --git a/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat b/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat index 96c754d5..e0c7b374 100644 --- a/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat +++ b/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat @@ -1,7 +1,5 @@ -arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_vectors.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_vectors.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_crt0.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc sample_threadx.c -arm-none-eabi-ld -A cortex-m0 -ereset_handler -T sample_threadx.ld tx_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libgcc.a -o sample_threadx.out -M > sample_threadx.map - - +arm-none-eabi-gcc -g -mcpu=cortex-m0 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm0_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a diff --git a/ports/cortex_m0/gnu/example_build/cortexm0_crt0.s b/ports/cortex_m0/gnu/example_build/cortexm0_crt0.S index d4cb1636..bb530ac5 100644 --- a/ports/cortex_m0/gnu/example_build/cortexm0_crt0.s +++ b/ports/cortex_m0/gnu/example_build/cortexm0_crt0.S @@ -13,7 +13,6 @@ _start: ldr r1, =__stack_end__ mov sp, r1 - /* Copy initialised sections into RAM if required. */ ldr r0, =__data_load_start__ ldr r1, =__data_start__ @@ -47,7 +46,6 @@ _start: mov r2, #0 bl crt0_memory_set - /* Setup heap - not recommended for Threadx but here for compatibility reasons */ ldr r0, = __heap_start__ ldr r1, = __heap_end__ @@ -57,7 +55,6 @@ _start: add r0, r0, #4 str r1, [r0] - /* constructors in case of using C++ */ ldr r0, =__ctors_start__ ldr r1, =__ctors_end__ @@ -72,13 +69,11 @@ crt0_ctor_loop: b crt0_ctor_loop crt0_ctor_end: - /* Setup call frame for main() */ mov r0, #0 mov lr, r0 mov r12, sp - start: /* Jump to main() */ mov r0, #0 @@ -93,7 +88,6 @@ crt0_exit_loop: /* Startup helper functions. */ - crt0_memory_copy: cmp r0, r1 beq memory_copy_done @@ -109,7 +103,6 @@ memory_copy_loop: memory_copy_done: bx lr - crt0_memory_set: cmp r0, r1 beq memory_set_done @@ -119,7 +112,6 @@ crt0_memory_set: memory_set_done: bx lr - /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ .section .stack, "wa", %nobits .section .stack_process, "wa", %nobits diff --git a/ports/cortex_m4/gnu/example_build/tx_simulator_startup.s b/ports/cortex_m0/gnu/example_build/cortexm0_vectors.S index cf0db974..6ae558e4 100644 --- a/ports/cortex_m4/gnu/example_build/tx_simulator_startup.s +++ b/ports/cortex_m0/gnu/example_build/cortexm0_vectors.S @@ -1,5 +1,3 @@ - - .global reset_handler .global __tx_NMIHandler @@ -10,7 +8,6 @@ .global __tx_SysTickHandler .global __tx_BadHandler - .syntax unified .section .vectors, "ax" .code 16 @@ -29,7 +26,7 @@ _vectors: .word 0 // Reserved .word 0 // Reserved .word 0 // Reserved - .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // + .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // .word __tx_DBGHandler .word 0 // Reserved .word __tx_PendSVHandler @@ -70,14 +67,10 @@ _vectors: .word __tx_BadHandler .word __tx_BadHandler - - - .section .init, "ax" - .thumb_func + .section .init, "ax" + .thumb_func reset_handler: - -// low level hardware config, such as PLL setup goes here - + // low level hardware config, such as PLL setup goes here b _start diff --git a/ports/cortex_m0/gnu/example_build/sample_threadx.ld b/ports/cortex_m0/gnu/example_build/sample_threadx.ld index 28f203fd..c65a1346 100644 --- a/ports/cortex_m0/gnu/example_build/sample_threadx.ld +++ b/ports/cortex_m0/gnu/example_build/sample_threadx.ld @@ -1,206 +1,125 @@ MEMORY { - UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0 - CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000 - AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000 - APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000 - APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000 - GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000 - AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000 - AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000 - RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000 - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000 } +__STACKSIZE__ = 1024; +__STACKSIZE_PROCESS__ = 0; +__HEAPSIZE__ = 128; SECTIONS { - __CM3_System_Control_Space_segment_start__ = 0xe000e000; - __CM3_System_Control_Space_segment_end__ = 0xe000f000; - __AHB_Peripherals_segment_start__ = 0x50000000; - __AHB_Peripherals_segment_end__ = 0x50200000; - __APB1_Peripherals_segment_start__ = 0x40080000; - __APB1_Peripherals_segment_end__ = 0x40100000; - __APB0_Peripherals_segment_start__ = 0x40000000; - __APB0_Peripherals_segment_end__ = 0x40080000; - __GPIO_segment_start__ = 0x2009c000; - __GPIO_segment_end__ = 0x200a0000; - __AHBSRAM1_segment_start__ = 0x20080000; - __AHBSRAM1_segment_end__ = 0x20084000; - __AHBSRAM0_segment_start__ = 0x2007c000; - __AHBSRAM0_segment_end__ = 0x20080000; - __RAM_segment_start__ = 0x10000000; - __RAM_segment_end__ = 0x10008000; - __FLASH_segment_start__ = 0x00000000; - __FLASH_segment_end__ = 0x00080000; - - __STACKSIZE__ = 1024; - __STACKSIZE_PROCESS__ = 0; - __STACKSIZE_IRQ__ = 0; - __STACKSIZE_FIQ__ = 0; - __STACKSIZE_SVC__ = 0; - __STACKSIZE_ABT__ = 0; - __STACKSIZE_UND__ = 0; - __HEAPSIZE__ = 128; - - __vectors_load_start__ = __FLASH_segment_start__; - .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__) - { - __vectors_start__ = .; - *(.vectors .vectors.*) - } - __vectors_end__ = __vectors_start__ + SIZEOF(.vectors); - - . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment"); - - __init_load_start__ = ALIGN(__vectors_end__ , 4); - .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4)) - { - __init_start__ = .; - *(.init .init.*) - } - __init_end__ = __init_start__ + SIZEOF(.init); - - . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment"); - - __text_load_start__ = ALIGN(__init_end__ , 4); - .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4)) + .vectors : { - __text_start__ = .; - *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table) - } - __text_end__ = __text_start__ + SIZEOF(.text); - - . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment"); - - __dtors_load_start__ = ALIGN(__text_end__ , 4); - .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4)) - { - __dtors_start__ = .; - KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } - __dtors_end__ = __dtors_start__ + SIZEOF(.dtors); - - . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment"); - - __ctors_load_start__ = ALIGN(__dtors_end__ , 4); - .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4)) - { - __ctors_start__ = .; - KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } - __ctors_end__ = __ctors_start__ + SIZEOF(.ctors); - - . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment"); + KEEP(*(.vectors .vectors.*)) + } > FLASH - __rodata_load_start__ = ALIGN(__ctors_end__ , 4); - .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4)) - { - __rodata_start__ = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - } - __rodata_end__ = __rodata_start__ + SIZEOF(.rodata); + .text : + { + *(.text*) - . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment"); + KEEP(*(.init)) + KEEP(*(.fini)) - __fast_load_start__ = ALIGN(__rodata_end__ , 4); - .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4)) - { - __fast_start__ = .; - *(.fast .fast.*) - } - __fast_end__ = __fast_start__ + SIZEOF(.fast); + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + __ctors_start__ = ALIGN(4); + *(SORT(.ctors.*)) + *(.ctors) + __ctors_end__ = ALIGN(4); - __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast); + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + __dtors_start__ = ALIGN(4); + *(SORT(.dtors.*)) + *(.dtors) + __dtors_end__ = ALIGN(4); - . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment"); + *(.rodata*) - .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) : - { - __fast_run_start__ = .; - . = MAX(__fast_run_start__ + SIZEOF(.fast), .); - } - __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run); + KEEP(*(.eh_frame*)) + } > FLASH - . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment"); + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH - __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4); - .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4)) - { - __data_start__ = .; - *(.data .data.* .gnu.linkonce.d.*) - } - __data_end__ = __data_start__ + SIZEOF(.data); + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; - __data_load_end__ = __data_load_start__ + SIZEOF(.data); + __data_load_start__ = ALIGN (4); - __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data); + .data : AT (__data_load_start__) + { + __data_start__ = .; - . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment"); + *(vtable) + *(.data*) - .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) : - { - __data_run_start__ = .; - . = MAX(__data_run_start__ + SIZEOF(.data), .); - } - __data_run_end__ = __data_run_start__ + SIZEOF(.data_run); + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); - . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment"); + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); - __bss_load_start__ = ALIGN(__data_run_end__ , 4); - .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4)) - { - __bss_start__ = .; - *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) - } - __bss_end__ = __bss_start__ + SIZEOF(.bss); + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); - . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment"); + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + + __data_end__ = .; - __non_init_load_start__ = ALIGN(__bss_end__ , 4); - .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4)) - { - __non_init_start__ = .; - *(.non_init .non_init.*) - } - __non_init_end__ = __non_init_start__ + SIZEOF(.non_init); + } > RAM - . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment"); + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; - __heap_load_start__ = ALIGN(__non_init_end__ , 4); - .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4)) - { - __heap_start__ = .; + } > RAM + + .heap (COPY): + { + __heap_start__ = ALIGN(4); *(.heap) - . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4); - } - __heap_end__ = __heap_start__ + SIZEOF(.heap); + . = ALIGN(. + __HEAPSIZE__, 4); + __heap_end__ = ALIGN(4); + } > RAM - . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment"); - - __stack_load_start__ = ALIGN(__heap_end__ , 4); - .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4)) + .stack ALIGN(4) (NOLOAD) : { - __stack_start__ = .; + __stack_start__ = ALIGN(4); *(.stack) - . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4); - } - __stack_end__ = __stack_start__ + SIZEOF(.stack); - - . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment"); - - __stack_process_load_start__ = ALIGN(__stack_end__ , 4); - .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4)) - { - __stack_process_start__ = .; - *(.stack_process) - . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4); - } - __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process); - - __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process); - - . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment"); + . = ALIGN(. + __STACKSIZE__, 4); + __stack_end__ = ALIGN(4); + } > RAM + __RAM_segment_used_end__ = .; } - diff --git a/ports/cortex_m0/iar/CMakeLists.txt b/ports/cortex_m0/iar/CMakeLists.txt new file mode 100644 index 00000000..a524d79f --- /dev/null +++ b/ports/cortex_m0/iar/CMakeLists.txt @@ -0,0 +1,21 @@ + +target_sources(${PROJECT_NAME} + PRIVATE + # {{BEGIN_TARGET_SOURCES}} + ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S + # {{END_TARGET_SOURCES}} +) + +target_include_directories(${PROJECT_NAME} + PUBLIC + ${CMAKE_CURRENT_LIST_DIR}/inc +) diff --git a/ports/cortex_m0/keil/example_build/sample_threadx.uvoptx b/ports/cortex_m0/keil/example_build/sample_threadx.uvoptx deleted file mode 100644 index 6ff0dbc9..00000000 --- a/ports/cortex_m0/keil/example_build/sample_threadx.uvoptx +++ /dev/null @@ -1,281 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no" ?> -<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> - - <SchemaVersion>1.0</SchemaVersion> - - <Header>### uVision Project, (C) Keil Software</Header> - - <Extensions> - <cExt>*.c</cExt> - <aExt>*.s*; *.src; *.a*</aExt> - <oExt>*.obj; *.o</oExt> - <lExt>*.lib</lExt> - <tExt>*.txt; *.h; *.inc</tExt> - <pExt>*.plm</pExt> - <CppX>*.cpp</CppX> - <nMigrate>0</nMigrate> - </Extensions> - - <DaveTm> - <dwLowDateTime>0</dwLowDateTime> - <dwHighDateTime>0</dwHighDateTime> - </DaveTm> - - <Target> - <TargetName>sample_threadx</TargetName> - <ToolsetNumber>0x4</ToolsetNumber> - <ToolsetName>ARM-ADS</ToolsetName> - <TargetOption> - <CLKADS>12000000</CLKADS> - <OPTTT> - <gFlags>1</gFlags> - <BeepAtEnd>1</BeepAtEnd> - <RunSim>0</RunSim> - <RunTarget>1</RunTarget> - <RunAbUc>0</RunAbUc> - </OPTTT> - <OPTHX> - <HexSelection>1</HexSelection> - <FlashByte>65535</FlashByte> - <HexRangeLowAddress>0</HexRangeLowAddress> - <HexRangeHighAddress>0</HexRangeHighAddress> - <HexOffset>0</HexOffset> - </OPTHX> - <OPTLEX> - <PageWidth>79</PageWidth> - <PageLength>66</PageLength> - <TabStop>8</TabStop> - <ListingPath>.\Listings\</ListingPath> - </OPTLEX> - <ListingPage> - <CreateCListing>1</CreateCListing> - <CreateAListing>1</CreateAListing> - <CreateLListing>1</CreateLListing> - <CreateIListing>0</CreateIListing> - <AsmCond>1</AsmCond> - <AsmSymb>1</AsmSymb> - <AsmXref>0</AsmXref> - <CCond>1</CCond> - <CCode>0</CCode> - <CListInc>0</CListInc> - <CSymb>0</CSymb> - <LinkerCodeListing>0</LinkerCodeListing> - </ListingPage> - <OPTXL> - <LMap>1</LMap> - <LComments>1</LComments> - <LGenerateSymbols>1</LGenerateSymbols> - <LLibSym>1</LLibSym> - <LLines>1</LLines> - <LLocSym>1</LLocSym> - <LPubSym>1</LPubSym> - <LXref>0</LXref> - <LExpSel>0</LExpSel> - </OPTXL> - <OPTFL> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <IsCurrentTarget>1</IsCurrentTarget> - </OPTFL> - <CpuCode>7</CpuCode> - <DebugOpt> - <uSim>1</uSim> - <uTrg>0</uTrg> - <sLdApp>1</sLdApp> - <sGomain>1</sGomain> - <sRbreak>1</sRbreak> - <sRwatch>1</sRwatch> - <sRmem>1</sRmem> - <sRfunc>1</sRfunc> - <sRbox>1</sRbox> - <tLdApp>1</tLdApp> - <tGomain>1</tGomain> - <tRbreak>1</tRbreak> - <tRwatch>1</tRwatch> - <tRmem>1</tRmem> - <tRfunc>0</tRfunc> - <tRbox>1</tRbox> - <tRtrace>1</tRtrace> - <sRSysVw>1</sRSysVw> - <tRSysVw>1</tRSysVw> - <sRunDeb>0</sRunDeb> - <sLrtime>0</sLrtime> - <bEvRecOn>1</bEvRecOn> - <bSchkAxf>0</bSchkAxf> - <bTchkAxf>0</bTchkAxf> - <nTsel>5</nTsel> - <sDll></sDll> - <sDllPa></sDllPa> - <sDlgDll></sDlgDll> - <sDlgPa></sDlgPa> - <sIfile></sIfile> - <tDll></tDll> - <tDllPa></tDllPa> - <tDlgDll></tDlgDll> - <tDlgPa></tDlgPa> - <tIfile></tIfile> - <pMon>BIN\DbgFM.DLL</pMon> - </DebugOpt> - <TargetDriverDllRegistry> - <SetRegEntry> - <Number>0</Number> - <Key>ARMRTXEVENTFLAGS</Key> - <Name>-L70 -Z18 -C0 -M0 -T1</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>DLGDARM</Key> - <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>ARMDBGFLAGS</Key> - <Name>-T0</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>UL2CM3</Key> - <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name> - </SetRegEntry> - </TargetDriverDllRegistry> - <Breakpoint/> - <WatchWindow1> - <Ww> - <count>0</count> - <WinNumber>1</WinNumber> - <ItemText>thread_0_counter</ItemText> - </Ww> - <Ww> - <count>1</count> - <WinNumber>1</WinNumber> - <ItemText>thread_1_counter</ItemText> - </Ww> - <Ww> - <count>2</count> - <WinNumber>1</WinNumber> - <ItemText>thread_2_counter</ItemText> - </Ww> - <Ww> - <count>3</count> - <WinNumber>1</WinNumber> - <ItemText>thread_3_counter</ItemText> - </Ww> - <Ww> - <count>4</count> - <WinNumber>1</WinNumber> - <ItemText>thread_4_counter</ItemText> - </Ww> - <Ww> - <count>5</count> - <WinNumber>1</WinNumber> - <ItemText>thread_5_counter</ItemText> - </Ww> - <Ww> - <count>6</count> - <WinNumber>1</WinNumber> - <ItemText>thread_6_counter</ItemText> - </Ww> - <Ww> - <count>7</count> - <WinNumber>1</WinNumber> - <ItemText>thread_7_counter</ItemText> - </Ww> - </WatchWindow1> - <Tracepoint> - <THDelay>0</THDelay> - </Tracepoint> - <DebugFlag> - <trace>0</trace> - <periodic>1</periodic> - <aLwin>1</aLwin> - <aCover>0</aCover> - <aSer1>0</aSer1> - <aSer2>0</aSer2> - <aPa>0</aPa> - <viewmode>1</viewmode> - <vrSel>0</vrSel> - <aSym>0</aSym> - <aTbox>0</aTbox> - <AscS1>0</AscS1> - <AscS2>0</AscS2> - <AscS3>0</AscS3> - <aSer3>0</aSer3> - <eProf>0</eProf> - <aLa>0</aLa> - <aPa1>0</aPa1> - <AscS4>0</AscS4> - <aSer4>0</aSer4> - <StkLoc>0</StkLoc> - <TrcWin>0</TrcWin> - <newCpu>0</newCpu> - <uProt>0</uProt> - </DebugFlag> - <LintExecutable></LintExecutable> - <LintConfigFile></LintConfigFile> - <bLintAuto>0</bLintAuto> - <bAutoGenD>0</bAutoGenD> - <LntExFlags>0</LntExFlags> - <pMisraName></pMisraName> - <pszMrule></pszMrule> - <pSingCmds></pSingCmds> - <pMultCmds></pMultCmds> - <pMisraNamep></pMisraNamep> - <pszMrulep></pszMrulep> - <pSingCmdsp></pSingCmdsp> - <pMultCmdsp></pMultCmdsp> - </TargetOption> - </Target> - - <Group> - <GroupName>src</GroupName> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>1</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>.\sample_threadx.c</PathWithFileName> - <FilenameWithoutPath>sample_threadx.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>2</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>.\tx_initialize_low_level.s</PathWithFileName> - <FilenameWithoutPath>tx_initialize_low_level.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - </Group> - - <Group> - <GroupName>lib</GroupName> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>3</FileNumber> - <FileType>4</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>.\Objects\tx.lib</PathWithFileName> - <FilenameWithoutPath>tx.lib</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - </Group> - -</ProjectOpt> diff --git a/ports/cortex_m0/keil/example_build/sample_threadx.uvprojx b/ports/cortex_m0/keil/example_build/sample_threadx.uvprojx deleted file mode 100644 index a0e27af8..00000000 --- a/ports/cortex_m0/keil/example_build/sample_threadx.uvprojx +++ /dev/null @@ -1,433 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no" ?> -<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> - - <SchemaVersion>2.1</SchemaVersion> - - <Header>### uVision Project, (C) Keil Software</Header> - - <Targets> - <Target> - <TargetName>sample_threadx</TargetName> - <ToolsetNumber>0x4</ToolsetNumber> - <ToolsetName>ARM-ADS</ToolsetName> - <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> - <uAC6>0</uAC6> - <TargetOption> - <TargetCommonOption> - <Device>ARMCM0</Device> - <Vendor>ARM</Vendor> - <PackID>ARM.CMSIS.5.7.0</PackID> - <PackURL>http://www.keil.com/pack/</PackURL> - <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu> - <FlashUtilSpec></FlashUtilSpec> - <StartupFile></StartupFile> - <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll> - <DeviceId>0</DeviceId> - <RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile> - <MemoryEnv></MemoryEnv> - <Cmp></Cmp> - <Asm></Asm> - <Linker></Linker> - <OHString></OHString> - <InfinionOptionDll></InfinionOptionDll> - <SLE66CMisc></SLE66CMisc> - <SLE66AMisc></SLE66AMisc> - <SLE66LinkerMisc></SLE66LinkerMisc> - <SFDFile></SFDFile> - <bCustSvd>0</bCustSvd> - <UseEnv>0</UseEnv> - <BinPath></BinPath> - <IncludePath></IncludePath> - <LibPath></LibPath> - <RegisterFilePath></RegisterFilePath> - <DBRegisterFilePath></DBRegisterFilePath> - <TargetStatus> - <Error>0</Error> - <ExitCodeStop>0</ExitCodeStop> - <ButtonStop>0</ButtonStop> - <NotGenerated>0</NotGenerated> - <InvalidFlash>1</InvalidFlash> - </TargetStatus> - <OutputDirectory>.\Objects\</OutputDirectory> - <OutputName>sample_threadx</OutputName> - <CreateExecutable>1</CreateExecutable> - <CreateLib>0</CreateLib> - <CreateHexFile>0</CreateHexFile> - <DebugInformation>1</DebugInformation> - <BrowseInformation>1</BrowseInformation> - <ListingPath>.\Listings\</ListingPath> - <HexFormatSelection>1</HexFormatSelection> - <Merge32K>0</Merge32K> - <CreateBatchFile>0</CreateBatchFile> - <BeforeCompile> - <RunUserProg1>0</RunUserProg1> - <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> - <UserProg1Dos16Mode>0</UserProg1Dos16Mode> - <UserProg2Dos16Mode>0</UserProg2Dos16Mode> - <nStopU1X>0</nStopU1X> - <nStopU2X>0</nStopU2X> - </BeforeCompile> - <BeforeMake> - <RunUserProg1>0</RunUserProg1> - <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> - <UserProg1Dos16Mode>0</UserProg1Dos16Mode> - <UserProg2Dos16Mode>0</UserProg2Dos16Mode> - <nStopB1X>0</nStopB1X> - <nStopB2X>0</nStopB2X> - </BeforeMake> - <AfterMake> - <RunUserProg1>0</RunUserProg1> - <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> - <UserProg1Dos16Mode>0</UserProg1Dos16Mode> - <UserProg2Dos16Mode>0</UserProg2Dos16Mode> - <nStopA1X>0</nStopA1X> - <nStopA2X>0</nStopA2X> - </AfterMake> - <SelectedForBatchBuild>0</SelectedForBatchBuild> - <SVCSIdString></SVCSIdString> - </TargetCommonOption> - <CommonProperty> - <UseCPPCompiler>0</UseCPPCompiler> - <RVCTCodeConst>0</RVCTCodeConst> - <RVCTZI>0</RVCTZI> - <RVCTOtherData>0</RVCTOtherData> - <ModuleSelection>0</ModuleSelection> - <IncludeInBuild>1</IncludeInBuild> - <AlwaysBuild>0</AlwaysBuild> - <GenerateAssemblyFile>0</GenerateAssemblyFile> - <AssembleAssemblyFile>0</AssembleAssemblyFile> - <PublicsOnly>0</PublicsOnly> - <StopOnExitCode>3</StopOnExitCode> - <CustomArgument></CustomArgument> - <IncludeLibraryModules></IncludeLibraryModules> - <ComprImg>1</ComprImg> - </CommonProperty> - <DllOption> - <SimDllName>SARMCM3.DLL</SimDllName> - <SimDllArguments> </SimDllArguments> - <SimDlgDll>DARMCM1.DLL</SimDlgDll> - <SimDlgDllArguments>-pCM0</SimDlgDllArguments> - <TargetDllName>SARMCM3.DLL</TargetDllName> - <TargetDllArguments> </TargetDllArguments> - <TargetDlgDll>TARMCM1.DLL</TargetDlgDll> - <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments> - </DllOption> - <DebugOption> - <OPTHX> - <HexSelection>1</HexSelection> - <HexRangeLowAddress>0</HexRangeLowAddress> - <HexRangeHighAddress>0</HexRangeHighAddress> - <HexOffset>0</HexOffset> - <Oh166RecLen>16</Oh166RecLen> - </OPTHX> - </DebugOption> - <Utilities> - <Flash1> - <UseTargetDll>1</UseTargetDll> - <UseExternalTool>0</UseExternalTool> - <RunIndependent>0</RunIndependent> - <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> - <Capability>0</Capability> - <DriverSelection>-1</DriverSelection> - </Flash1> - <bUseTDR>1</bUseTDR> - <Flash2>BIN\UL2CM3.DLL</Flash2> - <Flash3></Flash3> - <Flash4></Flash4> - <pFcarmOut></pFcarmOut> - <pFcarmGrp></pFcarmGrp> - <pFcArmRoot></pFcArmRoot> - <FcArmLst>0</FcArmLst> - </Utilities> - <TargetArmAds> - <ArmAdsMisc> - <GenerateListings>0</GenerateListings> - <asHll>1</asHll> - <asAsm>1</asAsm> - <asMacX>1</asMacX> - <asSyms>1</asSyms> - <asFals>1</asFals> - <asDbgD>1</asDbgD> - <asForm>1</asForm> - <ldLst>0</ldLst> - <ldmm>1</ldmm> - <ldXref>1</ldXref> - <BigEnd>0</BigEnd> - <AdsALst>1</AdsALst> - <AdsACrf>1</AdsACrf> - <AdsANop>0</AdsANop> - <AdsANot>0</AdsANot> - <AdsLLst>1</AdsLLst> - <AdsLmap>1</AdsLmap> - <AdsLcgr>1</AdsLcgr> - <AdsLsym>1</AdsLsym> - <AdsLszi>1</AdsLszi> - <AdsLtoi>1</AdsLtoi> - <AdsLsun>1</AdsLsun> - <AdsLven>1</AdsLven> - <AdsLsxf>1</AdsLsxf> - <RvctClst>0</RvctClst> - <GenPPlst>0</GenPPlst> - <AdsCpuType>"Cortex-M0"</AdsCpuType> - <RvctDeviceName></RvctDeviceName> - <mOS>0</mOS> - <uocRom>0</uocRom> - <uocRam>0</uocRam> - <hadIROM>1</hadIROM> - <hadIRAM>1</hadIRAM> - <hadXRAM>0</hadXRAM> - <uocXRam>0</uocXRam> - <RvdsVP>0</RvdsVP> - <RvdsMve>0</RvdsMve> - <RvdsCdeCp>0</RvdsCdeCp> - <hadIRAM2>0</hadIRAM2> - <hadIROM2>0</hadIROM2> - <StupSel>1</StupSel> - <useUlib>0</useUlib> - <EndSel>1</EndSel> - <uLtcg>0</uLtcg> - <nSecure>0</nSecure> - <RoSelD>3</RoSelD> - <RwSelD>3</RwSelD> - <CodeSel>0</CodeSel> - <OptFeed>0</OptFeed> - <NoZi1>0</NoZi1> - <NoZi2>0</NoZi2> - <NoZi3>0</NoZi3> - <NoZi4>0</NoZi4> - <NoZi5>0</NoZi5> - <Ro1Chk>1</Ro1Chk> - <Ro2Chk>0</Ro2Chk> - <Ro3Chk>0</Ro3Chk> - <Ir1Chk>0</Ir1Chk> - <Ir2Chk>0</Ir2Chk> - <Ra1Chk>1</Ra1Chk> - <Ra2Chk>0</Ra2Chk> - <Ra3Chk>0</Ra3Chk> - <Im1Chk>0</Im1Chk> - <Im2Chk>0</Im2Chk> - <OnChipMemories> - <Ocm1> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm1> - <Ocm2> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm2> - <Ocm3> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm3> - <Ocm4> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm4> - <Ocm5> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm5> - <Ocm6> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm6> - <IRAM> - <Type>0</Type> - <StartAddress>0x20000000</StartAddress> - <Size>0x20000</Size> - </IRAM> - <IROM> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x40000</Size> - </IROM> - <XRAM> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </XRAM> - <OCR_RVCT1> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x40000</Size> - </OCR_RVCT1> - <OCR_RVCT2> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT2> - <OCR_RVCT3> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT3> - <OCR_RVCT4> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT4> - <OCR_RVCT5> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT5> - <OCR_RVCT6> - <Type>0</Type> - <StartAddress>0x20000000</StartAddress> - <Size>0x20000</Size> - </OCR_RVCT6> - <OCR_RVCT7> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT7> - <OCR_RVCT8> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT8> - <OCR_RVCT9> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT9> - <OCR_RVCT10> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT10> - </OnChipMemories> - <RvctStartVector></RvctStartVector> - </ArmAdsMisc> - <Cads> - <interw>1</interw> - <Optim>1</Optim> - <oTime>0</oTime> - <SplitLS>0</SplitLS> - <OneElfS>1</OneElfS> - <Strict>0</Strict> - <EnumInt>0</EnumInt> - <PlainCh>0</PlainCh> - <Ropi>0</Ropi> - <Rwpi>0</Rwpi> - <wLevel>2</wLevel> - <uThumb>0</uThumb> - <uSurpInc>0</uSurpInc> - <uC99>0</uC99> - <uGnu>0</uGnu> - <useXO>0</useXO> - <v6Lang>3</v6Lang> - <v6LangP>3</v6LangP> - <vShortEn>1</vShortEn> - <vShortWch>1</vShortWch> - <v6Lto>0</v6Lto> - <v6WtE>0</v6WtE> - <v6Rtti>0</v6Rtti> - <VariousControls> - <MiscControls></MiscControls> - <Define></Define> - <Undefine></Undefine> - <IncludePath>..\inc;..\..\..\..\common\inc</IncludePath> - </VariousControls> - </Cads> - <Aads> - <interw>1</interw> - <Ropi>0</Ropi> - <Rwpi>0</Rwpi> - <thumb>0</thumb> - <SplitLS>0</SplitLS> - <SwStkChk>0</SwStkChk> - <NoWarn>0</NoWarn> - <uSurpInc>0</uSurpInc> - <useXO>0</useXO> - <ClangAsOpt>1</ClangAsOpt> - <VariousControls> - <MiscControls></MiscControls> - <Define></Define> - <Undefine></Undefine> - <IncludePath></IncludePath> - </VariousControls> - </Aads> - <LDads> - <umfTarg>0</umfTarg> - <Ropi>0</Ropi> - <Rwpi>0</Rwpi> - <noStLib>0</noStLib> - <RepFail>0</RepFail> - <useFile>0</useFile> - <TextAddressRange>0x00000000</TextAddressRange> - <DataAddressRange>0x20000000</DataAddressRange> - <pXoBase></pXoBase> - <ScatterFile></ScatterFile> - <IncludeLibs></IncludeLibs> - <IncludeLibsPath></IncludeLibsPath> - <Misc>--first __tx_vectors --entry=__main</Misc> - <LinkerInputFile></LinkerInputFile> - <DisabledWarnings></DisabledWarnings> - </LDads> - </TargetArmAds> - </TargetOption> - <Groups> - <Group> - <GroupName>src</GroupName> - <Files> - <File> - <FileName>sample_threadx.c</FileName> - <FileType>1</FileType> - <FilePath>.\sample_threadx.c</FilePath> - </File> - <File> - <FileName>tx_initialize_low_level.s</FileName> - <FileType>2</FileType> - <FilePath>.\tx_initialize_low_level.s</FilePath> - </File> - </Files> - </Group> - <Group> - <GroupName>lib</GroupName> - <Files> - <File> - <FileName>tx.lib</FileName> - <FileType>4</FileType> - <FilePath>.\Objects\tx.lib</FilePath> - </File> - </Files> - </Group> - </Groups> - </Target> - </Targets> - - <RTE> - <apis/> - <components/> - <files/> - </RTE> - - <LayerInfo> - <Layers> - <Layer> - <LayName><Project Info></LayName> - <LayDesc></LayDesc> - <LayUrl></LayUrl> - <LayKeys></LayKeys> - <LayCat></LayCat> - <LayLic></LayLic> - <LayTarg>0</LayTarg> - <LayPrjMark>1</LayPrjMark> - </Layer> - </Layers> - </LayerInfo> - -</Project> diff --git a/ports/cortex_m0/keil/example_build/tx.uvoptx b/ports/cortex_m0/keil/example_build/tx.uvoptx deleted file mode 100644 index d481141d..00000000 --- a/ports/cortex_m0/keil/example_build/tx.uvoptx +++ /dev/null @@ -1,2672 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no" ?> -<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> - - <SchemaVersion>1.0</SchemaVersion> - - <Header>### uVision Project, (C) Keil Software</Header> - - <Extensions> - <cExt>*.c</cExt> - <aExt>*.s*; *.src; *.a*</aExt> - <oExt>*.obj; *.o</oExt> - <lExt>*.lib</lExt> - <tExt>*.txt; *.h; *.inc</tExt> - <pExt>*.plm</pExt> - <CppX>*.cpp</CppX> - <nMigrate>0</nMigrate> - </Extensions> - - <DaveTm> - <dwLowDateTime>0</dwLowDateTime> - <dwHighDateTime>0</dwHighDateTime> - </DaveTm> - - <Target> - <TargetName>tx</TargetName> - <ToolsetNumber>0x4</ToolsetNumber> - <ToolsetName>ARM-ADS</ToolsetName> - <TargetOption> - <CLKADS>12000000</CLKADS> - <OPTTT> - <gFlags>1</gFlags> - <BeepAtEnd>1</BeepAtEnd> - <RunSim>0</RunSim> - <RunTarget>1</RunTarget> - <RunAbUc>0</RunAbUc> - </OPTTT> - <OPTHX> - <HexSelection>1</HexSelection> - <FlashByte>65535</FlashByte> - <HexRangeLowAddress>0</HexRangeLowAddress> - <HexRangeHighAddress>0</HexRangeHighAddress> - <HexOffset>0</HexOffset> - </OPTHX> - <OPTLEX> - <PageWidth>79</PageWidth> - <PageLength>66</PageLength> - <TabStop>8</TabStop> - <ListingPath>.\Listings\</ListingPath> - </OPTLEX> - <ListingPage> - <CreateCListing>1</CreateCListing> - <CreateAListing>1</CreateAListing> - <CreateLListing>1</CreateLListing> - <CreateIListing>0</CreateIListing> - <AsmCond>1</AsmCond> - <AsmSymb>1</AsmSymb> - <AsmXref>0</AsmXref> - <CCond>1</CCond> - <CCode>0</CCode> - <CListInc>0</CListInc> - <CSymb>0</CSymb> - <LinkerCodeListing>0</LinkerCodeListing> - </ListingPage> - <OPTXL> - <LMap>1</LMap> - <LComments>1</LComments> - <LGenerateSymbols>1</LGenerateSymbols> - <LLibSym>1</LLibSym> - <LLines>1</LLines> - <LLocSym>1</LLocSym> - <LPubSym>1</LPubSym> - <LXref>0</LXref> - <LExpSel>0</LExpSel> - </OPTXL> - <OPTFL> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <IsCurrentTarget>1</IsCurrentTarget> - </OPTFL> - <CpuCode>7</CpuCode> - <DebugOpt> - <uSim>0</uSim> - <uTrg>1</uTrg> - <sLdApp>1</sLdApp> - <sGomain>1</sGomain> - <sRbreak>1</sRbreak> - <sRwatch>1</sRwatch> - <sRmem>1</sRmem> - <sRfunc>1</sRfunc> - <sRbox>1</sRbox> - <tLdApp>1</tLdApp> - <tGomain>1</tGomain> - <tRbreak>1</tRbreak> - <tRwatch>1</tRwatch> - <tRmem>1</tRmem> - <tRfunc>0</tRfunc> - <tRbox>1</tRbox> - <tRtrace>1</tRtrace> - <sRSysVw>1</sRSysVw> - <tRSysVw>1</tRSysVw> - <sRunDeb>0</sRunDeb> - <sLrtime>0</sLrtime> - <bEvRecOn>1</bEvRecOn> - <bSchkAxf>0</bSchkAxf> - <bTchkAxf>0</bTchkAxf> - <nTsel>0</nTsel> - <sDll></sDll> - <sDllPa></sDllPa> - <sDlgDll></sDlgDll> - <sDlgPa></sDlgPa> - <sIfile></sIfile> - <tDll></tDll> - <tDllPa></tDllPa> - <tDlgDll></tDlgDll> - <tDlgPa></tDlgPa> - <tIfile></tIfile> - <pMon>BIN\UL2CM3.DLL</pMon> - </DebugOpt> - <TargetDriverDllRegistry> - <SetRegEntry> - <Number>0</Number> - <Key>UL2CM3</Key> - <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name> - </SetRegEntry> - </TargetDriverDllRegistry> - <Breakpoint/> - <Tracepoint> - <THDelay>0</THDelay> - </Tracepoint> - <DebugFlag> - <trace>0</trace> - <periodic>1</periodic> - <aLwin>0</aLwin> - <aCover>0</aCover> - <aSer1>0</aSer1> - <aSer2>0</aSer2> - <aPa>0</aPa> - <viewmode>0</viewmode> - <vrSel>0</vrSel> - <aSym>0</aSym> - <aTbox>0</aTbox> - <AscS1>0</AscS1> - <AscS2>0</AscS2> - <AscS3>0</AscS3> - <aSer3>0</aSer3> - <eProf>0</eProf> - <aLa>0</aLa> - <aPa1>0</aPa1> - <AscS4>0</AscS4> - <aSer4>0</aSer4> - <StkLoc>0</StkLoc> - <TrcWin>0</TrcWin> - <newCpu>0</newCpu> - <uProt>0</uProt> - </DebugFlag> - <LintExecutable></LintExecutable> - <LintConfigFile></LintConfigFile> - <bLintAuto>0</bLintAuto> - <bAutoGenD>0</bAutoGenD> - <LntExFlags>0</LntExFlags> - <pMisraName></pMisraName> - <pszMrule></pszMrule> - <pSingCmds></pSingCmds> - <pMultCmds></pMultCmds> - <pMisraNamep></pMisraNamep> - <pszMrulep></pszMrulep> - <pSingCmdsp></pSingCmdsp> - <pMultCmdsp></pMultCmdsp> - </TargetOption> - </Target> - - <Group> - <GroupName>inc</GroupName> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>1</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\inc\tx_port.h</PathWithFileName> - <FilenameWithoutPath>tx_port.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>2</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_api.h</PathWithFileName> - <FilenameWithoutPath>tx_api.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>3</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_block_pool.h</PathWithFileName> - <FilenameWithoutPath>tx_block_pool.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>4</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_byte_pool.h</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>5</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_event_flags.h</PathWithFileName> - <FilenameWithoutPath>tx_event_flags.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>6</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_initialize.h</PathWithFileName> - <FilenameWithoutPath>tx_initialize.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>7</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_mutex.h</PathWithFileName> - <FilenameWithoutPath>tx_mutex.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>8</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_queue.h</PathWithFileName> - <FilenameWithoutPath>tx_queue.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>9</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_semaphore.h</PathWithFileName> - <FilenameWithoutPath>tx_semaphore.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>10</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_thread.h</PathWithFileName> - <FilenameWithoutPath>tx_thread.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>11</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_timer.h</PathWithFileName> - <FilenameWithoutPath>tx_timer.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>12</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_trace.h</PathWithFileName> - <FilenameWithoutPath>tx_trace.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>13</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\inc\tx_user_sample.h</PathWithFileName> - <FilenameWithoutPath>tx_user_sample.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - </Group> - - <Group> - <GroupName>src</GroupName> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>14</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_context_restore.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_context_restore.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>15</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_context_save.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_context_save.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>16</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_interrupt_control.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_interrupt_control.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>17</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_interrupt_disable.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_interrupt_disable.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>18</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_interrupt_restore.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_interrupt_restore.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>19</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_schedule.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_schedule.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>20</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_stack_build.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_stack_build.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>21</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_thread_system_return.s</PathWithFileName> - <FilenameWithoutPath>tx_thread_system_return.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>22</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\src\tx_timer_interrupt.s</PathWithFileName> - <FilenameWithoutPath>tx_timer_interrupt.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>23</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_allocate.c</PathWithFileName> - <FilenameWithoutPath>tx_block_allocate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>24</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_cleanup.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_cleanup.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>25</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_create.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>26</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>27</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>28</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>29</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>30</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>31</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_pool_prioritize.c</PathWithFileName> - <FilenameWithoutPath>tx_block_pool_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>32</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_block_release.c</PathWithFileName> - <FilenameWithoutPath>tx_block_release.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>33</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_allocate.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_allocate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>34</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_cleanup.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_cleanup.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>35</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_create.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>36</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>37</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>38</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>39</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>40</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>41</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_prioritize.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>42</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_pool_search.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_pool_search.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>43</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_byte_release.c</PathWithFileName> - <FilenameWithoutPath>tx_byte_release.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>44</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_cleanup.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_cleanup.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>45</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_create.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>46</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>47</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_get.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>48</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>49</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>50</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>51</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>52</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_set.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_set.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>53</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_event_flags_set_notify.c</PathWithFileName> - <FilenameWithoutPath>tx_event_flags_set_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>54</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_initialize_high_level.c</PathWithFileName> - <FilenameWithoutPath>tx_initialize_high_level.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>55</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_initialize_kernel_enter.c</PathWithFileName> - <FilenameWithoutPath>tx_initialize_kernel_enter.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>56</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_initialize_kernel_setup.c</PathWithFileName> - <FilenameWithoutPath>tx_initialize_kernel_setup.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>57</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_misra.c</PathWithFileName> - <FilenameWithoutPath>tx_misra.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>58</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_cleanup.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_cleanup.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>59</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_create.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>60</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>61</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_get.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>62</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>63</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>64</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>65</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>66</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_prioritize.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>67</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_priority_change.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_priority_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>68</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_mutex_put.c</PathWithFileName> - <FilenameWithoutPath>tx_mutex_put.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>69</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_cleanup.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_cleanup.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>70</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_create.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>71</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>72</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_flush.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_flush.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>73</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_front_send.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_front_send.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>74</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>75</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>76</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>77</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>78</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_prioritize.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>79</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_receive.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_receive.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>80</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_send.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_send.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>81</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_queue_send_notify.c</PathWithFileName> - <FilenameWithoutPath>tx_queue_send_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>82</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_ceiling_put.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_ceiling_put.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>83</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_cleanup.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_cleanup.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>84</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_create.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>85</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>86</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_get.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>87</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>88</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>89</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>90</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>91</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_prioritize.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>92</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_put.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_put.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>93</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_semaphore_put_notify.c</PathWithFileName> - <FilenameWithoutPath>tx_semaphore_put_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>94</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_create.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>95</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>96</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_entry_exit_notify.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_entry_exit_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>97</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_identify.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_identify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>98</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>99</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>100</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>101</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>102</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_preemption_change.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_preemption_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>103</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_priority_change.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_priority_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>104</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_relinquish.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_relinquish.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>105</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_reset.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_reset.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>106</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_resume.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_resume.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>107</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_shell_entry.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_shell_entry.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>108</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_sleep.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_sleep.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>109</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_stack_analyze.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_stack_analyze.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>110</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_stack_error_handler.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_stack_error_handler.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>111</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_stack_error_notify.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_stack_error_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>112</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_suspend.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_suspend.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>113</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_system_preempt_check.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_system_preempt_check.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>114</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_system_resume.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_system_resume.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>115</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_system_suspend.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_system_suspend.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>116</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_terminate.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_terminate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>117</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_time_slice.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_time_slice.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>118</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_time_slice_change.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_time_slice_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>119</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_timeout.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_timeout.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>120</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_thread_wait_abort.c</PathWithFileName> - <FilenameWithoutPath>tx_thread_wait_abort.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>121</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_time_get.c</PathWithFileName> - <FilenameWithoutPath>tx_time_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>122</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_time_set.c</PathWithFileName> - <FilenameWithoutPath>tx_time_set.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>123</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_activate.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_activate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>124</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_change.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>125</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_create.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>126</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_deactivate.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_deactivate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>127</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_delete.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>128</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_expiration_process.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_expiration_process.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>129</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>130</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>131</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_performance_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_performance_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>132</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_performance_system_info_get.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_performance_system_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>133</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_system_activate.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_system_activate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>134</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_system_deactivate.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_system_deactivate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>135</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_timer_thread_entry.c</PathWithFileName> - <FilenameWithoutPath>tx_timer_thread_entry.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>136</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_buffer_full_notify.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_buffer_full_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>137</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_disable.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_disable.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>138</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_enable.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_enable.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>139</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_event_filter.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_event_filter.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>140</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_event_unfilter.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_event_unfilter.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>141</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_initialize.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_initialize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>142</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_interrupt_control.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_interrupt_control.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>143</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_isr_enter_insert.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_isr_enter_insert.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>144</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_isr_exit_insert.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_isr_exit_insert.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>145</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_object_register.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_object_register.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>146</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_object_unregister.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_object_unregister.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>147</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\tx_trace_user_event_insert.c</PathWithFileName> - <FilenameWithoutPath>tx_trace_user_event_insert.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>148</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_block_allocate.c</PathWithFileName> - <FilenameWithoutPath>txe_block_allocate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>149</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_block_pool_create.c</PathWithFileName> - <FilenameWithoutPath>txe_block_pool_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>150</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_block_pool_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_block_pool_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>151</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_block_pool_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_block_pool_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>152</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_block_pool_prioritize.c</PathWithFileName> - <FilenameWithoutPath>txe_block_pool_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>153</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_block_release.c</PathWithFileName> - <FilenameWithoutPath>txe_block_release.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>154</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_byte_allocate.c</PathWithFileName> - <FilenameWithoutPath>txe_byte_allocate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>155</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_byte_pool_create.c</PathWithFileName> - <FilenameWithoutPath>txe_byte_pool_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>156</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_byte_pool_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_byte_pool_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>157</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_byte_pool_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_byte_pool_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>158</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_byte_pool_prioritize.c</PathWithFileName> - <FilenameWithoutPath>txe_byte_pool_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>159</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_byte_release.c</PathWithFileName> - <FilenameWithoutPath>txe_byte_release.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>160</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_event_flags_create.c</PathWithFileName> - <FilenameWithoutPath>txe_event_flags_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>161</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_event_flags_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_event_flags_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>162</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_event_flags_get.c</PathWithFileName> - <FilenameWithoutPath>txe_event_flags_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>163</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_event_flags_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_event_flags_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>164</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_event_flags_set.c</PathWithFileName> - <FilenameWithoutPath>txe_event_flags_set.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>165</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_event_flags_set_notify.c</PathWithFileName> - <FilenameWithoutPath>txe_event_flags_set_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>166</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_mutex_create.c</PathWithFileName> - <FilenameWithoutPath>txe_mutex_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>167</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_mutex_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_mutex_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>168</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_mutex_get.c</PathWithFileName> - <FilenameWithoutPath>txe_mutex_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>169</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_mutex_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_mutex_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>170</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_mutex_prioritize.c</PathWithFileName> - <FilenameWithoutPath>txe_mutex_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>171</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_mutex_put.c</PathWithFileName> - <FilenameWithoutPath>txe_mutex_put.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>172</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_create.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>173</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>174</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_flush.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_flush.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>175</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_front_send.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_front_send.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>176</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>177</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_prioritize.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>178</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_receive.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_receive.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>179</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_send.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_send.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>180</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_queue_send_notify.c</PathWithFileName> - <FilenameWithoutPath>txe_queue_send_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>181</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_ceiling_put.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_ceiling_put.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>182</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_create.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>183</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>184</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_get.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>185</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>186</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_prioritize.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_prioritize.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>187</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_put.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_put.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>188</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_semaphore_put_notify.c</PathWithFileName> - <FilenameWithoutPath>txe_semaphore_put_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>189</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_create.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>190</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>191</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_entry_exit_notify.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_entry_exit_notify.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>192</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>193</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_preemption_change.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_preemption_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>194</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_priority_change.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_priority_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>195</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_relinquish.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_relinquish.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>196</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_reset.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_reset.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>197</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_resume.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_resume.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>198</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_suspend.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_suspend.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>199</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_terminate.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_terminate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>200</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_time_slice_change.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_time_slice_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>201</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_thread_wait_abort.c</PathWithFileName> - <FilenameWithoutPath>txe_thread_wait_abort.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>202</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_timer_activate.c</PathWithFileName> - <FilenameWithoutPath>txe_timer_activate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>203</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_timer_change.c</PathWithFileName> - <FilenameWithoutPath>txe_timer_change.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>204</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_timer_create.c</PathWithFileName> - <FilenameWithoutPath>txe_timer_create.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>205</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_timer_deactivate.c</PathWithFileName> - <FilenameWithoutPath>txe_timer_deactivate.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>206</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_timer_delete.c</PathWithFileName> - <FilenameWithoutPath>txe_timer_delete.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>207</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\..\..\..\common\src\txe_timer_info_get.c</PathWithFileName> - <FilenameWithoutPath>txe_timer_info_get.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - </Group> - -</ProjectOpt> diff --git a/ports/cortex_m0/keil/example_build/tx.uvprojx b/ports/cortex_m0/keil/example_build/tx.uvprojx deleted file mode 100644 index bd00f482..00000000 --- a/ports/cortex_m0/keil/example_build/tx.uvprojx +++ /dev/null @@ -1,1453 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no" ?> -<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> - - <SchemaVersion>2.1</SchemaVersion> - - <Header>### uVision Project, (C) Keil Software</Header> - - <Targets> - <Target> - <TargetName>tx</TargetName> - <ToolsetNumber>0x4</ToolsetNumber> - <ToolsetName>ARM-ADS</ToolsetName> - <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed> - <uAC6>0</uAC6> - <TargetOption> - <TargetCommonOption> - <Device>ARMCM0</Device> - <Vendor>ARM</Vendor> - <PackID>ARM.CMSIS.5.7.0</PackID> - <PackURL>http://www.keil.com/pack/</PackURL> - <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu> - <FlashUtilSpec></FlashUtilSpec> - <StartupFile></StartupFile> - <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll> - <DeviceId>0</DeviceId> - <RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile> - <MemoryEnv></MemoryEnv> - <Cmp></Cmp> - <Asm></Asm> - <Linker></Linker> - <OHString></OHString> - <InfinionOptionDll></InfinionOptionDll> - <SLE66CMisc></SLE66CMisc> - <SLE66AMisc></SLE66AMisc> - <SLE66LinkerMisc></SLE66LinkerMisc> - <SFDFile></SFDFile> - <bCustSvd>0</bCustSvd> - <UseEnv>0</UseEnv> - <BinPath></BinPath> - <IncludePath></IncludePath> - <LibPath></LibPath> - <RegisterFilePath></RegisterFilePath> - <DBRegisterFilePath></DBRegisterFilePath> - <TargetStatus> - <Error>0</Error> - <ExitCodeStop>0</ExitCodeStop> - <ButtonStop>0</ButtonStop> - <NotGenerated>0</NotGenerated> - <InvalidFlash>1</InvalidFlash> - </TargetStatus> - <OutputDirectory>.\Objects\</OutputDirectory> - <OutputName>tx</OutputName> - <CreateExecutable>0</CreateExecutable> - <CreateLib>1</CreateLib> - <CreateHexFile>0</CreateHexFile> - <DebugInformation>1</DebugInformation> - <BrowseInformation>1</BrowseInformation> - <ListingPath>.\Listings\</ListingPath> - <HexFormatSelection>1</HexFormatSelection> - <Merge32K>0</Merge32K> - <CreateBatchFile>0</CreateBatchFile> - <BeforeCompile> - <RunUserProg1>0</RunUserProg1> - <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> - <UserProg1Dos16Mode>0</UserProg1Dos16Mode> - <UserProg2Dos16Mode>0</UserProg2Dos16Mode> - <nStopU1X>0</nStopU1X> - <nStopU2X>0</nStopU2X> - </BeforeCompile> - <BeforeMake> - <RunUserProg1>0</RunUserProg1> - <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> - <UserProg1Dos16Mode>0</UserProg1Dos16Mode> - <UserProg2Dos16Mode>0</UserProg2Dos16Mode> - <nStopB1X>0</nStopB1X> - <nStopB2X>0</nStopB2X> - </BeforeMake> - <AfterMake> - <RunUserProg1>0</RunUserProg1> - <RunUserProg2>0</RunUserProg2> - <UserProg1Name></UserProg1Name> - <UserProg2Name></UserProg2Name> - <UserProg1Dos16Mode>0</UserProg1Dos16Mode> - <UserProg2Dos16Mode>0</UserProg2Dos16Mode> - <nStopA1X>0</nStopA1X> - <nStopA2X>0</nStopA2X> - </AfterMake> - <SelectedForBatchBuild>0</SelectedForBatchBuild> - <SVCSIdString></SVCSIdString> - </TargetCommonOption> - <CommonProperty> - <UseCPPCompiler>0</UseCPPCompiler> - <RVCTCodeConst>0</RVCTCodeConst> - <RVCTZI>0</RVCTZI> - <RVCTOtherData>0</RVCTOtherData> - <ModuleSelection>0</ModuleSelection> - <IncludeInBuild>1</IncludeInBuild> - <AlwaysBuild>0</AlwaysBuild> - <GenerateAssemblyFile>0</GenerateAssemblyFile> - <AssembleAssemblyFile>0</AssembleAssemblyFile> - <PublicsOnly>0</PublicsOnly> - <StopOnExitCode>3</StopOnExitCode> - <CustomArgument></CustomArgument> - <IncludeLibraryModules></IncludeLibraryModules> - <ComprImg>1</ComprImg> - </CommonProperty> - <DllOption> - <SimDllName>SARMCM3.DLL</SimDllName> - <SimDllArguments> </SimDllArguments> - <SimDlgDll>DARMCM1.DLL</SimDlgDll> - <SimDlgDllArguments>-pCM0</SimDlgDllArguments> - <TargetDllName>SARMCM3.DLL</TargetDllName> - <TargetDllArguments> </TargetDllArguments> - <TargetDlgDll>TARMCM1.DLL</TargetDlgDll> - <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments> - </DllOption> - <DebugOption> - <OPTHX> - <HexSelection>1</HexSelection> - <HexRangeLowAddress>0</HexRangeLowAddress> - <HexRangeHighAddress>0</HexRangeHighAddress> - <HexOffset>0</HexOffset> - <Oh166RecLen>16</Oh166RecLen> - </OPTHX> - </DebugOption> - <Utilities> - <Flash1> - <UseTargetDll>1</UseTargetDll> - <UseExternalTool>0</UseExternalTool> - <RunIndependent>0</RunIndependent> - <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> - <Capability>1</Capability> - <DriverSelection>4096</DriverSelection> - </Flash1> - <bUseTDR>1</bUseTDR> - <Flash2>BIN\UL2CM3.DLL</Flash2> - <Flash3>"" ()</Flash3> - <Flash4></Flash4> - <pFcarmOut></pFcarmOut> - <pFcarmGrp></pFcarmGrp> - <pFcArmRoot></pFcArmRoot> - <FcArmLst>0</FcArmLst> - </Utilities> - <TargetArmAds> - <ArmAdsMisc> - <GenerateListings>0</GenerateListings> - <asHll>1</asHll> - <asAsm>1</asAsm> - <asMacX>1</asMacX> - <asSyms>1</asSyms> - <asFals>1</asFals> - <asDbgD>1</asDbgD> - <asForm>1</asForm> - <ldLst>0</ldLst> - <ldmm>1</ldmm> - <ldXref>1</ldXref> - <BigEnd>0</BigEnd> - <AdsALst>1</AdsALst> - <AdsACrf>1</AdsACrf> - <AdsANop>0</AdsANop> - <AdsANot>0</AdsANot> - <AdsLLst>1</AdsLLst> - <AdsLmap>1</AdsLmap> - <AdsLcgr>1</AdsLcgr> - <AdsLsym>1</AdsLsym> - <AdsLszi>1</AdsLszi> - <AdsLtoi>1</AdsLtoi> - <AdsLsun>1</AdsLsun> - <AdsLven>1</AdsLven> - <AdsLsxf>1</AdsLsxf> - <RvctClst>0</RvctClst> - <GenPPlst>0</GenPPlst> - <AdsCpuType>"Cortex-M0"</AdsCpuType> - <RvctDeviceName></RvctDeviceName> - <mOS>0</mOS> - <uocRom>0</uocRom> - <uocRam>0</uocRam> - <hadIROM>1</hadIROM> - <hadIRAM>1</hadIRAM> - <hadXRAM>0</hadXRAM> - <uocXRam>0</uocXRam> - <RvdsVP>0</RvdsVP> - <RvdsMve>0</RvdsMve> - <RvdsCdeCp>0</RvdsCdeCp> - <hadIRAM2>0</hadIRAM2> - <hadIROM2>0</hadIROM2> - <StupSel>8</StupSel> - <useUlib>0</useUlib> - <EndSel>1</EndSel> - <uLtcg>0</uLtcg> - <nSecure>0</nSecure> - <RoSelD>3</RoSelD> - <RwSelD>3</RwSelD> - <CodeSel>0</CodeSel> - <OptFeed>0</OptFeed> - <NoZi1>0</NoZi1> - <NoZi2>0</NoZi2> - <NoZi3>0</NoZi3> - <NoZi4>0</NoZi4> - <NoZi5>0</NoZi5> - <Ro1Chk>0</Ro1Chk> - <Ro2Chk>0</Ro2Chk> - <Ro3Chk>0</Ro3Chk> - <Ir1Chk>1</Ir1Chk> - <Ir2Chk>0</Ir2Chk> - <Ra1Chk>0</Ra1Chk> - <Ra2Chk>0</Ra2Chk> - <Ra3Chk>0</Ra3Chk> - <Im1Chk>1</Im1Chk> - <Im2Chk>0</Im2Chk> - <OnChipMemories> - <Ocm1> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm1> - <Ocm2> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm2> - <Ocm3> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm3> - <Ocm4> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm4> - <Ocm5> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm5> - <Ocm6> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </Ocm6> - <IRAM> - <Type>0</Type> - <StartAddress>0x20000000</StartAddress> - <Size>0x20000</Size> - </IRAM> - <IROM> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x40000</Size> - </IROM> - <XRAM> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </XRAM> - <OCR_RVCT1> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT1> - <OCR_RVCT2> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT2> - <OCR_RVCT3> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT3> - <OCR_RVCT4> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x40000</Size> - </OCR_RVCT4> - <OCR_RVCT5> - <Type>1</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT5> - <OCR_RVCT6> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT6> - <OCR_RVCT7> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT7> - <OCR_RVCT8> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT8> - <OCR_RVCT9> - <Type>0</Type> - <StartAddress>0x20000000</StartAddress> - <Size>0x20000</Size> - </OCR_RVCT9> - <OCR_RVCT10> - <Type>0</Type> - <StartAddress>0x0</StartAddress> - <Size>0x0</Size> - </OCR_RVCT10> - </OnChipMemories> - <RvctStartVector></RvctStartVector> - </ArmAdsMisc> - <Cads> - <interw>1</interw> - <Optim>1</Optim> - <oTime>0</oTime> - <SplitLS>0</SplitLS> - <OneElfS>1</OneElfS> - <Strict>0</Strict> - <EnumInt>0</EnumInt> - <PlainCh>0</PlainCh> - <Ropi>0</Ropi> - <Rwpi>0</Rwpi> - <wLevel>2</wLevel> - <uThumb>0</uThumb> - <uSurpInc>0</uSurpInc> - <uC99>0</uC99> - <uGnu>0</uGnu> - <useXO>0</useXO> - <v6Lang>3</v6Lang> - <v6LangP>3</v6LangP> - <vShortEn>1</vShortEn> - <vShortWch>1</vShortWch> - <v6Lto>0</v6Lto> - <v6WtE>0</v6WtE> - <v6Rtti>0</v6Rtti> - <VariousControls> - <MiscControls></MiscControls> - <Define></Define> - <Undefine></Undefine> - <IncludePath>..\..\..\..\common\inc;..\inc</IncludePath> - </VariousControls> - </Cads> - <Aads> - <interw>1</interw> - <Ropi>0</Ropi> - <Rwpi>0</Rwpi> - <thumb>0</thumb> - <SplitLS>0</SplitLS> - <SwStkChk>0</SwStkChk> - <NoWarn>0</NoWarn> - <uSurpInc>0</uSurpInc> - <useXO>0</useXO> - <ClangAsOpt>1</ClangAsOpt> - <VariousControls> - <MiscControls></MiscControls> - <Define></Define> - <Undefine></Undefine> - <IncludePath></IncludePath> - </VariousControls> - </Aads> - <LDads> - <umfTarg>1</umfTarg> - <Ropi>0</Ropi> - <Rwpi>0</Rwpi> - <noStLib>0</noStLib> - <RepFail>1</RepFail> - <useFile>0</useFile> - <TextAddressRange>0x00000000</TextAddressRange> - <DataAddressRange>0x20000000</DataAddressRange> - <pXoBase></pXoBase> - <ScatterFile></ScatterFile> - <IncludeLibs></IncludeLibs> - <IncludeLibsPath></IncludeLibsPath> - <Misc></Misc> - <LinkerInputFile></LinkerInputFile> - <DisabledWarnings></DisabledWarnings> - </LDads> - </TargetArmAds> - </TargetOption> - <Groups> - <Group> - <GroupName>inc</GroupName> - <Files> - <File> - <FileName>tx_port.h</FileName> - <FileType>5</FileType> - <FilePath>..\inc\tx_port.h</FilePath> - </File> - <File> - <FileName>tx_api.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_api.h</FilePath> - </File> - <File> - <FileName>tx_block_pool.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_block_pool.h</FilePath> - </File> - <File> - <FileName>tx_byte_pool.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_byte_pool.h</FilePath> - </File> - <File> - <FileName>tx_event_flags.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_event_flags.h</FilePath> - </File> - <File> - <FileName>tx_initialize.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_initialize.h</FilePath> - </File> - <File> - <FileName>tx_mutex.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_mutex.h</FilePath> - </File> - <File> - <FileName>tx_queue.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_queue.h</FilePath> - </File> - <File> - <FileName>tx_semaphore.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_semaphore.h</FilePath> - </File> - <File> - <FileName>tx_thread.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_thread.h</FilePath> - </File> - <File> - <FileName>tx_timer.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_timer.h</FilePath> - </File> - <File> - <FileName>tx_trace.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_trace.h</FilePath> - </File> - <File> - <FileName>tx_user_sample.h</FileName> - <FileType>5</FileType> - <FilePath>..\..\..\..\common\inc\tx_user_sample.h</FilePath> - </File> - </Files> - </Group> - <Group> - <GroupName>src</GroupName> - <Files> - <File> - <FileName>tx_thread_context_restore.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_context_restore.s</FilePath> - </File> - <File> - <FileName>tx_thread_context_save.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_context_save.s</FilePath> - </File> - <File> - <FileName>tx_thread_interrupt_control.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_interrupt_control.s</FilePath> - </File> - <File> - <FileName>tx_thread_interrupt_disable.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_interrupt_disable.s</FilePath> - </File> - <File> - <FileName>tx_thread_interrupt_restore.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_interrupt_restore.s</FilePath> - </File> - <File> - <FileName>tx_thread_schedule.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_schedule.s</FilePath> - </File> - <File> - <FileName>tx_thread_stack_build.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_stack_build.s</FilePath> - </File> - <File> - <FileName>tx_thread_system_return.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_thread_system_return.s</FilePath> - </File> - <File> - <FileName>tx_timer_interrupt.s</FileName> - <FileType>2</FileType> - <FilePath>..\src\tx_timer_interrupt.s</FilePath> - </File> - <File> - <FileName>tx_block_allocate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_allocate.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_cleanup.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_cleanup.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_create.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_delete.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_info_get.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_initialize.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_block_pool_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_pool_prioritize.c</FilePath> - </File> - <File> - <FileName>tx_block_release.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_block_release.c</FilePath> - </File> - <File> - <FileName>tx_byte_allocate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_allocate.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_cleanup.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_cleanup.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_create.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_delete.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_info_get.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_initialize.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_prioritize.c</FilePath> - </File> - <File> - <FileName>tx_byte_pool_search.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_pool_search.c</FilePath> - </File> - <File> - <FileName>tx_byte_release.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_byte_release.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_cleanup.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_cleanup.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_create.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_delete.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_get.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_info_get.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_initialize.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_set.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_set.c</FilePath> - </File> - <File> - <FileName>tx_event_flags_set_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_event_flags_set_notify.c</FilePath> - </File> - <File> - <FileName>tx_initialize_high_level.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_initialize_high_level.c</FilePath> - </File> - <File> - <FileName>tx_initialize_kernel_enter.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_initialize_kernel_enter.c</FilePath> - </File> - <File> - <FileName>tx_initialize_kernel_setup.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_initialize_kernel_setup.c</FilePath> - </File> - <File> - <FileName>tx_misra.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_misra.c</FilePath> - </File> - <File> - <FileName>tx_mutex_cleanup.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_cleanup.c</FilePath> - </File> - <File> - <FileName>tx_mutex_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_create.c</FilePath> - </File> - <File> - <FileName>tx_mutex_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_delete.c</FilePath> - </File> - <File> - <FileName>tx_mutex_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_get.c</FilePath> - </File> - <File> - <FileName>tx_mutex_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_info_get.c</FilePath> - </File> - <File> - <FileName>tx_mutex_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_initialize.c</FilePath> - </File> - <File> - <FileName>tx_mutex_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_mutex_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_mutex_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_prioritize.c</FilePath> - </File> - <File> - <FileName>tx_mutex_priority_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_priority_change.c</FilePath> - </File> - <File> - <FileName>tx_mutex_put.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_mutex_put.c</FilePath> - </File> - <File> - <FileName>tx_queue_cleanup.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_cleanup.c</FilePath> - </File> - <File> - <FileName>tx_queue_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_create.c</FilePath> - </File> - <File> - <FileName>tx_queue_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_delete.c</FilePath> - </File> - <File> - <FileName>tx_queue_flush.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_flush.c</FilePath> - </File> - <File> - <FileName>tx_queue_front_send.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_front_send.c</FilePath> - </File> - <File> - <FileName>tx_queue_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_info_get.c</FilePath> - </File> - <File> - <FileName>tx_queue_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_initialize.c</FilePath> - </File> - <File> - <FileName>tx_queue_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_queue_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_queue_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_prioritize.c</FilePath> - </File> - <File> - <FileName>tx_queue_receive.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_receive.c</FilePath> - </File> - <File> - <FileName>tx_queue_send.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_send.c</FilePath> - </File> - <File> - <FileName>tx_queue_send_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_queue_send_notify.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_ceiling_put.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_ceiling_put.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_cleanup.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_cleanup.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_create.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_delete.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_get.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_info_get.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_initialize.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_prioritize.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_put.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_put.c</FilePath> - </File> - <File> - <FileName>tx_semaphore_put_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_semaphore_put_notify.c</FilePath> - </File> - <File> - <FileName>tx_thread_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_create.c</FilePath> - </File> - <File> - <FileName>tx_thread_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_delete.c</FilePath> - </File> - <File> - <FileName>tx_thread_entry_exit_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_entry_exit_notify.c</FilePath> - </File> - <File> - <FileName>tx_thread_identify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_identify.c</FilePath> - </File> - <File> - <FileName>tx_thread_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_info_get.c</FilePath> - </File> - <File> - <FileName>tx_thread_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_initialize.c</FilePath> - </File> - <File> - <FileName>tx_thread_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_thread_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_thread_preemption_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_preemption_change.c</FilePath> - </File> - <File> - <FileName>tx_thread_priority_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_priority_change.c</FilePath> - </File> - <File> - <FileName>tx_thread_relinquish.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_relinquish.c</FilePath> - </File> - <File> - <FileName>tx_thread_reset.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_reset.c</FilePath> - </File> - <File> - <FileName>tx_thread_resume.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_resume.c</FilePath> - </File> - <File> - <FileName>tx_thread_shell_entry.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_shell_entry.c</FilePath> - </File> - <File> - <FileName>tx_thread_sleep.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_sleep.c</FilePath> - </File> - <File> - <FileName>tx_thread_stack_analyze.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_stack_analyze.c</FilePath> - </File> - <File> - <FileName>tx_thread_stack_error_handler.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_stack_error_handler.c</FilePath> - </File> - <File> - <FileName>tx_thread_stack_error_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_stack_error_notify.c</FilePath> - </File> - <File> - <FileName>tx_thread_suspend.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_suspend.c</FilePath> - </File> - <File> - <FileName>tx_thread_system_preempt_check.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_system_preempt_check.c</FilePath> - </File> - <File> - <FileName>tx_thread_system_resume.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_system_resume.c</FilePath> - </File> - <File> - <FileName>tx_thread_system_suspend.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_system_suspend.c</FilePath> - </File> - <File> - <FileName>tx_thread_terminate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_terminate.c</FilePath> - </File> - <File> - <FileName>tx_thread_time_slice.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_time_slice.c</FilePath> - </File> - <File> - <FileName>tx_thread_time_slice_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_time_slice_change.c</FilePath> - </File> - <File> - <FileName>tx_thread_timeout.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_timeout.c</FilePath> - </File> - <File> - <FileName>tx_thread_wait_abort.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_thread_wait_abort.c</FilePath> - </File> - <File> - <FileName>tx_time_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_time_get.c</FilePath> - </File> - <File> - <FileName>tx_time_set.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_time_set.c</FilePath> - </File> - <File> - <FileName>tx_timer_activate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_activate.c</FilePath> - </File> - <File> - <FileName>tx_timer_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_change.c</FilePath> - </File> - <File> - <FileName>tx_timer_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_create.c</FilePath> - </File> - <File> - <FileName>tx_timer_deactivate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_deactivate.c</FilePath> - </File> - <File> - <FileName>tx_timer_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_delete.c</FilePath> - </File> - <File> - <FileName>tx_timer_expiration_process.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_expiration_process.c</FilePath> - </File> - <File> - <FileName>tx_timer_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_info_get.c</FilePath> - </File> - <File> - <FileName>tx_timer_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_initialize.c</FilePath> - </File> - <File> - <FileName>tx_timer_performance_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_performance_info_get.c</FilePath> - </File> - <File> - <FileName>tx_timer_performance_system_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_performance_system_info_get.c</FilePath> - </File> - <File> - <FileName>tx_timer_system_activate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_system_activate.c</FilePath> - </File> - <File> - <FileName>tx_timer_system_deactivate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_system_deactivate.c</FilePath> - </File> - <File> - <FileName>tx_timer_thread_entry.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_timer_thread_entry.c</FilePath> - </File> - <File> - <FileName>tx_trace_buffer_full_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_buffer_full_notify.c</FilePath> - </File> - <File> - <FileName>tx_trace_disable.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_disable.c</FilePath> - </File> - <File> - <FileName>tx_trace_enable.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_enable.c</FilePath> - </File> - <File> - <FileName>tx_trace_event_filter.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_event_filter.c</FilePath> - </File> - <File> - <FileName>tx_trace_event_unfilter.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_event_unfilter.c</FilePath> - </File> - <File> - <FileName>tx_trace_initialize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_initialize.c</FilePath> - </File> - <File> - <FileName>tx_trace_interrupt_control.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_interrupt_control.c</FilePath> - </File> - <File> - <FileName>tx_trace_isr_enter_insert.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_isr_enter_insert.c</FilePath> - </File> - <File> - <FileName>tx_trace_isr_exit_insert.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_isr_exit_insert.c</FilePath> - </File> - <File> - <FileName>tx_trace_object_register.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_object_register.c</FilePath> - </File> - <File> - <FileName>tx_trace_object_unregister.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_object_unregister.c</FilePath> - </File> - <File> - <FileName>tx_trace_user_event_insert.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\tx_trace_user_event_insert.c</FilePath> - </File> - <File> - <FileName>txe_block_allocate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_block_allocate.c</FilePath> - </File> - <File> - <FileName>txe_block_pool_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_block_pool_create.c</FilePath> - </File> - <File> - <FileName>txe_block_pool_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_block_pool_delete.c</FilePath> - </File> - <File> - <FileName>txe_block_pool_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_block_pool_info_get.c</FilePath> - </File> - <File> - <FileName>txe_block_pool_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_block_pool_prioritize.c</FilePath> - </File> - <File> - <FileName>txe_block_release.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_block_release.c</FilePath> - </File> - <File> - <FileName>txe_byte_allocate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_byte_allocate.c</FilePath> - </File> - <File> - <FileName>txe_byte_pool_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_byte_pool_create.c</FilePath> - </File> - <File> - <FileName>txe_byte_pool_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_byte_pool_delete.c</FilePath> - </File> - <File> - <FileName>txe_byte_pool_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_byte_pool_info_get.c</FilePath> - </File> - <File> - <FileName>txe_byte_pool_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_byte_pool_prioritize.c</FilePath> - </File> - <File> - <FileName>txe_byte_release.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_byte_release.c</FilePath> - </File> - <File> - <FileName>txe_event_flags_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_event_flags_create.c</FilePath> - </File> - <File> - <FileName>txe_event_flags_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_event_flags_delete.c</FilePath> - </File> - <File> - <FileName>txe_event_flags_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_event_flags_get.c</FilePath> - </File> - <File> - <FileName>txe_event_flags_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_event_flags_info_get.c</FilePath> - </File> - <File> - <FileName>txe_event_flags_set.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_event_flags_set.c</FilePath> - </File> - <File> - <FileName>txe_event_flags_set_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_event_flags_set_notify.c</FilePath> - </File> - <File> - <FileName>txe_mutex_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_mutex_create.c</FilePath> - </File> - <File> - <FileName>txe_mutex_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_mutex_delete.c</FilePath> - </File> - <File> - <FileName>txe_mutex_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_mutex_get.c</FilePath> - </File> - <File> - <FileName>txe_mutex_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_mutex_info_get.c</FilePath> - </File> - <File> - <FileName>txe_mutex_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_mutex_prioritize.c</FilePath> - </File> - <File> - <FileName>txe_mutex_put.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_mutex_put.c</FilePath> - </File> - <File> - <FileName>txe_queue_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_create.c</FilePath> - </File> - <File> - <FileName>txe_queue_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_delete.c</FilePath> - </File> - <File> - <FileName>txe_queue_flush.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_flush.c</FilePath> - </File> - <File> - <FileName>txe_queue_front_send.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_front_send.c</FilePath> - </File> - <File> - <FileName>txe_queue_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_info_get.c</FilePath> - </File> - <File> - <FileName>txe_queue_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_prioritize.c</FilePath> - </File> - <File> - <FileName>txe_queue_receive.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_receive.c</FilePath> - </File> - <File> - <FileName>txe_queue_send.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_send.c</FilePath> - </File> - <File> - <FileName>txe_queue_send_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_queue_send_notify.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_ceiling_put.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_ceiling_put.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_create.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_delete.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_get.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_info_get.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_prioritize.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_prioritize.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_put.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_put.c</FilePath> - </File> - <File> - <FileName>txe_semaphore_put_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_semaphore_put_notify.c</FilePath> - </File> - <File> - <FileName>txe_thread_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_create.c</FilePath> - </File> - <File> - <FileName>txe_thread_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_delete.c</FilePath> - </File> - <File> - <FileName>txe_thread_entry_exit_notify.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_entry_exit_notify.c</FilePath> - </File> - <File> - <FileName>txe_thread_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_info_get.c</FilePath> - </File> - <File> - <FileName>txe_thread_preemption_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_preemption_change.c</FilePath> - </File> - <File> - <FileName>txe_thread_priority_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_priority_change.c</FilePath> - </File> - <File> - <FileName>txe_thread_relinquish.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_relinquish.c</FilePath> - </File> - <File> - <FileName>txe_thread_reset.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_reset.c</FilePath> - </File> - <File> - <FileName>txe_thread_resume.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_resume.c</FilePath> - </File> - <File> - <FileName>txe_thread_suspend.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_suspend.c</FilePath> - </File> - <File> - <FileName>txe_thread_terminate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_terminate.c</FilePath> - </File> - <File> - <FileName>txe_thread_time_slice_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_time_slice_change.c</FilePath> - </File> - <File> - <FileName>txe_thread_wait_abort.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_thread_wait_abort.c</FilePath> - </File> - <File> - <FileName>txe_timer_activate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_timer_activate.c</FilePath> - </File> - <File> - <FileName>txe_timer_change.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_timer_change.c</FilePath> - </File> - <File> - <FileName>txe_timer_create.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_timer_create.c</FilePath> - </File> - <File> - <FileName>txe_timer_deactivate.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_timer_deactivate.c</FilePath> - </File> - <File> - <FileName>txe_timer_delete.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_timer_delete.c</FilePath> - </File> - <File> - <FileName>txe_timer_info_get.c</FileName> - <FileType>1</FileType> - <FilePath>..\..\..\..\common\src\txe_timer_info_get.c</FilePath> - </File> - </Files> - </Group> - </Groups> - </Target> - </Targets> - - <RTE> - <apis/> - <components/> - <files/> - </RTE> - - <LayerInfo> - <Layers> - <Layer> - <LayName><Project Info></LayName> - <LayDesc></LayDesc> - <LayUrl></LayUrl> - <LayKeys></LayKeys> - <LayCat></LayCat> - <LayLic></LayLic> - <LayTarg>0</LayTarg> - <LayPrjMark>1</LayPrjMark> - </Layer> - </Layers> - </LayerInfo> - -</Project> diff --git a/ports/cortex_m23/ac6/inc/tx_port.h b/ports/cortex_m23/ac6/inc/tx_port.h index ccde44e9..5de6c143 100644 --- a/ports/cortex_m23/ac6/inc/tx_port.h +++ b/ports/cortex_m23/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M23/AC6 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -62,6 +62,10 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -342,7 +346,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -411,7 +415,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/AC6 Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/AC6 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m23/ac6/src/tx_misra.S b/ports/cortex_m23/ac6/src/tx_misra.S new file mode 100644 index 00000000..4393fc6f --- /dev/null +++ b/ports/cortex_m23/ac6/src/tx_misra.S @@ -0,0 +1,724 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** ThreadX MISRA Compliance */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + #define SHT_PROGBITS 0x1 + + .global __aeabi_memset + .global _tx_thread_current_ptr + .global _tx_thread_interrupt_disable + .global _tx_thread_interrupt_restore + .global _tx_thread_stack_analyze + .global _tx_thread_stack_error_handler + .global _tx_thread_system_state +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_trace_buffer_current_ptr + .global _tx_trace_buffer_end_ptr + .global _tx_trace_buffer_start_ptr + .global _tx_trace_event_enable_bits + .global _tx_trace_full_notify_function + .global _tx_trace_header_ptr +#endif + + .global _tx_misra_always_true + .global _tx_misra_block_pool_to_uchar_pointer_convert + .global _tx_misra_byte_pool_to_uchar_pointer_convert + .global _tx_misra_char_to_uchar_pointer_convert + .global _tx_misra_const_char_to_char_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_entry_to_uchar_pointer_convert +#endif + .global _tx_misra_indirect_void_to_uchar_pointer_convert + .global _tx_misra_memset + .global _tx_misra_message_copy +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_object_to_uchar_pointer_convert +#endif + .global _tx_misra_pointer_to_ulong_convert + .global _tx_misra_status_get + .global _tx_misra_thread_stack_check +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_time_stamp_get +#endif + .global _tx_misra_timer_indirect_to_void_pointer_convert + .global _tx_misra_timer_pointer_add + .global _tx_misra_timer_pointer_dif +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_trace_event_insert +#endif + .global _tx_misra_uchar_pointer_add + .global _tx_misra_uchar_pointer_dif + .global _tx_misra_uchar_pointer_sub + .global _tx_misra_uchar_to_align_type_pointer_convert + .global _tx_misra_uchar_to_block_pool_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_entry_pointer_convert + .global _tx_misra_uchar_to_header_pointer_convert +#endif + .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert + .global _tx_misra_uchar_to_indirect_uchar_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_object_pointer_convert +#endif + .global _tx_misra_uchar_to_void_pointer_convert + .global _tx_misra_ulong_pointer_add + .global _tx_misra_ulong_pointer_dif + .global _tx_misra_ulong_pointer_sub + .global _tx_misra_ulong_to_pointer_convert + .global _tx_misra_ulong_to_thread_pointer_convert + .global _tx_misra_user_timer_pointer_get + .global _tx_misra_void_to_block_pool_pointer_convert + .global _tx_misra_void_to_byte_pool_pointer_convert + .global _tx_misra_void_to_event_flags_pointer_convert + .global _tx_misra_void_to_indirect_uchar_pointer_convert + .global _tx_misra_void_to_mutex_pointer_convert + .global _tx_misra_void_to_queue_pointer_convert + .global _tx_misra_void_to_semaphore_pointer_convert + .global _tx_misra_void_to_thread_pointer_convert + .global _tx_misra_void_to_uchar_pointer_convert + .global _tx_misra_void_to_ulong_pointer_convert + .global _tx_misra_ipsr_get + .global _tx_misra_control_get + .global _tx_misra_control_set +#ifdef __ARM_FP + .global _tx_misra_fpccr_get + .global _tx_misra_vfp_touch +#endif + + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_memset(VOID *ptr, UINT value, UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .align 4 + .syntax unified + .thumb_func +_tx_misra_memset: + PUSH {R4,LR} + MOVS R4,R0 + MOVS R0,R2 + MOVS R2,R1 + MOVS R1,R0 + MOVS R0,R4 + BL __aeabi_memset + POP {R4,PC} // return + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_add: + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_sub: + RSBS R1,R1,#+0 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_dif: + SUBS R0,R0,R1 + BX LR // return + + +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ + .text + .thumb_func +_tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_add: + LSLS R1,#2 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_sub: + MOVS R3,#3 + MVNS R2,R3 + MULS R1,R2,R1 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ +/** UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_message_copy: + PUSH {R4,R5} + LDR R3,[R0, #+0] + LDR R4,[R1, #+0] + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + CMP R2,#+2 + BCC.N _tx_misra_message_copy_0 + SUBS R2,R2,#+1 + B.N _tx_misra_message_copy_1 +_tx_misra_message_copy_2: + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + SUBS R2,R2,#+1 +_tx_misra_message_copy_1: + CMP R2,#+0 + BNE.N _tx_misra_message_copy_2 +_tx_misra_message_copy_0: + STR R3,[R0, #+0] + STR R4,[R1, #+0] + POP {R4,R5} + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1, */ +/** TX_TIMER_INTERNAL **ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL */ +/** **ptr1, ULONG size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_add: + LSLS R1,#2 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL */ +/** *internal_timer, TX_TIMER **user_timer); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_user_timer_pointer_get: + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_thread_stack_check(TX_THREAD *thread_ptr, */ +/** VOID **highest_stack); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_thread_stack_check: + PUSH {R3-R7,LR} + MOVS R4,R0 + MOVS R5,R1 + BL _tx_thread_interrupt_disable + CMP R4,#0 + BEQ.N _tx_misra_thread_stack_check_0 + LDR R1,[R4] + LDR R2,=0x54485244 + CMP R1,R2 + BNE.N _tx_misra_thread_stack_check_0 + LDR R1,[R4, #8] + LDR R2,[R5] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_1 + STR R1,[R5] +_tx_misra_thread_stack_check_1: + LDR R1,[R4, #12] + LDR R1,[R1] + LDR R6,=0xEFEFEFEF + CMP R1,R6 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R4, #16] + MOVS R7,#1 + LDR R1,[R1, R7] + CMP R1,R6 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R5] + LDR R2,[R4, #12] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_3 +_tx_misra_thread_stack_check_2: + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_error_handler + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_3: + LDR R1,[R5] + LDR R7,=-4 + LDR R1,[R1, R7] + CMP R1,R6 + BEQ.N _tx_misra_thread_stack_check_0 + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_analyze + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_0: + BL _tx_thread_interrupt_restore + POP {R0,R4,R5,R6,R7,PC} // return + +#ifdef TX_ENABLE_EVENT_TRACE + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_trace_event_insert(ULONG event_id, */ +/** VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */ +/** ULONG info_field_4, ULONG filter, ULONG time_stamp); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_trace_event_insert: + PUSH {R3-R7,LR} + LDR.N R4,DataTable2_1 + LDR R4,[R4, #+0] + CMP R4,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_2 + LDR R5,[R5, #+0] + LDR R6,[SP, #+28] + TST R5,R6 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_3 + LDR R5,[R5, #+0] + LDR.N R6,DataTable2_4 + LDR R6,[R6, #+0] + CMP R5,#+0 + BNE.N _tx_misra_trace_event_insert_1 + LDR R5,[R6, #+44] + LDR R7,[R6, #+60] + LSLS R7,R7,#+16 + ORRS R7,R7,#0x80000000 + ORRS R5,R7,R5 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_1: + CMP R5,#-252645136 + BCS.N _tx_misra_trace_event_insert_3 + MOVS R5,R6 + MOVS R6,#-1 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_3: + MOVS R6,#-252645136 + MOVS R5,#+0 +_tx_misra_trace_event_insert_2: + STR R6,[R4, #+0] + STR R5,[R4, #+4] + STR R0,[R4, #+8] + LDR R0,[SP, #+32] + STR R0,[R4, #+12] + STR R1,[R4, #+16] + STR R2,[R4, #+20] + STR R3,[R4, #+24] + LDR R0,[SP, #+24] + STR R0,[R4, #+28] + ADDS R4,R4,#+32 + LDR.N R0,DataTable2_5 + LDR R0,[R0, #+0] + CMP R4,R0 + BCC.N _tx_misra_trace_event_insert_4 + LDR.N R0,DataTable2_6 + LDR R4,[R0, #+0] + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] + LDR.N R0,DataTable2_8 + LDR R0,[R0, #+0] + CMP R0,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + LDR.N R1,DataTable2_8 + LDR R1,[R1, #+0] + BLX R1 + B.N _tx_misra_trace_event_insert_0 +_tx_misra_trace_event_insert_4: + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] +_tx_misra_trace_event_insert_0: + POP {R0,R4-R7,PC} // return + + + .data +DataTable2_1: + .word _tx_trace_buffer_current_ptr + + .data +DataTable2_2: + .word _tx_trace_event_enable_bits + + .data +DataTable2_5: + .word _tx_trace_buffer_end_ptr + + .data +DataTable2_6: + .word _tx_trace_buffer_start_ptr + + .data +DataTable2_7: + .word _tx_trace_header_ptr + + .data +DataTable2_8: + .word _tx_trace_full_notify_function + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_time_stamp_get(VOID); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_time_stamp_get: + MOVS R0,#+0 + BX LR // return + +#endif + + .data +DataTable2_3: + .word _tx_thread_system_state + + .data +DataTable2_4: + .word _tx_thread_current_ptr + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_always_true(void); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_always_true: + MOVS R0,#+1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_status_get(UINT status); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_status_get: + MOVS R0,#+0 + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_ipsr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_ipsr_get: + MRS R0, IPSR + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_control_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_get: + MRS R0, CONTROL + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_control_set(ULONG value); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_set: + MSR CONTROL, R0 + BX LR // return + + +#ifdef __ARM_FP + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_fpccr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_fpccr_get: + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_vfp_touch(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_vfp_touch: + vmov.f32 s0, s0 + BX LR // return + +#endif + + + .data + .word 0 diff --git a/ports/cortex_m23/ac6/src/tx_thread_secure_stack.c b/ports/cortex_m23/ac6/src/tx_thread_secure_stack.c index 7892402b..f1096762 100644 --- a/ports/cortex_m23/ac6/src/tx_thread_secure_stack.c +++ b/ports/cortex_m23/ac6/src/tx_thread_secure_stack.c @@ -23,7 +23,7 @@ #include "tx_api.h" -/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, +/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, no secure stack functionality is needed. */ #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) @@ -45,8 +45,14 @@ #define TX_THREAD_STACK_SEAL_SIZE 8 #define TX_THREAD_STACK_SEAL_VALUE 0xFEF5EDA5 -/* Secure stack info struct to hold stack start, stack limit, - current stack pointer, and pointer to owning thread. +/* max number of Secure context */ +#ifndef TX_MAX_SECURE_CONTEXTS +#define TX_MAX_SECURE_CONTEXTS 32 +#endif +#define TX_INVALID_SECURE_CONTEXT_IDX (-1) + +/* Secure stack info struct to hold stack start, stack limit, + current stack pointer, and pointer to owning thread. This will be allocated for each thread with a secure stack. */ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT { @@ -54,8 +60,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT VOID *tx_thread_secure_stack_start; /* Thread's secure stack start address */ VOID *tx_thread_secure_stack_limit; /* Thread's secure stack limit */ TX_THREAD *tx_thread_ptr; /* Keep track of thread for error handling */ + INT tx_next_free_index; /* Next free index of free secure context */ } TX_THREAD_SECURE_STACK_INFO; +/* Static secure contexts */ +static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS]; +/* Head of free secure context */ +static INT tx_head_free_index = 0U; + /**************************************************************************/ @@ -63,7 +75,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_initialize Cortex-M23/AC6 */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -102,12 +114,16 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT /* changed name, execute in */ /* handler mode, */ /* resulting in version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_initialize(void) { UINT status; +INT index; /* Make sure function is called from interrupt (threads should not call). */ if (__get_IPSR() == 0) @@ -118,12 +134,26 @@ UINT status; { /* Set secure mode to use PSP. */ __set_CONTROL(__get_CONTROL() | 2); - + /* Set process stack pointer and stack limit to 0 to throw exception when a thread without a secure stack calls a secure function that tries to use secure stack. */ __set_PSPLIM(0); __set_PSP(0); - + + for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++) + { + + /* Check last index and mark next free to invalid index */ + if(index == (TX_MAX_SECURE_CONTEXTS - 1)) + { + tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + else + { + tx_thread_secure_context[index].tx_next_free_index = index + 1; + } + } + status = TX_SUCCESS; } return status; @@ -136,7 +166,7 @@ UINT status; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_allocate Cortex-M23/AC6 */ -/* 6.1.1 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -160,9 +190,7 @@ UINT status; /* CALLS */ /* */ /* __get_IPSR Intrinsic to get IPSR */ -/* calloc Compiler's calloc function */ /* malloc Compiler's malloc function */ -/* free Compiler's free() function */ /* __set_PSPLIM Intrinsic to set PSP limit */ /* __set_PSP Intrinsic to set PSP */ /* __TZ_get_PSPLIM_NS Intrinsic to get NS PSP */ @@ -179,18 +207,22 @@ UINT status; /* 10-16-2020 Scott Larson Modified comment(s), */ /* added stack sealing, */ /* resulting in version 6.1.1 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; UCHAR *stack_mem; -ULONG sp; +INT secure_context_index; status = TX_SUCCESS; - + /* Make sure function is called from interrupt (threads should not call). */ if (__get_IPSR() == 0) { @@ -200,23 +232,38 @@ ULONG sp; { status = TX_SIZE_ERROR; } - + /* Check if thread already has secure stack allocated. */ else if (thread_ptr -> tx_thread_secure_stack_context != 0) { status = TX_THREAD_ERROR; } - + else { - /* Allocate space for secure stack info. */ - info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO)); - - if(info_ptr != TX_NULL) + TX_DISABLE + + /* Allocate free index for secure stack info. */ + if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX) + { + secure_context_index = tx_head_free_index; + tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index; + tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + else + { + secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + + TX_RESTORE + + if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX) { + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* If stack info allocated, allocate a stack & seal. */ stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE); - + if(stack_mem != TX_NULL) { /* Secure stack has been allocated, save in the stack info struct. */ @@ -224,38 +271,41 @@ ULONG sp; info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size; info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start; info_ptr -> tx_thread_ptr = thread_ptr; - + /* Seal bottom of stack. */ *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE; - - /* Save info pointer in thread. */ - thread_ptr -> tx_thread_secure_stack_context = info_ptr; - - /* Check if this thread is running by looking at PSP_NS and seeing if it is within - the stack_start and stack_end range. */ - sp = __TZ_get_PSP_NS(); - if(sp > ((ULONG) thread_ptr -> tx_thread_stack_start) && sp < ((ULONG) thread_ptr -> tx_thread_stack_end)) + + /* Save secure context id (i.e non-zero base index) in thread. */ + thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1); + + /* Check if this thread is running by looking at its stack start and PSPLIM_NS */ + if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == __TZ_get_PSPLIM_NS()) { /* If this thread is running, set Secure PSP and PSPLIM. */ __set_PSPLIM((ULONG)(info_ptr -> tx_thread_secure_stack_limit)); __set_PSP((ULONG)(info_ptr -> tx_thread_secure_stack_ptr)); } } - + else { + TX_DISABLE + /* Stack not allocated, free the info struct. */ - free(info_ptr); + tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index; + tx_head_free_index = secure_context_index; + TX_RESTORE + status = TX_NO_MEMORY; } } - + else { status = TX_NO_MEMORY; } } - + return(status); } @@ -266,7 +316,7 @@ ULONG sp; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_free Cortex-M23/AC6 */ -/* 6.1.1 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -301,44 +351,65 @@ ULONG sp; /* 09-30-2020 Scott Larson Initial Version 6.1 */ /* 10-16-2020 Scott Larson Modified comment(s), */ /* resulting in version 6.1.1 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; +INT secure_context_index; status = TX_SUCCESS; - - /* Pickup stack info from thread. */ - info_ptr = thread_ptr -> tx_thread_secure_stack_context; - + + /* Pickup stack info id from thread. */ + secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; + /* Make sure function is called from interrupt (threads should not call). */ if (__get_IPSR() == 0) { status = TX_CALLER_ERROR; } - - /* Check that this secure context is for this thread. */ - else if (info_ptr -> tx_thread_ptr != thread_ptr) + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) { status = TX_THREAD_ERROR; } - else { - - /* Free secure stack. */ - free(info_ptr -> tx_thread_secure_stack_limit); - - /* Free info struct. */ - free(info_ptr); - - /* Clear secure context from thread. */ - thread_ptr -> tx_thread_secure_stack_context = 0; + + /* Pickup stack info from static array of secure contexts. */ + info_ptr = &tx_thread_secure_context[secure_context_index]; + + /* Check that this secure context is for this thread. */ + if (info_ptr -> tx_thread_ptr != thread_ptr) + { + status = TX_THREAD_ERROR; + } + + else + { + + /* Free secure stack. */ + free(info_ptr -> tx_thread_secure_stack_limit); + + TX_DISABLE + + /* Free info struct. */ + tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index; + tx_head_free_index = secure_context_index; + TX_RESTORE + + /* Clear secure context from thread. */ + thread_ptr -> tx_thread_secure_stack_context = 0; + } } - + return(status); } @@ -349,7 +420,7 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_context_save Cortex-M23/AC6 */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -386,6 +457,9 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr; /* resulting in version 6.1.1 */ /* 06-02-2021 Scott Larson Fix stack pointer save, */ /* resulting in version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) @@ -393,38 +467,45 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr) { TX_THREAD_SECURE_STACK_INFO *info_ptr; ULONG sp; +INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; /* This function should be called from scheduler only. */ if (__get_IPSR() == 0) { return; } - + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) + { + return; + } + /* Pickup the secure context pointer. */ - info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context); - + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* Check that this secure context is for this thread. */ if (info_ptr -> tx_thread_ptr != thread_ptr) { return; } - + /* Check that stack pointer is in range */ sp = __get_PSP(); - if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || + if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start)) { return; } - + /* Save stack pointer. */ info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp; - + /* Set process stack pointer and stack limit to 0 to throw exception when a thread without a secure stack calls a secure function that tries to use secure stack. */ __set_PSPLIM(0); __set_PSP(0); - + return; } @@ -435,7 +516,7 @@ ULONG sp; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_context_restore Cortex-M23/AC6 */ -/* 6.1.1 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -469,32 +550,42 @@ ULONG sp; /* 09-30-2020 Scott Larson Initial Version 6.1 */ /* 10-16-2020 Scott Larson Modified comment(s), */ /* resulting in version 6.1.1 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr) { TX_THREAD_SECURE_STACK_INFO *info_ptr; +INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; /* This function should be called from scheduler only. */ if (__get_IPSR() == 0) { return; } - + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) + { + return; + } + /* Pickup the secure context pointer. */ - info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context); - + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* Check that this secure context is for this thread. */ if (info_ptr -> tx_thread_ptr != thread_ptr) { return; } - + /* Set stack pointer and limit. */ __set_PSPLIM((ULONG)info_ptr -> tx_thread_secure_stack_limit); __set_PSP ((ULONG)info_ptr -> tx_thread_secure_stack_ptr); - + return; } diff --git a/ports/cortex_m23/ac6/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m23/ac6/src/tx_thread_secure_stack_initialize.S index 06dc8812..bada32ce 100644 --- a/ports/cortex_m23/ac6/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m23/ac6/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M23/AC6 */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m23/gnu/inc/tx_port.h b/ports/cortex_m23/gnu/inc/tx_port.h index db5935cb..5cf9896b 100644 --- a/ports/cortex_m23/gnu/inc/tx_port.h +++ b/ports/cortex_m23/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M23/GNU */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -63,6 +63,10 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -341,7 +345,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -443,7 +447,7 @@ unsigned int interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/GNU Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m23/gnu/src/tx_misra.S b/ports/cortex_m23/gnu/src/tx_misra.S new file mode 100644 index 00000000..4393fc6f --- /dev/null +++ b/ports/cortex_m23/gnu/src/tx_misra.S @@ -0,0 +1,724 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** ThreadX MISRA Compliance */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + #define SHT_PROGBITS 0x1 + + .global __aeabi_memset + .global _tx_thread_current_ptr + .global _tx_thread_interrupt_disable + .global _tx_thread_interrupt_restore + .global _tx_thread_stack_analyze + .global _tx_thread_stack_error_handler + .global _tx_thread_system_state +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_trace_buffer_current_ptr + .global _tx_trace_buffer_end_ptr + .global _tx_trace_buffer_start_ptr + .global _tx_trace_event_enable_bits + .global _tx_trace_full_notify_function + .global _tx_trace_header_ptr +#endif + + .global _tx_misra_always_true + .global _tx_misra_block_pool_to_uchar_pointer_convert + .global _tx_misra_byte_pool_to_uchar_pointer_convert + .global _tx_misra_char_to_uchar_pointer_convert + .global _tx_misra_const_char_to_char_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_entry_to_uchar_pointer_convert +#endif + .global _tx_misra_indirect_void_to_uchar_pointer_convert + .global _tx_misra_memset + .global _tx_misra_message_copy +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_object_to_uchar_pointer_convert +#endif + .global _tx_misra_pointer_to_ulong_convert + .global _tx_misra_status_get + .global _tx_misra_thread_stack_check +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_time_stamp_get +#endif + .global _tx_misra_timer_indirect_to_void_pointer_convert + .global _tx_misra_timer_pointer_add + .global _tx_misra_timer_pointer_dif +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_trace_event_insert +#endif + .global _tx_misra_uchar_pointer_add + .global _tx_misra_uchar_pointer_dif + .global _tx_misra_uchar_pointer_sub + .global _tx_misra_uchar_to_align_type_pointer_convert + .global _tx_misra_uchar_to_block_pool_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_entry_pointer_convert + .global _tx_misra_uchar_to_header_pointer_convert +#endif + .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert + .global _tx_misra_uchar_to_indirect_uchar_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_object_pointer_convert +#endif + .global _tx_misra_uchar_to_void_pointer_convert + .global _tx_misra_ulong_pointer_add + .global _tx_misra_ulong_pointer_dif + .global _tx_misra_ulong_pointer_sub + .global _tx_misra_ulong_to_pointer_convert + .global _tx_misra_ulong_to_thread_pointer_convert + .global _tx_misra_user_timer_pointer_get + .global _tx_misra_void_to_block_pool_pointer_convert + .global _tx_misra_void_to_byte_pool_pointer_convert + .global _tx_misra_void_to_event_flags_pointer_convert + .global _tx_misra_void_to_indirect_uchar_pointer_convert + .global _tx_misra_void_to_mutex_pointer_convert + .global _tx_misra_void_to_queue_pointer_convert + .global _tx_misra_void_to_semaphore_pointer_convert + .global _tx_misra_void_to_thread_pointer_convert + .global _tx_misra_void_to_uchar_pointer_convert + .global _tx_misra_void_to_ulong_pointer_convert + .global _tx_misra_ipsr_get + .global _tx_misra_control_get + .global _tx_misra_control_set +#ifdef __ARM_FP + .global _tx_misra_fpccr_get + .global _tx_misra_vfp_touch +#endif + + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_memset(VOID *ptr, UINT value, UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .align 4 + .syntax unified + .thumb_func +_tx_misra_memset: + PUSH {R4,LR} + MOVS R4,R0 + MOVS R0,R2 + MOVS R2,R1 + MOVS R1,R0 + MOVS R0,R4 + BL __aeabi_memset + POP {R4,PC} // return + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_add: + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_sub: + RSBS R1,R1,#+0 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_dif: + SUBS R0,R0,R1 + BX LR // return + + +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ + .text + .thumb_func +_tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_add: + LSLS R1,#2 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_sub: + MOVS R3,#3 + MVNS R2,R3 + MULS R1,R2,R1 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ +/** UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_message_copy: + PUSH {R4,R5} + LDR R3,[R0, #+0] + LDR R4,[R1, #+0] + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + CMP R2,#+2 + BCC.N _tx_misra_message_copy_0 + SUBS R2,R2,#+1 + B.N _tx_misra_message_copy_1 +_tx_misra_message_copy_2: + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + SUBS R2,R2,#+1 +_tx_misra_message_copy_1: + CMP R2,#+0 + BNE.N _tx_misra_message_copy_2 +_tx_misra_message_copy_0: + STR R3,[R0, #+0] + STR R4,[R1, #+0] + POP {R4,R5} + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1, */ +/** TX_TIMER_INTERNAL **ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL */ +/** **ptr1, ULONG size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_add: + LSLS R1,#2 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL */ +/** *internal_timer, TX_TIMER **user_timer); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_user_timer_pointer_get: + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_thread_stack_check(TX_THREAD *thread_ptr, */ +/** VOID **highest_stack); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_thread_stack_check: + PUSH {R3-R7,LR} + MOVS R4,R0 + MOVS R5,R1 + BL _tx_thread_interrupt_disable + CMP R4,#0 + BEQ.N _tx_misra_thread_stack_check_0 + LDR R1,[R4] + LDR R2,=0x54485244 + CMP R1,R2 + BNE.N _tx_misra_thread_stack_check_0 + LDR R1,[R4, #8] + LDR R2,[R5] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_1 + STR R1,[R5] +_tx_misra_thread_stack_check_1: + LDR R1,[R4, #12] + LDR R1,[R1] + LDR R6,=0xEFEFEFEF + CMP R1,R6 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R4, #16] + MOVS R7,#1 + LDR R1,[R1, R7] + CMP R1,R6 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R5] + LDR R2,[R4, #12] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_3 +_tx_misra_thread_stack_check_2: + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_error_handler + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_3: + LDR R1,[R5] + LDR R7,=-4 + LDR R1,[R1, R7] + CMP R1,R6 + BEQ.N _tx_misra_thread_stack_check_0 + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_analyze + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_0: + BL _tx_thread_interrupt_restore + POP {R0,R4,R5,R6,R7,PC} // return + +#ifdef TX_ENABLE_EVENT_TRACE + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_trace_event_insert(ULONG event_id, */ +/** VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */ +/** ULONG info_field_4, ULONG filter, ULONG time_stamp); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_trace_event_insert: + PUSH {R3-R7,LR} + LDR.N R4,DataTable2_1 + LDR R4,[R4, #+0] + CMP R4,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_2 + LDR R5,[R5, #+0] + LDR R6,[SP, #+28] + TST R5,R6 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_3 + LDR R5,[R5, #+0] + LDR.N R6,DataTable2_4 + LDR R6,[R6, #+0] + CMP R5,#+0 + BNE.N _tx_misra_trace_event_insert_1 + LDR R5,[R6, #+44] + LDR R7,[R6, #+60] + LSLS R7,R7,#+16 + ORRS R7,R7,#0x80000000 + ORRS R5,R7,R5 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_1: + CMP R5,#-252645136 + BCS.N _tx_misra_trace_event_insert_3 + MOVS R5,R6 + MOVS R6,#-1 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_3: + MOVS R6,#-252645136 + MOVS R5,#+0 +_tx_misra_trace_event_insert_2: + STR R6,[R4, #+0] + STR R5,[R4, #+4] + STR R0,[R4, #+8] + LDR R0,[SP, #+32] + STR R0,[R4, #+12] + STR R1,[R4, #+16] + STR R2,[R4, #+20] + STR R3,[R4, #+24] + LDR R0,[SP, #+24] + STR R0,[R4, #+28] + ADDS R4,R4,#+32 + LDR.N R0,DataTable2_5 + LDR R0,[R0, #+0] + CMP R4,R0 + BCC.N _tx_misra_trace_event_insert_4 + LDR.N R0,DataTable2_6 + LDR R4,[R0, #+0] + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] + LDR.N R0,DataTable2_8 + LDR R0,[R0, #+0] + CMP R0,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + LDR.N R1,DataTable2_8 + LDR R1,[R1, #+0] + BLX R1 + B.N _tx_misra_trace_event_insert_0 +_tx_misra_trace_event_insert_4: + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] +_tx_misra_trace_event_insert_0: + POP {R0,R4-R7,PC} // return + + + .data +DataTable2_1: + .word _tx_trace_buffer_current_ptr + + .data +DataTable2_2: + .word _tx_trace_event_enable_bits + + .data +DataTable2_5: + .word _tx_trace_buffer_end_ptr + + .data +DataTable2_6: + .word _tx_trace_buffer_start_ptr + + .data +DataTable2_7: + .word _tx_trace_header_ptr + + .data +DataTable2_8: + .word _tx_trace_full_notify_function + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_time_stamp_get(VOID); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_time_stamp_get: + MOVS R0,#+0 + BX LR // return + +#endif + + .data +DataTable2_3: + .word _tx_thread_system_state + + .data +DataTable2_4: + .word _tx_thread_current_ptr + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_always_true(void); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_always_true: + MOVS R0,#+1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_status_get(UINT status); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_status_get: + MOVS R0,#+0 + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_ipsr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_ipsr_get: + MRS R0, IPSR + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_control_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_get: + MRS R0, CONTROL + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_control_set(ULONG value); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_set: + MSR CONTROL, R0 + BX LR // return + + +#ifdef __ARM_FP + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_fpccr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_fpccr_get: + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_vfp_touch(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_vfp_touch: + vmov.f32 s0, s0 + BX LR // return + +#endif + + + .data + .word 0 diff --git a/ports/cortex_m23/gnu/src/tx_thread_secure_stack.c b/ports/cortex_m23/gnu/src/tx_thread_secure_stack.c index cd91548d..ac7c70a5 100644 --- a/ports/cortex_m23/gnu/src/tx_thread_secure_stack.c +++ b/ports/cortex_m23/gnu/src/tx_thread_secure_stack.c @@ -23,7 +23,7 @@ #include "tx_api.h" -/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, +/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, no secure stack functionality is needed. */ #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) @@ -44,8 +44,14 @@ #define TX_THREAD_STACK_SEAL_SIZE 8 #define TX_THREAD_STACK_SEAL_VALUE 0xFEF5EDA5 -/* Secure stack info struct to hold stack start, stack limit, - current stack pointer, and pointer to owning thread. +/* max number of Secure context */ +#ifndef TX_MAX_SECURE_CONTEXTS +#define TX_MAX_SECURE_CONTEXTS 32 +#endif +#define TX_INVALID_SECURE_CONTEXT_IDX (-1) + +/* Secure stack info struct to hold stack start, stack limit, + current stack pointer, and pointer to owning thread. This will be allocated for each thread with a secure stack. */ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT { @@ -53,8 +59,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT VOID *tx_thread_secure_stack_start; /* Thread's secure stack start address */ VOID *tx_thread_secure_stack_limit; /* Thread's secure stack limit */ TX_THREAD *tx_thread_ptr; /* Keep track of thread for error handling */ + INT tx_next_free_index; /* Next free index of free secure context */ } TX_THREAD_SECURE_STACK_INFO; +/* Static secure contexts */ +static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS]; +/* Head of free secure context */ +static INT tx_head_free_index = 0U; + /**************************************************************************/ @@ -62,7 +74,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_initialize Cortex-M23/GNU */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -98,6 +110,9 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT /* name, execute in handler */ /* mode, disable optimization, */ /* resulting in version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry, optimize(0))) @@ -106,6 +121,7 @@ UINT _tx_thread_secure_mode_stack_initialize(void) UINT status; ULONG control; ULONG ipsr; +INT index; /* Make sure function is called from interrupt (threads should not call). */ asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */ @@ -119,12 +135,26 @@ ULONG ipsr; asm volatile("MRS %0, CONTROL" : "=r" (control)); /* Get CONTROL register. */ control |= 2; /* Use PSP. */ asm volatile("MSR CONTROL, %0" :: "r" (control)); /* Set CONTROL register. */ - + /* Set process stack pointer and stack limit to 0 to throw exception when a thread without a secure stack calls a secure function that tries to use secure stack. */ asm volatile("MSR PSPLIM, %0" :: "r" (0)); asm volatile("MSR PSP, %0" :: "r" (0)); - + + for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++) + { + + /* Check last index and mark next free to invalid index */ + if(index == (TX_MAX_SECURE_CONTEXTS - 1)) + { + tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + else + { + tx_thread_secure_context[index].tx_next_free_index = index + 1; + } + } + status = TX_SUCCESS; } return status; @@ -137,7 +167,7 @@ ULONG ipsr; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_allocate Cortex-M23/GNU */ -/* 6.1.3 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -160,9 +190,7 @@ ULONG ipsr; /* */ /* CALLS */ /* */ -/* calloc Compiler's calloc function */ /* malloc Compiler's malloc function */ -/* free Compiler's free() function */ /* */ /* CALLED BY */ /* */ @@ -179,20 +207,26 @@ ULONG ipsr; /* 12-31-2020 Scott Larson Modified comment(s), and */ /* fixed M23 GCC build, */ /* resulting in version 6.1.3 */ - +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* added */ +/* TX_INTERRUPT_SAVE_AREA, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; UCHAR *stack_mem; ULONG ipsr; ULONG psplim_ns; +INT secure_context_index; status = TX_SUCCESS; - + /* Make sure function is called from interrupt (threads should not call). */ asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */ if (ipsr == 0) @@ -203,23 +237,38 @@ ULONG psplim_ns; { status = TX_SIZE_ERROR; } - + /* Check if thread already has secure stack allocated. */ else if (thread_ptr -> tx_thread_secure_stack_context != 0) { status = TX_THREAD_ERROR; } - + else { - /* Allocate space for secure stack info. */ - info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO)); - - if(info_ptr != TX_NULL) + TX_DISABLE + + /* Allocate free index for secure stack info. */ + if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX) + { + secure_context_index = tx_head_free_index; + tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index; + tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + else + { + secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + + TX_RESTORE + + if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX) { + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* If stack info allocated, allocate a stack & seal. */ stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE); - + if(stack_mem != TX_NULL) { /* Secure stack has been allocated, save in the stack info struct. */ @@ -227,13 +276,13 @@ ULONG psplim_ns; info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size; info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start; info_ptr -> tx_thread_ptr = thread_ptr; - + /* Seal bottom of stack. */ *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE; - - /* Save info pointer in thread. */ - thread_ptr -> tx_thread_secure_stack_context = info_ptr; - + + /* Save secure context id (i.e non-zero base index) in thread. */ + thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1); + /* Check if this thread is running by looking at its stack start and PSPLIM_NS */ asm volatile("MRS %0, PSPLIM_NS" : "=r" (psplim_ns)); /* Get PSPLIM_NS register. */ if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == psplim_ns) @@ -243,21 +292,26 @@ ULONG psplim_ns; asm volatile("MSR PSP, %0" :: "r" ((ULONG)(info_ptr -> tx_thread_secure_stack_ptr))); } } - + else { + TX_DISABLE + /* Stack not allocated, free the info struct. */ - free(info_ptr); + tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index; + tx_head_free_index = secure_context_index; + TX_RESTORE + status = TX_NO_MEMORY; } } - + else { status = TX_NO_MEMORY; } } - + return(status); } @@ -268,7 +322,7 @@ ULONG psplim_ns; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_free Cortex-M23/GNU */ -/* 6.1.3 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -305,46 +359,67 @@ ULONG psplim_ns; /* 12-31-2020 Scott Larson Modified comment(s), and */ /* fixed M23 GCC build, */ /* resulting in version 6.1.3 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; ULONG ipsr; +INT secure_context_index; status = TX_SUCCESS; - - /* Pickup stack info from thread. */ - info_ptr = thread_ptr -> tx_thread_secure_stack_context; - + + /* Pickup stack info id from thread. */ + secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; + /* Make sure function is called from interrupt (threads should not call). */ asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */ if (ipsr == 0) { status = TX_CALLER_ERROR; } - - /* Check that this secure context is for this thread. */ - else if (info_ptr -> tx_thread_ptr != thread_ptr) + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) { status = TX_THREAD_ERROR; } - else { - - /* Free secure stack. */ - free(info_ptr -> tx_thread_secure_stack_limit); - - /* Free info struct. */ - free(info_ptr); - - /* Clear secure context from thread. */ - thread_ptr -> tx_thread_secure_stack_context = 0; + + /* Pickup stack info from static array of secure contexts. */ + info_ptr = &tx_thread_secure_context[secure_context_index]; + + /* Check that this secure context is for this thread. */ + if (info_ptr -> tx_thread_ptr != thread_ptr) + { + status = TX_THREAD_ERROR; + } + + else + { + + /* Free secure stack. */ + free(info_ptr -> tx_thread_secure_stack_limit); + + TX_DISABLE + + /* Free info struct. */ + tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index; + tx_head_free_index = secure_context_index; + TX_RESTORE + + /* Clear secure context from thread. */ + thread_ptr -> tx_thread_secure_stack_context = 0; + } } - + return(status); } @@ -355,7 +430,7 @@ ULONG ipsr; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_context_save Cortex-M23/GNU */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -392,6 +467,9 @@ ULONG ipsr; /* resulting in version 6.1.3 */ /* 06-02-2021 Scott Larson Fix stack pointer save, */ /* resulting in version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) @@ -400,6 +478,7 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr) TX_THREAD_SECURE_STACK_INFO *info_ptr; ULONG sp; ULONG ipsr; +INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; /* This function should be called from scheduler only. */ asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */ @@ -407,32 +486,38 @@ ULONG ipsr; { return; } - + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) + { + return; + } + /* Pickup the secure context pointer. */ - info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context); - + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* Check that this secure context is for this thread. */ if (info_ptr -> tx_thread_ptr != thread_ptr) { return; } - + /* Check that stack pointer is in range */ asm volatile("MRS %0, PSP" : "=r" (sp)); /* Get PSP register. */ - if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || + if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start)) { return; } - + /* Save stack pointer. */ info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp; - + /* Set process stack pointer and stack limit to 0 to throw exception when a thread without a secure stack calls a secure function that tries to use secure stack. */ asm volatile("MSR PSPLIM, %0" :: "r" (0)); asm volatile("MSR PSP, %0" :: "r" (0)); - + return; } @@ -443,7 +528,7 @@ ULONG ipsr; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_context_restore Cortex-M23/GNU */ -/* 6.1.3 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -478,6 +563,9 @@ ULONG ipsr; /* 12-31-2020 Scott Larson Modified comment(s), and */ /* fixed M23 GCC build, */ /* resulting in version 6.1.3 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) @@ -485,6 +573,7 @@ void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr) { TX_THREAD_SECURE_STACK_INFO *info_ptr; ULONG ipsr; +INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; /* This function should be called from scheduler only. */ asm volatile("MRS %0, IPSR" : "=r" (ipsr)); /* Get IPSR register. */ @@ -492,20 +581,26 @@ ULONG ipsr; { return; } - + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) + { + return; + } + /* Pickup the secure context pointer. */ - info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context); - + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* Check that this secure context is for this thread. */ if (info_ptr -> tx_thread_ptr != thread_ptr) { return; } - + /* Set stack pointer and limit. */ asm volatile("MSR PSPLIM, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_limit)); asm volatile("MSR PSP, %0" :: "r" ((ULONG)info_ptr -> tx_thread_secure_stack_ptr)); - + return; } diff --git a/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S index 2d8bb868..7efcef40 100644 --- a/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M23/GNU */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m23/iar/inc/tx_port.h b/ports/cortex_m23/iar/inc/tx_port.h index 73a54080..ba65d9be 100644 --- a/ports/cortex_m23/iar/inc/tx_port.h +++ b/ports/cortex_m23/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M23/IAR */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,6 +61,10 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -366,7 +370,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -433,7 +437,7 @@ __istate_t interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/IAR Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/IAR Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m23/iar/src/tx_misra.s b/ports/cortex_m23/iar/src/tx_misra.s index acb85cc9..11b2a1c7 100644 --- a/ports/cortex_m23/iar/src/tx_misra.s +++ b/ports/cortex_m23/iar/src/tx_misra.s @@ -96,6 +96,22 @@ PUBLIC _tx_misra_void_to_uchar_pointer_convert PUBLIC _tx_misra_void_to_ulong_pointer_convert PUBLIC _tx_misra_ipsr_get + PUBLIC _tx_misra_control_get + PUBLIC _tx_misra_control_set +#ifdef __ARMVFP__ + PUBLIC _tx_misra_fpccr_get + PUBLIC _tx_misra_vfp_touch +#endif + + PUBLIC _tx_misra_event_flags_group_not_used + PUBLIC _tx_misra_event_flags_set_notify_not_used + PUBLIC _tx_misra_queue_not_used + PUBLIC _tx_misra_queue_send_notify_not_used + PUBLIC _tx_misra_semaphore_not_used + PUBLIC _tx_misra_semaphore_put_notify_not_used + PUBLIC _tx_misra_thread_entry_exit_notify_not_used + PUBLIC _tx_misra_thread_not_used + PUBLIC _tx_version_id @@ -109,7 +125,7 @@ _tx_version_id: DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H - DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 30H + DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H DC8 6EH, 74H, 20H, 2AH, 0 @@ -133,7 +149,7 @@ _tx_misra_memset: MOVS R1,R0 MOVS R0,R4 BL __aeabi_memset - POP {R4,PC} ;; return + POP {R4,PC} // return /**************************************************************************/ /**************************************************************************/ @@ -147,7 +163,7 @@ _tx_misra_memset: THUMB _tx_misra_uchar_pointer_add: ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -163,7 +179,7 @@ _tx_misra_uchar_pointer_add: _tx_misra_uchar_pointer_sub: RSBS R1,R1,#+0 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -178,21 +194,97 @@ _tx_misra_uchar_pointer_sub: THUMB _tx_misra_uchar_pointer_dif: SUBS R0,R0,R1 - BX LR ;; return + BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_pointer_to_ulong_convert: - BX LR ;; return +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return /**************************************************************************/ @@ -206,8 +298,9 @@ _tx_misra_pointer_to_ulong_convert: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_ulong_pointer_add: - ADD R0,R0,R1, LSL #+2 - BX LR ;; return + LSLS R1,#2 + ADD R0,R0,R1 + BX LR // return /**************************************************************************/ @@ -221,10 +314,11 @@ _tx_misra_ulong_pointer_add: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_ulong_pointer_sub: - MVNS R2,#+3 - MULS R1,R2,R1 - ADD R0,R0,R1 - BX LR ;; return + MOVS R3,#3 + MVNS R2,R3 + MULS R1,R2,R1 + ADD R0,R0,R1 + BX LR // return /**************************************************************************/ @@ -240,21 +334,7 @@ _tx_misra_ulong_pointer_sub: _tx_misra_ulong_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -293,7 +373,7 @@ _tx_misra_message_copy: STR R3,[R0, #+0] STR R4,[R1, #+0] POP {R4,R5} - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -310,7 +390,7 @@ _tx_misra_message_copy: _tx_misra_timer_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -325,8 +405,9 @@ _tx_misra_timer_pointer_dif: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_timer_pointer_add: - ADD R0,R0,R1, LSL #+2 - BX LR ;; return + LSLS R1,#2 + ADD R0,R0,R1 + BX LR // return /**************************************************************************/ @@ -341,12 +422,9 @@ _tx_misra_timer_pointer_add: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR ;; return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -361,52 +439,54 @@ _tx_misra_user_timer_pointer_get: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_thread_stack_check: - PUSH {R3-R5,LR} - MOVS R4,R0 - MOVS R5,R1 - BL _tx_thread_interrupt_disable - CMP R4,#+0 - BEQ.N ??_tx_misra_thread_stack_check_0 - LDR R1,[R4, #+0] - LDR.N R2,??DataTable2 ;; 0x54485244 - CMP R1,R2 - BNE.N ??_tx_misra_thread_stack_check_0 - LDR R1,[R4, #+8] - LDR R2,[R5, #+0] - CMP R1,R2 - BCS.N ??_tx_misra_thread_stack_check_1 - LDR R1,[R4, #+8] - STR R1,[R5, #+0] + PUSH {R3-R5,LR} + MOVS R4,R0 + MOVS R5,R1 + BL _tx_thread_interrupt_disable + CMP R4,#0 + BEQ.N ??_tx_misra_thread_stack_check_0 + LDR R1,[R4] + LDR.N R2,??DataTable2 // 0x54485244 + CMP R1,R2 + BNE.N ??_tx_misra_thread_stack_check_0 + LDR R1,[R4, #8] + LDR R2,[R5] + CMP R1,R2 + BCS.N ??_tx_misra_thread_stack_check_1 + STR R1,[R5] ??_tx_misra_thread_stack_check_1: - LDR R1,[R4, #+12] - LDR R1,[R1, #+0] - CMP R1,#-269488145 - BNE.N ??_tx_misra_thread_stack_check_2 - LDR R1,[R4, #+16] - LDR R1,[R1, #+1] - CMP R1,#-269488145 - BNE.N ??_tx_misra_thread_stack_check_2 - LDR R1,[R5, #+0] - LDR R2,[R4, #+12] - CMP R1,R2 - BCS.N ??_tx_misra_thread_stack_check_3 + LDR R1,[R4, #12] + LDR R1,[R1] + LDR R6,=0xEFEFEFEF + CMP R1,R6 + BNE.N ??_tx_misra_thread_stack_check_2 + LDR R1,[R4, #16] + MOVS R7,#1 + LDR R1,[R1, R7] + CMP R1,R6 + BNE.N ??_tx_misra_thread_stack_check_2 + LDR R1,[R5] + LDR R2,[R4, #12] + CMP R1,R2 + BCS.N ??_tx_misra_thread_stack_check_3 ??_tx_misra_thread_stack_check_2: - BL _tx_thread_interrupt_restore - MOVS R0,R4 - BL _tx_thread_stack_error_handler - BL _tx_thread_interrupt_disable + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_error_handler + BL _tx_thread_interrupt_disable ??_tx_misra_thread_stack_check_3: - LDR R1,[R5, #+0] - LDR R1,[R1, #-4] - CMP R1,#-269488145 - BEQ.N ??_tx_misra_thread_stack_check_0 - BL _tx_thread_interrupt_restore - MOVS R0,R4 - BL _tx_thread_stack_analyze - BL _tx_thread_interrupt_disable + LDR R1,[R5] + LDR R7,=-4 + LDR R1,[R1, R7] + CMP R1,R6 + BEQ.N ??_tx_misra_thread_stack_check_0 + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_analyze + BL _tx_thread_interrupt_disable ??_tx_misra_thread_stack_check_0: - BL _tx_thread_interrupt_restore - POP {R0,R4,R5,PC} ;; return + BL _tx_thread_interrupt_restore + POP {R0,R4,R5,R6,R7,PC} // return #ifdef TX_ENABLE_EVENT_TRACE @@ -494,7 +574,7 @@ _tx_misra_trace_event_insert: LDR R0,[R0, #+0] STR R4,[R0, #+32] ??_tx_misra_trace_event_insert_0: - POP {R0,R4-R7,PC} ;; return + POP {R0,R4-R7,PC} // return SECTION `.text`:CODE:NOROOT(2) @@ -546,7 +626,7 @@ _tx_misra_trace_event_insert: THUMB _tx_misra_time_stamp_get: MOVS R0,#+0 - BX LR ;; return + BX LR // return #endif @@ -581,203 +661,7 @@ _tx_misra_time_stamp_get: THUMB _tx_misra_always_true: MOVS R0,#+1 - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_block_pool_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR ;; return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_event_flags_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_ulong_pointer_convert: - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_mutex_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -792,209 +676,89 @@ _tx_misra_void_to_mutex_pointer_convert: THUMB _tx_misra_status_get: MOVS R0,#+0 - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_queue_pointer_convert: - BX LR ;; return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_semaphore_pointer_convert: - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_void_pointer_convert: - BX LR ;; return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_thread_pointer_convert: - BX LR ;; return - + BX LR // return -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_const_char_to_char_pointer_convert: - BX LR ;; return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_thread_pointer_convert: - BX LR ;; return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_object_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_object_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_ipsr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_uchar_to_header_pointer_convert: - BX LR ;; return +_tx_misra_ipsr_get: + MRS R0, IPSR + BX LR // return /***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** ULONG _tx_misra_control_get(void); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_uchar_to_entry_pointer_convert: - BX LR ;; return - +_tx_misra_control_get: + MRS R0, CONTROL + BX LR // return + /***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** void _tx_misra_control_set(ULONG value); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_entry_to_uchar_pointer_convert: - BX LR ;; return -#endif +_tx_misra_control_set: + MSR CONTROL, R0 + BX LR // return + +#ifdef __ARMVFP__ /***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** ULONG _tx_misra_fpccr_get(void); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ - SECTION `.text`:CODE:NOROOT(1) + SECTION `.text`:CODE:NOROOT(2) THUMB -_tx_misra_char_to_uchar_pointer_convert: - BX LR ;; return - - -***********************************************************************************************/ +_tx_misra_fpccr_get: + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return + + +/***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** ULONG _tx_misra_ipsr_get(void); */ +/** void _tx_misra_vfp_touch(void); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_ipsr_get: - MRS R0, IPSR - BX LR ;; return - - +_tx_misra_vfp_touch: + vmov.f32 s0, s0 + BX LR // return + +#endif + + SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2) SECTION_TYPE SHT_PROGBITS, 0 DATA diff --git a/ports/cortex_m23/iar/src/tx_thread_secure_stack.c b/ports/cortex_m23/iar/src/tx_thread_secure_stack.c index 72e3af97..7cb0061e 100644 --- a/ports/cortex_m23/iar/src/tx_thread_secure_stack.c +++ b/ports/cortex_m23/iar/src/tx_thread_secure_stack.c @@ -23,7 +23,7 @@ #include "tx_api.h" -/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, +/* If TX_SINGLE_MODE_SECURE or TX_SINGLE_MODE_NON_SECURE is defined, no secure stack functionality is needed. */ #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) @@ -45,8 +45,14 @@ #define TX_THREAD_STACK_SEAL_SIZE 8 #define TX_THREAD_STACK_SEAL_VALUE 0xFEF5EDA5 -/* Secure stack info struct to hold stack start, stack limit, - current stack pointer, and pointer to owning thread. +/* max number of Secure context */ +#ifndef TX_MAX_SECURE_CONTEXTS +#define TX_MAX_SECURE_CONTEXTS 32 +#endif +#define TX_INVALID_SECURE_CONTEXT_IDX (-1) + +/* Secure stack info struct to hold stack start, stack limit, + current stack pointer, and pointer to owning thread. This will be allocated for each thread with a secure stack. */ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT { @@ -54,8 +60,14 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT VOID *tx_thread_secure_stack_start; /* Thread's secure stack start address */ VOID *tx_thread_secure_stack_limit; /* Thread's secure stack limit */ TX_THREAD *tx_thread_ptr; /* Keep track of thread for error handling */ + INT tx_next_free_index; /* Next free index of free secure context */ } TX_THREAD_SECURE_STACK_INFO; +/* Static secure contexts */ +static TX_THREAD_SECURE_STACK_INFO tx_thread_secure_context[TX_MAX_SECURE_CONTEXTS]; +/* Head of free secure context */ +static INT tx_head_free_index = 0U; + /**************************************************************************/ @@ -63,7 +75,7 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_initialize Cortex-M23/IAR */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -102,12 +114,16 @@ typedef struct TX_THREAD_SECURE_STACK_INFO_STRUCT /* name, execute in handler */ /* mode, disable optimization, */ /* resulting in version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_initialize(void) { UINT status; +INT index; /* Make sure function is called from interrupt (threads should not call). */ if (__get_IPSR() == 0) @@ -118,12 +134,26 @@ UINT status; { /* Set secure mode to use PSP. */ __set_CONTROL(__get_CONTROL() | 2); - + /* Set process stack pointer and stack limit to 0 to throw exception when a thread without a secure stack calls a secure function that tries to use secure stack. */ __set_PSPLIM(0); __set_PSP(0); - + + for (index = 0; index < TX_MAX_SECURE_CONTEXTS; index++) + { + + /* Check last index and mark next free to invalid index */ + if(index == (TX_MAX_SECURE_CONTEXTS - 1)) + { + tx_thread_secure_context[index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + else + { + tx_thread_secure_context[index].tx_next_free_index = index + 1; + } + } + status = TX_SUCCESS; } return status; @@ -136,7 +166,7 @@ UINT status; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_allocate Cortex-M23/IAR */ -/* 6.1.1 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -160,9 +190,7 @@ UINT status; /* CALLS */ /* */ /* __get_IPSR Intrinsic to get IPSR */ -/* calloc Compiler's calloc function */ /* malloc Compiler's malloc function */ -/* free Compiler's free() function */ /* __set_PSPLIM Intrinsic to set PSP limit */ /* __set_PSP Intrinsic to set PSP */ /* __TZ_get_PSPLIM_NS Intrinsic to get NS PSP */ @@ -179,18 +207,24 @@ UINT status; /* 10-16-2020 Scott Larson Modified comment(s), */ /* added stack sealing, */ /* resulting in version 6.1.1 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* added */ +/* TX_INTERRUPT_SAVE_AREA, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; UCHAR *stack_mem; -ULONG sp; +INT secure_context_index; status = TX_SUCCESS; - + /* Make sure function is called from interrupt (threads should not call). */ if (__get_IPSR() == 0) { @@ -200,23 +234,38 @@ ULONG sp; { status = TX_SIZE_ERROR; } - + /* Check if thread already has secure stack allocated. */ else if (thread_ptr -> tx_thread_secure_stack_context != 0) { status = TX_THREAD_ERROR; } - + else { - /* Allocate space for secure stack info. */ - info_ptr = calloc(1, sizeof(TX_THREAD_SECURE_STACK_INFO)); - - if(info_ptr != TX_NULL) + TX_DISABLE + + /* Allocate free index for secure stack info. */ + if(tx_head_free_index != TX_INVALID_SECURE_CONTEXT_IDX) + { + secure_context_index = tx_head_free_index; + tx_head_free_index = tx_thread_secure_context[tx_head_free_index].tx_next_free_index; + tx_thread_secure_context[secure_context_index].tx_next_free_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + else + { + secure_context_index = TX_INVALID_SECURE_CONTEXT_IDX; + } + + TX_RESTORE + + if(secure_context_index != TX_INVALID_SECURE_CONTEXT_IDX) { + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* If stack info allocated, allocate a stack & seal. */ stack_mem = malloc(stack_size + TX_THREAD_STACK_SEAL_SIZE); - + if(stack_mem != TX_NULL) { /* Secure stack has been allocated, save in the stack info struct. */ @@ -224,38 +273,41 @@ ULONG sp; info_ptr -> tx_thread_secure_stack_start = stack_mem + stack_size; info_ptr -> tx_thread_secure_stack_ptr = info_ptr -> tx_thread_secure_stack_start; info_ptr -> tx_thread_ptr = thread_ptr; - + /* Seal bottom of stack. */ *(ULONG*)info_ptr -> tx_thread_secure_stack_start = TX_THREAD_STACK_SEAL_VALUE; - - /* Save info pointer in thread. */ - thread_ptr -> tx_thread_secure_stack_context = info_ptr; - - /* Check if this thread is running by looking at PSP_NS and seeing if it is within - the stack_start and stack_end range. */ - sp = __TZ_get_PSP_NS(); - if(sp > ((ULONG) thread_ptr -> tx_thread_stack_start) && sp < ((ULONG) thread_ptr -> tx_thread_stack_end)) + + /* Save secure context id (i.e non-zero base index) in thread. */ + thread_ptr -> tx_thread_secure_stack_context = (VOID *)(secure_context_index + 1); + + /* Check if this thread is running by looking at its stack start and PSPLIM_NS */ + if(((ULONG) thread_ptr -> tx_thread_stack_start & 0xFFFFFFF8) == __TZ_get_PSPLIM_NS()) { /* If this thread is running, set Secure PSP and PSPLIM. */ __set_PSPLIM((ULONG)(info_ptr -> tx_thread_secure_stack_limit)); __set_PSP((ULONG)(info_ptr -> tx_thread_secure_stack_ptr)); } } - + else { + TX_DISABLE + /* Stack not allocated, free the info struct. */ - free(info_ptr); + tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index; + tx_head_free_index = secure_context_index; + TX_RESTORE + status = TX_NO_MEMORY; } } - + else { status = TX_NO_MEMORY; } } - + return(status); } @@ -266,7 +318,7 @@ ULONG sp; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_free Cortex-M23/IAR */ -/* 6.1.1 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -301,44 +353,67 @@ ULONG sp; /* 09-30-2020 Scott Larson Initial Version 6.1 */ /* 10-16-2020 Scott Larson Modified comment(s), */ /* resulting in version 6.1.1 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* added */ +/* TX_INTERRUPT_SAVE_AREA, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; +INT secure_context_index; status = TX_SUCCESS; - - /* Pickup stack info from thread. */ - info_ptr = thread_ptr -> tx_thread_secure_stack_context; - + + /* Pickup stack info id from thread. */ + secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; + /* Make sure function is called from interrupt (threads should not call). */ if (__get_IPSR() == 0) { status = TX_CALLER_ERROR; } - - /* Check that this secure context is for this thread. */ - else if (info_ptr -> tx_thread_ptr != thread_ptr) + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) { status = TX_THREAD_ERROR; } - else { - - /* Free secure stack. */ - free(info_ptr -> tx_thread_secure_stack_limit); - - /* Free info struct. */ - free(info_ptr); - - /* Clear secure context from thread. */ - thread_ptr -> tx_thread_secure_stack_context = 0; + + /* Pickup stack info from static array of secure contexts. */ + info_ptr = &tx_thread_secure_context[secure_context_index]; + + /* Check that this secure context is for this thread. */ + if (info_ptr -> tx_thread_ptr != thread_ptr) + { + status = TX_THREAD_ERROR; + } + + else + { + + /* Free secure stack. */ + free(info_ptr -> tx_thread_secure_stack_limit); + + TX_DISABLE + + /* Free info struct. */ + tx_thread_secure_context[secure_context_index].tx_next_free_index = tx_head_free_index; + tx_head_free_index = secure_context_index; + TX_RESTORE + + /* Clear secure context from thread. */ + thread_ptr -> tx_thread_secure_stack_context = 0; + } } - + return(status); } @@ -349,7 +424,7 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_context_save Cortex-M23/IAR */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -386,6 +461,9 @@ TX_THREAD_SECURE_STACK_INFO *info_ptr; /* resulting in version 6.1.1 */ /* 06-02-2021 Scott Larson Fix stack pointer save, */ /* resulting in version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) @@ -393,38 +471,45 @@ void _tx_thread_secure_stack_context_save(TX_THREAD *thread_ptr) { TX_THREAD_SECURE_STACK_INFO *info_ptr; ULONG sp; +INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; /* This function should be called from scheduler only. */ if (__get_IPSR() == 0) { return; } - + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) + { + return; + } + /* Pickup the secure context pointer. */ - info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context); - + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* Check that this secure context is for this thread. */ if (info_ptr -> tx_thread_ptr != thread_ptr) { return; } - + /* Check that stack pointer is in range */ sp = __get_PSP(); - if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || + if ((sp < (ULONG)info_ptr -> tx_thread_secure_stack_limit) || (sp > (ULONG)info_ptr -> tx_thread_secure_stack_start)) { return; } - + /* Save stack pointer. */ info_ptr -> tx_thread_secure_stack_ptr = (VOID *) sp; - + /* Set process stack pointer and stack limit to 0 to throw exception when a thread without a secure stack calls a secure function that tries to use secure stack. */ __set_PSPLIM(0); __set_PSP(0); - + return; } @@ -435,7 +520,7 @@ ULONG sp; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_context_restore Cortex-M23/IAR */ -/* 6.1.1 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -469,32 +554,42 @@ ULONG sp; /* 09-30-2020 Scott Larson Initial Version 6.1 */ /* 10-16-2020 Scott Larson Modified comment(s), */ /* resulting in version 6.1.1 */ +/* 07-29-2022 Scott Larson Modified comments, updated */ +/* secure stack allocation, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) void _tx_thread_secure_stack_context_restore(TX_THREAD *thread_ptr) { TX_THREAD_SECURE_STACK_INFO *info_ptr; +INT secure_context_index = (INT)thread_ptr -> tx_thread_secure_stack_context - 1; /* This function should be called from scheduler only. */ if (__get_IPSR() == 0) { return; } - + + /* Check if secure context index is in valid range. */ + else if (secure_context_index < 0 || secure_context_index >= TX_MAX_SECURE_CONTEXTS) + { + return; + } + /* Pickup the secure context pointer. */ - info_ptr = (TX_THREAD_SECURE_STACK_INFO *)(thread_ptr -> tx_thread_secure_stack_context); - + info_ptr = &tx_thread_secure_context[secure_context_index]; + /* Check that this secure context is for this thread. */ if (info_ptr -> tx_thread_ptr != thread_ptr) { return; } - + /* Set stack pointer and limit. */ __set_PSPLIM((ULONG)info_ptr -> tx_thread_secure_stack_limit); __set_PSP ((ULONG)info_ptr -> tx_thread_secure_stack_ptr); - + return; } diff --git a/ports/cortex_m23/iar/src/tx_thread_secure_stack_initialize.s b/ports/cortex_m23/iar/src/tx_thread_secure_stack_initialize.s index 092ed49c..26ec4fb5 100644 --- a/ports/cortex_m23/iar/src/tx_thread_secure_stack_initialize.s +++ b/ports/cortex_m23/iar/src/tx_thread_secure_stack_initialize.s @@ -27,7 +27,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M23/IAR */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -50,13 +50,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m3/ac5/inc/tx_port.h b/ports/cortex_m3/ac5/inc/tx_port.h index e29c80c8..b446fc83 100644 --- a/ports/cortex_m3/ac5/inc/tx_port.h +++ b/ports/cortex_m3/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/AC5 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC5 Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC5 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m3/ac6/inc/tx_port.h b/ports/cortex_m3/ac6/inc/tx_port.h index eedf0164..ebbe5133 100644 --- a/ports/cortex_m3/ac6/inc/tx_port.h +++ b/ports/cortex_m3/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/AC6 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC6 Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC6 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m3/ac6/src/tx_misra.S b/ports/cortex_m3/ac6/src/tx_misra.S index b03fdcd0..155512be 100644 --- a/ports/cortex_m3/ac6/src/tx_misra.S +++ b/ports/cortex_m3/ac6/src/tx_misra.S @@ -103,6 +103,14 @@ .global _tx_misra_vfp_touch #endif + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used /**************************************************************************/ /**************************************************************************/ @@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif: BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ .text .thumb_func _tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + BX LR // return @@ -237,20 +321,6 @@ _tx_misra_ulong_pointer_dif: /**************************************************************************/ /**************************************************************************/ /** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ /** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ /** UINT size); */ /** */ @@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add: .text .thumb_func _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR // return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -553,202 +620,6 @@ _tx_misra_always_true: BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR // return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - .text - .thumb_func -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_block_pool_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR // return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_event_flags_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_ulong_pointer_convert: - BX LR // return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_mutex_pointer_convert: - BX LR // return - - /**************************************************************************/ /**************************************************************************/ /** */ @@ -764,191 +635,6 @@ _tx_misra_status_get: BX LR // return -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_queue_pointer_convert: - BX LR // return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_semaphore_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_void_pointer_convert: - BX LR // return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_thread_pointer_convert: - BX LR // return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - .text - .thumb_func -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_const_char_to_char_pointer_convert: - BX LR // return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_thread_pointer_convert: - BX LR // return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_object_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_object_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_header_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_entry_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_entry_to_uchar_pointer_convert: - BX LR // return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_char_to_uchar_pointer_convert: - BX LR // return - - /***********************************************************************************************/ /***********************************************************************************************/ /** */ diff --git a/ports/cortex_m3/gnu/example_build/build_threadx.bat b/ports/cortex_m3/gnu/example_build/build_threadx.bat index 79f240b0..de39b850 100644 --- a/ports/cortex_m3/gnu/example_build/build_threadx.bat +++ b/ports/cortex_m3/gnu/example_build/build_threadx.bat @@ -1,5 +1,4 @@ del tx.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_initialize_low_level.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_stack_build.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_schedule.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_system_return.S @@ -7,7 +6,7 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_context_save.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_context_restore.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_interrupt_control.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_timer_interrupt.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb ../src/tx_thread_interrupt_control.S + arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c @@ -192,8 +191,8 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../in arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c + arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o -arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o diff --git a/ports/cortex_m3/gnu/example_build/build_threadx_sample.bat b/ports/cortex_m3/gnu/example_build/build_threadx_sample.bat index cc93371f..5b060df8 100644 --- a/ports/cortex_m3/gnu/example_build/build_threadx_sample.bat +++ b/ports/cortex_m3/gnu/example_build/build_threadx_sample.bat @@ -1,7 +1,5 @@ -arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_simulator_startup.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb cortexm3_vectors.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb cortexm3_crt0.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb tx_initialize_low_level.S arm-none-eabi-gcc -c -g -mcpu=cortex-m3 -mthumb -I../../../../common/inc -I../inc sample_threadx.c -arm-none-eabi-ld -A cortex-m3 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm3_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libc.a -o sample_threadx.out -M > sample_threadx.map - - +arm-none-eabi-gcc -g -mcpu=cortex-m3 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm3_vectors.o cortexm3_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a diff --git a/ports/cortex_m4/gnu/example_build/cortexm4_crt0.s b/ports/cortex_m3/gnu/example_build/cortexm3_crt0.S index d4cb1636..4228fc11 100644 --- a/ports/cortex_m4/gnu/example_build/cortexm4_crt0.s +++ b/ports/cortex_m3/gnu/example_build/cortexm3_crt0.S @@ -1,45 +1,20 @@ - .global _start - .extern main - - + .syntax unified .section .init, "ax" .code 16 .align 2 .thumb_func - + .global _start _start: CPSID i ldr r1, =__stack_end__ mov sp, r1 - /* Copy initialised sections into RAM if required. */ ldr r0, =__data_load_start__ ldr r1, =__data_start__ ldr r2, =__data_end__ bl crt0_memory_copy - ldr r0, =__text_load_start__ - ldr r1, =__text_start__ - ldr r2, =__text_end__ - bl crt0_memory_copy - ldr r0, =__fast_load_start__ - ldr r1, =__fast_start__ - ldr r2, =__fast_end__ - bl crt0_memory_copy - ldr r0, =__ctors_load_start__ - ldr r1, =__ctors_start__ - ldr r2, =__ctors_end__ - bl crt0_memory_copy - ldr r0, =__dtors_load_start__ - ldr r1, =__dtors_start__ - ldr r2, =__dtors_end__ - bl crt0_memory_copy - ldr r0, =__rodata_load_start__ - ldr r1, =__rodata_start__ - ldr r2, =__rodata_end__ - bl crt0_memory_copy - /* Zero bss. */ ldr r0, =__bss_start__ @@ -47,7 +22,6 @@ _start: mov r2, #0 bl crt0_memory_set - /* Setup heap - not recommended for Threadx but here for compatibility reasons */ ldr r0, = __heap_start__ ldr r1, = __heap_end__ @@ -57,7 +31,6 @@ _start: add r0, r0, #4 str r1, [r0] - /* constructors in case of using C++ */ ldr r0, =__ctors_start__ ldr r1, =__ctors_end__ @@ -72,13 +45,11 @@ crt0_ctor_loop: b crt0_ctor_loop crt0_ctor_end: - /* Setup call frame for main() */ mov r0, #0 mov lr, r0 mov r12, sp - start: /* Jump to main() */ mov r0, #0 @@ -88,28 +59,22 @@ start: /* when main returns, loop forever. */ crt0_exit_loop: b crt0_exit_loop - - /* Startup helper functions. */ - crt0_memory_copy: cmp r0, r1 beq memory_copy_done - sub r2, r2, r1 - beq memory_copy_done memory_copy_loop: ldrb r3, [r0] add r0, r0, #1 strb r3, [r1] add r1, r1, #1 - sub r2, r2, #1 + cmp r1, r2 bne memory_copy_loop memory_copy_done: bx lr - crt0_memory_set: cmp r0, r1 beq memory_set_done @@ -119,7 +84,6 @@ crt0_memory_set: memory_set_done: bx lr - /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ .section .stack, "wa", %nobits .section .stack_process, "wa", %nobits diff --git a/ports/cortex_m7/gnu/example_build/tx_simulator_startup.s b/ports/cortex_m3/gnu/example_build/cortexm3_vectors.S index cf0db974..6ae558e4 100644 --- a/ports/cortex_m7/gnu/example_build/tx_simulator_startup.s +++ b/ports/cortex_m3/gnu/example_build/cortexm3_vectors.S @@ -1,5 +1,3 @@ - - .global reset_handler .global __tx_NMIHandler @@ -10,7 +8,6 @@ .global __tx_SysTickHandler .global __tx_BadHandler - .syntax unified .section .vectors, "ax" .code 16 @@ -29,7 +26,7 @@ _vectors: .word 0 // Reserved .word 0 // Reserved .word 0 // Reserved - .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // + .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // .word __tx_DBGHandler .word 0 // Reserved .word __tx_PendSVHandler @@ -70,14 +67,10 @@ _vectors: .word __tx_BadHandler .word __tx_BadHandler - - - .section .init, "ax" - .thumb_func + .section .init, "ax" + .thumb_func reset_handler: - -// low level hardware config, such as PLL setup goes here - + // low level hardware config, such as PLL setup goes here b _start diff --git a/ports/cortex_m3/gnu/example_build/sample_threadx.ld b/ports/cortex_m3/gnu/example_build/sample_threadx.ld index 28f203fd..c65a1346 100644 --- a/ports/cortex_m3/gnu/example_build/sample_threadx.ld +++ b/ports/cortex_m3/gnu/example_build/sample_threadx.ld @@ -1,206 +1,125 @@ MEMORY { - UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0 - CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000 - AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000 - APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000 - APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000 - GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000 - AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000 - AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000 - RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000 - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000 } +__STACKSIZE__ = 1024; +__STACKSIZE_PROCESS__ = 0; +__HEAPSIZE__ = 128; SECTIONS { - __CM3_System_Control_Space_segment_start__ = 0xe000e000; - __CM3_System_Control_Space_segment_end__ = 0xe000f000; - __AHB_Peripherals_segment_start__ = 0x50000000; - __AHB_Peripherals_segment_end__ = 0x50200000; - __APB1_Peripherals_segment_start__ = 0x40080000; - __APB1_Peripherals_segment_end__ = 0x40100000; - __APB0_Peripherals_segment_start__ = 0x40000000; - __APB0_Peripherals_segment_end__ = 0x40080000; - __GPIO_segment_start__ = 0x2009c000; - __GPIO_segment_end__ = 0x200a0000; - __AHBSRAM1_segment_start__ = 0x20080000; - __AHBSRAM1_segment_end__ = 0x20084000; - __AHBSRAM0_segment_start__ = 0x2007c000; - __AHBSRAM0_segment_end__ = 0x20080000; - __RAM_segment_start__ = 0x10000000; - __RAM_segment_end__ = 0x10008000; - __FLASH_segment_start__ = 0x00000000; - __FLASH_segment_end__ = 0x00080000; - - __STACKSIZE__ = 1024; - __STACKSIZE_PROCESS__ = 0; - __STACKSIZE_IRQ__ = 0; - __STACKSIZE_FIQ__ = 0; - __STACKSIZE_SVC__ = 0; - __STACKSIZE_ABT__ = 0; - __STACKSIZE_UND__ = 0; - __HEAPSIZE__ = 128; - - __vectors_load_start__ = __FLASH_segment_start__; - .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__) - { - __vectors_start__ = .; - *(.vectors .vectors.*) - } - __vectors_end__ = __vectors_start__ + SIZEOF(.vectors); - - . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment"); - - __init_load_start__ = ALIGN(__vectors_end__ , 4); - .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4)) - { - __init_start__ = .; - *(.init .init.*) - } - __init_end__ = __init_start__ + SIZEOF(.init); - - . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment"); - - __text_load_start__ = ALIGN(__init_end__ , 4); - .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4)) + .vectors : { - __text_start__ = .; - *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table) - } - __text_end__ = __text_start__ + SIZEOF(.text); - - . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment"); - - __dtors_load_start__ = ALIGN(__text_end__ , 4); - .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4)) - { - __dtors_start__ = .; - KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } - __dtors_end__ = __dtors_start__ + SIZEOF(.dtors); - - . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment"); - - __ctors_load_start__ = ALIGN(__dtors_end__ , 4); - .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4)) - { - __ctors_start__ = .; - KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } - __ctors_end__ = __ctors_start__ + SIZEOF(.ctors); - - . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment"); + KEEP(*(.vectors .vectors.*)) + } > FLASH - __rodata_load_start__ = ALIGN(__ctors_end__ , 4); - .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4)) - { - __rodata_start__ = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - } - __rodata_end__ = __rodata_start__ + SIZEOF(.rodata); + .text : + { + *(.text*) - . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment"); + KEEP(*(.init)) + KEEP(*(.fini)) - __fast_load_start__ = ALIGN(__rodata_end__ , 4); - .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4)) - { - __fast_start__ = .; - *(.fast .fast.*) - } - __fast_end__ = __fast_start__ + SIZEOF(.fast); + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + __ctors_start__ = ALIGN(4); + *(SORT(.ctors.*)) + *(.ctors) + __ctors_end__ = ALIGN(4); - __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast); + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + __dtors_start__ = ALIGN(4); + *(SORT(.dtors.*)) + *(.dtors) + __dtors_end__ = ALIGN(4); - . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment"); + *(.rodata*) - .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) : - { - __fast_run_start__ = .; - . = MAX(__fast_run_start__ + SIZEOF(.fast), .); - } - __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run); + KEEP(*(.eh_frame*)) + } > FLASH - . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment"); + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH - __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4); - .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4)) - { - __data_start__ = .; - *(.data .data.* .gnu.linkonce.d.*) - } - __data_end__ = __data_start__ + SIZEOF(.data); + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; - __data_load_end__ = __data_load_start__ + SIZEOF(.data); + __data_load_start__ = ALIGN (4); - __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data); + .data : AT (__data_load_start__) + { + __data_start__ = .; - . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment"); + *(vtable) + *(.data*) - .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) : - { - __data_run_start__ = .; - . = MAX(__data_run_start__ + SIZEOF(.data), .); - } - __data_run_end__ = __data_run_start__ + SIZEOF(.data_run); + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); - . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment"); + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); - __bss_load_start__ = ALIGN(__data_run_end__ , 4); - .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4)) - { - __bss_start__ = .; - *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) - } - __bss_end__ = __bss_start__ + SIZEOF(.bss); + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); - . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment"); + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + + __data_end__ = .; - __non_init_load_start__ = ALIGN(__bss_end__ , 4); - .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4)) - { - __non_init_start__ = .; - *(.non_init .non_init.*) - } - __non_init_end__ = __non_init_start__ + SIZEOF(.non_init); + } > RAM - . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment"); + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; - __heap_load_start__ = ALIGN(__non_init_end__ , 4); - .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4)) - { - __heap_start__ = .; + } > RAM + + .heap (COPY): + { + __heap_start__ = ALIGN(4); *(.heap) - . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4); - } - __heap_end__ = __heap_start__ + SIZEOF(.heap); + . = ALIGN(. + __HEAPSIZE__, 4); + __heap_end__ = ALIGN(4); + } > RAM - . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment"); - - __stack_load_start__ = ALIGN(__heap_end__ , 4); - .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4)) + .stack ALIGN(4) (NOLOAD) : { - __stack_start__ = .; + __stack_start__ = ALIGN(4); *(.stack) - . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4); - } - __stack_end__ = __stack_start__ + SIZEOF(.stack); - - . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment"); - - __stack_process_load_start__ = ALIGN(__stack_end__ , 4); - .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4)) - { - __stack_process_start__ = .; - *(.stack_process) - . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4); - } - __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process); - - __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process); - - . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment"); + . = ALIGN(. + __STACKSIZE__, 4); + __stack_end__ = ALIGN(4); + } > RAM + __RAM_segment_used_end__ = .; } - diff --git a/ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S b/ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S index e9e90aca..14a85b89 100644 --- a/ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S +++ b/ports/cortex_m3/gnu/example_build/tx_initialize_low_level.S @@ -1,226 +1,201 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Initialize */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ -@ -@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Initialize */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .global _tx_thread_system_stack_ptr .global _tx_initialize_unused_memory .global __RAM_segment_used_end__ .global _tx_timer_interrupt .global __main - .global __tx_SVCallHandler - .global __tx_PendSVHandler .global _vectors - .global __tx_NMIHandler @ NMI - .global __tx_BadHandler @ HardFault - .global __tx_SVCallHandler @ SVCall - .global __tx_DBGHandler @ Monitor - .global __tx_PendSVHandler @ PendSV - .global __tx_SysTickHandler @ SysTick - .global __tx_IntHandler @ Int 0 -@ -@ + .global __tx_NMIHandler // NMI + .global __tx_BadHandler // HardFault + .global __tx_SVCallHandler // SVCall + .global __tx_DBGHandler // Monitor + .global __tx_PendSVHandler // PendSV + .global __tx_SysTickHandler // SysTick + .global __tx_IntHandler // Int 0 + SYSTEM_CLOCK = 6000000 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) .text 32 .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_initialize_low_level Cortex-M3/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function is responsible for any low-level processor */ -@/* initialization, including setting up interrupt vectors, setting */ -@/* up a periodic timer interrupt source, saving the system stack */ -@/* pointer for use in ISR processing later, and finding the first */ -@/* available RAM memory address for tx_application_define. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* _tx_initialize_kernel_enter ThreadX entry function */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 05-19-2020 William E. Lamie Initial Version 6.0 */ -@/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */ -@/* GNU assembly comment, clean */ -@/* up whitespace, resulting */ -@/* in version 6.1 */ -@/* */ -@/**************************************************************************/ -@VOID _tx_initialize_low_level(VOID) -@{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-M3/GNU */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 William E. Lamie Initial Version 6.0 */ +/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */ +/* GNU assembly comment, clean */ +/* up whitespace, resulting */ +/* in version 6.1 */ +/* */ +/**************************************************************************/ +// VOID _tx_initialize_low_level(VOID) +// { .global _tx_initialize_low_level .thumb_func _tx_initialize_low_level: -@ -@ /* Disable interrupts during ThreadX initialization. */ -@ + + /* Disable interrupts during ThreadX initialization. */ CPSID i -@ -@ /* Set base of available memory to end of non-initialised RAM area. */ -@ - LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer - LDR r1, =__RAM_segment_used_end__ @ Build first free address - ADD r1, r1, #4 @ - STR r1, [r0] @ Setup first unused memory pointer -@ -@ /* Setup Vector Table Offset Register. */ -@ - MOV r0, #0xE000E000 @ Build address of NVIC registers - LDR r1, =_vectors @ Pickup address of vector table - STR r1, [r0, #0xD08] @ Set vector table address -@ -@ /* Set system stack pointer from vector value. */ -@ - LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer - LDR r1, =_vectors @ Pickup address of vector table - LDR r1, [r1] @ Pickup reset stack pointer - STR r1, [r0] @ Save system stack pointer -@ -@ /* Enable the cycle count register. */ -@ - LDR r0, =0xE0001000 @ Build address of DWT register - LDR r1, [r0] @ Pickup the current value - ORR r1, r1, #1 @ Set the CYCCNTENA bit - STR r1, [r0] @ Enable the cycle count register -@ -@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ -@ - MOV r0, #0xE000E000 @ Build address of NVIC registers + + /* Set base of available memory to end of non-initialised RAM area. */ + LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer + LDR r1, =__RAM_segment_used_end__ // Build first free address + ADD r1, r1, #4 // + STR r1, [r0] // Setup first unused memory pointer + + /* Setup Vector Table Offset Register. */ + MOV r0, #0xE000E000 // Build address of NVIC registers + LDR r1, =_vectors // Pickup address of vector table + STR r1, [r0, #0xD08] // Set vector table address + + /* Set system stack pointer from vector value. */ + LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer + LDR r1, =_vectors // Pickup address of vector table + LDR r1, [r1] // Pickup reset stack pointer + STR r1, [r0] // Save system stack pointer + + /* Enable the cycle count register. */ + LDR r0, =0xE0001000 // Build address of DWT register + LDR r1, [r0] // Pickup the current value + ORR r1, r1, #1 // Set the CYCCNTENA bit + STR r1, [r0] // Enable the cycle count register + + /* Configure SysTick. */ + MOV r0, #0xE000E000 // Build address of NVIC registers LDR r1, =SYSTICK_CYCLES - STR r1, [r0, #0x14] @ Setup SysTick Reload Value - MOV r1, #0x7 @ Build SysTick Control Enable Value - STR r1, [r0, #0x10] @ Setup SysTick Control -@ -@ /* Configure handler priorities. */ -@ - LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM - STR r1, [r0, #0xD18] @ Setup System Handlers 4-7 Priority Registers + STR r1, [r0, #0x14] // Setup SysTick Reload Value + MOV r1, #0x7 // Build SysTick Control Enable Value + STR r1, [r0, #0x10] // Setup SysTick Control - LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv - STR r1, [r0, #0xD1C] @ Setup System Handlers 8-11 Priority Registers - @ Note: SVC must be lowest priority, which is 0xFF + /* Configure handler priorities. */ + LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM + STR r1, [r0, #0xD18] // Setup System Handlers 4-7 Priority Registers + LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv + STR r1, [r0, #0xD1C] // Setup System Handlers 8-11 Priority Registers + // Note: SVC must be lowest priority, which is 0xFF + LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM + STR r1, [r0, #0xD20] // Setup System Handlers 12-15 Priority Registers + // Note: PnSV must be lowest priority, which is 0xFF - LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM - STR r1, [r0, #0xD20] @ Setup System Handlers 12-15 Priority Registers - @ Note: PnSV must be lowest priority, which is 0xFF -@ -@ /* Return to caller. */ -@ + /* Return to caller. */ BX lr -@} -@ +// } -@/* Define shells for each of the unused vectors. */ -@ +/* Define shells for each of the unused vectors. */ .global __tx_BadHandler .thumb_func __tx_BadHandler: B __tx_BadHandler -@ /* added to catch the hardfault */ - +/* added to catch the hardfault */ .global __tx_HardfaultHandler .thumb_func __tx_HardfaultHandler: B __tx_HardfaultHandler - -@ /* added to catch the SVC */ - +/* added to catch the SVC */ .global __tx_SVCallHandler .thumb_func __tx_SVCallHandler: B __tx_SVCallHandler - -@ /* Generic interrupt handler template */ +/* Generic interrupt handler template */ .global __tx_IntHandler .thumb_func __tx_IntHandler: -@ VOID InterruptHandler (VOID) -@ { +// VOID InterruptHandler (VOID) +// { PUSH {r0, lr} #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_enter @ Call the ISR enter function + BL _tx_execution_isr_enter // Call the ISR enter function #endif - -@ /* Do interrupt handler work here */ -@ /* BL <your C Function>.... */ - + /* Do interrupt handler work here */ + /* BL <your C Function>.... */ #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_exit @ Call the ISR exit function + BL _tx_execution_isr_exit // Call the ISR exit function #endif POP {r0, lr} BX LR -@ } +// } -@ /* System Tick timer interrupt handler */ +/* System Tick timer interrupt handler */ .global __tx_SysTickHandler .global SysTick_Handler .thumb_func __tx_SysTickHandler: .thumb_func SysTick_Handler: -@ VOID TimerInterruptHandler (VOID) -@ { -@ +// VOID SysTick_Handler (VOID) +// { PUSH {r0, lr} #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_enter @ Call the ISR enter function + BL _tx_execution_isr_enter // Call the ISR enter function #endif BL _tx_timer_interrupt #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_exit @ Call the ISR exit function + BL _tx_execution_isr_exit // Call the ISR exit function #endif POP {r0, lr} - BX LR -@ } - + BX lr +// } -@ /* NMI, DBG handlers */ +/* NMI, DBG handlers */ .global __tx_NMIHandler .thumb_func __tx_NMIHandler: diff --git a/ports/cortex_m3/gnu/inc/tx_port.h b/ports/cortex_m3/gnu/inc/tx_port.h index 54a16b80..7d94c5d5 100644 --- a/ports/cortex_m3/gnu/inc/tx_port.h +++ b/ports/cortex_m3/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/GNU */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/GNU Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m3/gnu/src/tx_misra.S b/ports/cortex_m3/gnu/src/tx_misra.S index b03fdcd0..155512be 100644 --- a/ports/cortex_m3/gnu/src/tx_misra.S +++ b/ports/cortex_m3/gnu/src/tx_misra.S @@ -103,6 +103,14 @@ .global _tx_misra_vfp_touch #endif + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used /**************************************************************************/ /**************************************************************************/ @@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif: BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ .text .thumb_func _tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + BX LR // return @@ -237,20 +321,6 @@ _tx_misra_ulong_pointer_dif: /**************************************************************************/ /**************************************************************************/ /** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ /** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ /** UINT size); */ /** */ @@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add: .text .thumb_func _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR // return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -553,202 +620,6 @@ _tx_misra_always_true: BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR // return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - .text - .thumb_func -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_block_pool_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR // return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_event_flags_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_ulong_pointer_convert: - BX LR // return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_mutex_pointer_convert: - BX LR // return - - /**************************************************************************/ /**************************************************************************/ /** */ @@ -764,191 +635,6 @@ _tx_misra_status_get: BX LR // return -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_queue_pointer_convert: - BX LR // return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_semaphore_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_void_pointer_convert: - BX LR // return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_thread_pointer_convert: - BX LR // return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - .text - .thumb_func -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_const_char_to_char_pointer_convert: - BX LR // return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_thread_pointer_convert: - BX LR // return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_object_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_object_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_header_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_entry_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_entry_to_uchar_pointer_convert: - BX LR // return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_char_to_uchar_pointer_convert: - BX LR // return - - /***********************************************************************************************/ /***********************************************************************************************/ /** */ diff --git a/ports/cortex_m3/iar/CMakeLists.txt b/ports/cortex_m3/iar/CMakeLists.txt new file mode 100644 index 00000000..a524d79f --- /dev/null +++ b/ports/cortex_m3/iar/CMakeLists.txt @@ -0,0 +1,21 @@ + +target_sources(${PROJECT_NAME} + PRIVATE + # {{BEGIN_TARGET_SOURCES}} + ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S + # {{END_TARGET_SOURCES}} +) + +target_include_directories(${PROJECT_NAME} + PUBLIC + ${CMAKE_CURRENT_LIST_DIR}/inc +) diff --git a/ports/cortex_m3/iar/inc/tx_port.h b/ports/cortex_m3/iar/inc/tx_port.h index 77c52fba..0781aecd 100644 --- a/ports/cortex_m3/iar/inc/tx_port.h +++ b/ports/cortex_m3/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/IAR */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/IAR Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/IAR Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m3/iar/src/tx_misra.s b/ports/cortex_m3/iar/src/tx_misra.s index 2add69b3..c81c3e5c 100644 --- a/ports/cortex_m3/iar/src/tx_misra.s +++ b/ports/cortex_m3/iar/src/tx_misra.s @@ -102,6 +102,16 @@ PUBLIC _tx_misra_fpccr_get PUBLIC _tx_misra_vfp_touch #endif + + PUBLIC _tx_misra_event_flags_group_not_used + PUBLIC _tx_misra_event_flags_set_notify_not_used + PUBLIC _tx_misra_queue_not_used + PUBLIC _tx_misra_queue_send_notify_not_used + PUBLIC _tx_misra_semaphore_not_used + PUBLIC _tx_misra_semaphore_put_notify_not_used + PUBLIC _tx_misra_thread_entry_exit_notify_not_used + PUBLIC _tx_misra_thread_not_used + PUBLIC _tx_version_id @@ -115,7 +125,7 @@ _tx_version_id: DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H - DC8 65H, 61H, 64H, 58H, 20H, 35H, 2EH, 38H + DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H DC8 6EH, 74H, 20H, 2AH, 0 @@ -139,7 +149,7 @@ _tx_misra_memset: MOVS R1,R0 MOVS R0,R4 BL __aeabi_memset - POP {R4,PC} ;; return + POP {R4,PC} // return /**************************************************************************/ /**************************************************************************/ @@ -153,7 +163,7 @@ _tx_misra_memset: THUMB _tx_misra_uchar_pointer_add: ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -169,7 +179,7 @@ _tx_misra_uchar_pointer_add: _tx_misra_uchar_pointer_sub: RSBS R1,R1,#+0 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -184,21 +194,97 @@ _tx_misra_uchar_pointer_sub: THUMB _tx_misra_uchar_pointer_dif: SUBS R0,R0,R1 - BX LR ;; return + BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_pointer_to_ulong_convert: - BX LR ;; return +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return /**************************************************************************/ @@ -213,7 +299,7 @@ _tx_misra_pointer_to_ulong_convert: THUMB _tx_misra_ulong_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -230,7 +316,7 @@ _tx_misra_ulong_pointer_sub: MVNS R2,#+3 MULS R1,R2,R1 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -246,21 +332,7 @@ _tx_misra_ulong_pointer_sub: _tx_misra_ulong_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -299,7 +371,7 @@ _tx_misra_message_copy: STR R3,[R0, #+0] STR R4,[R1, #+0] POP {R4,R5} - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -316,7 +388,7 @@ _tx_misra_message_copy: _tx_misra_timer_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -332,7 +404,7 @@ _tx_misra_timer_pointer_dif: THUMB _tx_misra_timer_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -347,12 +419,9 @@ _tx_misra_timer_pointer_add: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR ;; return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -374,7 +443,7 @@ _tx_misra_thread_stack_check: CMP R4,#+0 BEQ.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+0] - LDR.N R2,??DataTable2 ;; 0x54485244 + LDR.N R2,??DataTable2 // 0x54485244 CMP R1,R2 BNE.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+8] @@ -412,7 +481,7 @@ _tx_misra_thread_stack_check: BL _tx_thread_interrupt_disable ??_tx_misra_thread_stack_check_0: BL _tx_thread_interrupt_restore - POP {R0,R4,R5,PC} ;; return + POP {R0,R4,R5,PC} // return #ifdef TX_ENABLE_EVENT_TRACE @@ -500,7 +569,7 @@ _tx_misra_trace_event_insert: LDR R0,[R0, #+0] STR R4,[R0, #+32] ??_tx_misra_trace_event_insert_0: - POP {R0,R4-R7,PC} ;; return + POP {R0,R4-R7,PC} // return SECTION `.text`:CODE:NOROOT(2) @@ -552,7 +621,7 @@ _tx_misra_trace_event_insert: THUMB _tx_misra_time_stamp_get: MOVS R0,#+0 - BX LR ;; return + BX LR // return #endif @@ -587,203 +656,7 @@ _tx_misra_time_stamp_get: THUMB _tx_misra_always_true: MOVS R0,#+1 - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_block_pool_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR ;; return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_event_flags_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_ulong_pointer_convert: - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_mutex_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -798,192 +671,7 @@ _tx_misra_void_to_mutex_pointer_convert: THUMB _tx_misra_status_get: MOVS R0,#+0 - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_queue_pointer_convert: - BX LR ;; return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_semaphore_pointer_convert: - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_void_pointer_convert: - BX LR ;; return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_thread_pointer_convert: - BX LR ;; return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_const_char_to_char_pointer_convert: - BX LR ;; return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_thread_pointer_convert: - BX LR ;; return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_object_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_object_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_header_pointer_convert: - BX LR ;; return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_entry_pointer_convert: - BX LR ;; return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_entry_to_uchar_pointer_convert: - BX LR ;; return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_char_to_uchar_pointer_convert: - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -998,7 +686,7 @@ _tx_misra_char_to_uchar_pointer_convert: THUMB _tx_misra_ipsr_get: MRS R0, IPSR - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -1013,7 +701,7 @@ _tx_misra_ipsr_get: THUMB _tx_misra_control_get: MRS R0, CONTROL - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -1028,7 +716,7 @@ _tx_misra_control_get: THUMB _tx_misra_control_set: MSR CONTROL, R0 - BX LR ;; return + BX LR // return #ifdef __ARMVFP__ @@ -1044,9 +732,9 @@ _tx_misra_control_set: SECTION `.text`:CODE:NOROOT(2) THUMB _tx_misra_fpccr_get: - LDR r0, =0xE000EF34 ; Build FPCCR address - LDR r0, [r0] ; Load FPCCR value - BX LR ;; return + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return /***********************************************************************************************/ @@ -1061,7 +749,7 @@ _tx_misra_fpccr_get: THUMB _tx_misra_vfp_touch: vmov.f32 s0, s0 - BX LR ;; return + BX LR // return #endif diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt index 5fcedc85..70384682 100644 --- a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt +++ b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt @@ -10,7 +10,7 @@ <aExt>*.s*; *.src; *.a*</aExt> <oExt>*.obj</oExt> <lExt>*.lib</lExt> - <tExt>*.txt; *.h; *.inc</tExt> + <tExt>*.txt; *.h; *.inc; *.md</tExt> <pExt>*.plm</pExt> <CppX>*.cpp</CppX> <nMigrate>0</nMigrate> diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj index 1d887f06..1700c5e1 100644 --- a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj +++ b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj @@ -555,19 +555,4 @@ </Target> </Targets> - <LayerInfo> - <Layers> - <Layer> - <LayName><Project Info></LayName> - <LayDesc></LayDesc> - <LayUrl></LayUrl> - <LayKeys></LayKeys> - <LayCat></LayCat> - <LayLic></LayLic> - <LayTarg>0</LayTarg> - <LayPrjMark>1</LayPrjMark> - </Layer> - </Layers> - </LayerInfo> - </Project> diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt index ac554f54..f8594618 100644 --- a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt +++ b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt @@ -10,7 +10,7 @@ <aExt>*.s*; *.src; *.a*</aExt> <oExt>*.obj; *.o</oExt> <lExt>*.lib</lExt> - <tExt>*.txt; *.h; *.inc</tExt> + <tExt>*.txt; *.h; *.inc; *.md</tExt> <pExt>*.plm</pExt> <CppX>*.cpp</CppX> <nMigrate>0</nMigrate> diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj index 560ac208..39e74b01 100644 --- a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj +++ b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj @@ -1532,19 +1532,4 @@ </Target> </Targets> - <LayerInfo> - <Layers> - <Layer> - <LayName><Project Info></LayName> - <LayDesc></LayDesc> - <LayUrl></LayUrl> - <LayKeys></LayKeys> - <LayCat></LayCat> - <LayLic></LayLic> - <LayTarg>0</LayTarg> - <LayPrjMark>1</LayPrjMark> - </Layer> - </Layers> - </LayerInfo> - </Project> diff --git a/ports/cortex_m3/keil/inc/tx_port.h b/ports/cortex_m3/keil/inc/tx_port.h index d12b1ad9..59a1b36c 100644 --- a/ports/cortex_m3/keil/inc/tx_port.h +++ b/ports/cortex_m3/keil/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/Keil */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/Keil Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/Keil Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m55/ac6/CmakeLists.txt b/ports/cortex_m33/ac6/CMakeLists.txt index 5ad3b8e7..5ad3b8e7 100644 --- a/ports/cortex_m55/ac6/CmakeLists.txt +++ b/ports/cortex_m33/ac6/CMakeLists.txt diff --git a/ports/cortex_m33/ac6/inc/tx_port.h b/ports/cortex_m33/ac6/inc/tx_port.h index aaa02995..90573b50 100644 --- a/ports/cortex_m33/ac6/inc/tx_port.h +++ b/ports/cortex_m33/ac6/inc/tx_port.h @@ -25,8 +25,8 @@ /* */ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ -/* tx_port.h Cortex-M33 */ -/* 6.1.11 */ +/* tx_port.h Cortex-M33/AC6 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC6 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m33/ac6/src/tx_initialize_low_level.S b/ports/cortex_m33/ac6/src/tx_initialize_low_level.S new file mode 100644 index 00000000..a5e8e946 --- /dev/null +++ b/ports/cortex_m33/ac6/src/tx_initialize_low_level.S @@ -0,0 +1,278 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Initialize */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + +SYSTEM_CLOCK = 6000000 +SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) + +/* Setup the stack and heap areas. */ + +STACK_SIZE = 0x00000400 +HEAP_SIZE = 0x00000000 + +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-M33/AC6 */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* Scott Larson, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* */ +/**************************************************************************/ +// VOID _tx_initialize_low_level(VOID) +// { + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global _tx_initialize_low_level + .thumb_func +.type _tx_initialize_low_level, function +_tx_initialize_low_level: + + /* Disable interrupts during ThreadX initialization. */ + CPSID i + + /* Set base of available memory to end of non-initialised RAM area. */ + LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer + LDR r1, =Image$$ARM_LIB_STACK$$ZI$$Limit // Build first free address + ADD r1, r1, #4 // + STR r1, [r0] // Setup first unused memory pointer + + /* Setup Vector Table Offset Register. */ + MOV r0, #0xE000E000 // Build address of NVIC registers + LDR r1, =__Vectors // Pickup address of vector table + STR r1, [r0, #0xD08] // Set vector table address + + /* Enable the cycle count register. */ + LDR r0, =0xE0001000 // Build address of DWT register + LDR r1, [r0] // Pickup the current value + ORR r1, r1, #1 // Set the CYCCNTENA bit + STR r1, [r0] // Enable the cycle count register + + /* Set system stack pointer from vector value. */ + LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer + LDR r1, =__Vectors // Pickup address of vector table + LDR r1, [r1] // Pickup reset stack pointer + STR r1, [r0] // Save system stack pointer + + /* Configure SysTick. */ + MOV r0, #0xE000E000 // Build address of NVIC registers + LDR r1, =SYSTICK_CYCLES + STR r1, [r0, #0x14] // Setup SysTick Reload Value + MOV r1, #0x7 // Build SysTick Control Enable Value + STR r1, [r0, #0x10] // Setup SysTick Control + + /* Configure handler priorities. */ + LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM + STR r1, [r0, #0xD18] // Setup System Handlers 4-7 Priority Registers + + LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv + STR r1, [r0, #0xD1C] // Setup System Handlers 8-11 Priority Registers + // Note: SVC must be lowest priority, which is 0xFF + + LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM + STR r1, [r0, #0xD20] // Setup System Handlers 12-15 Priority Registers + // Note: PnSV must be lowest priority, which is 0xFF + + /* Return to caller. */ + BX lr +// } + + +/* Define shells for each of the unused vectors. */ + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global __tx_BadHandler + .thumb_func +.type __tx_BadHandler, function +__tx_BadHandler: + B __tx_BadHandler + + + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global __tx_IntHandler + .thumb_func +.type __tx_IntHandler, function +__tx_IntHandler: +// VOID InterruptHandler (VOID) +// { + PUSH {r0,lr} // Save LR (and dummy r0 to maintain stack alignment) +#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE)) + BL _tx_execution_isr_enter // Call the ISR enter function +#endif + /* Do interrupt handler work here */ + /* .... */ +#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE)) + BL _tx_execution_isr_exit // Call the ISR exit function +#endif + POP {r0,lr} + BX LR +// } + + + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global SysTick_Handler + .thumb_func +.type SysTick_Handler, function +SysTick_Handler: +// VOID TimerInterruptHandler (VOID) +// { + PUSH {r0,lr} // Save LR (and dummy r0 to maintain stack alignment) +#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE)) + BL _tx_execution_isr_enter // Call the ISR enter function +#endif + BL _tx_timer_interrupt +#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE)) + BL _tx_execution_isr_exit // Call the ISR exit function +#endif + POP {r0,lr} + BX LR +// } + + + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global HardFault_Handler + .thumb_func +.type HardFault_Handler, function +HardFault_Handler: + B HardFault_Handler + + + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global UsageFault_Handler + .thumb_func +.type UsageFault_Handler, function +UsageFault_Handler: + CPSID i // Disable interrupts + // Check for stack limit fault + LDR r0, =0xE000ED28 // CFSR address + LDR r1,[r0] // Pick up CFSR + TST r1, #0x00100000 // Check for Stack Overflow +_unhandled_usage_loop: + BEQ _unhandled_usage_loop // If not stack overflow then loop + + // Handle stack overflow + STR r1, [r0] // Clear CFSR flag(s) + +#ifdef __ARM_PCS_VFP + LDR r0, =0xE000EF34 // Cleanup FPU context: Load FPCCR address + LDR r1, [r0] // Load FPCCR + BIC r1, r1, #1 // Clear the lazy preservation active bit + STR r1, [r0] // Store the value +#endif + + LDR r0, =_tx_thread_current_ptr // Build current thread pointer address + LDR r0,[r0] // Pick up current thread pointer + PUSH {r0,lr} // Save LR (and r0 to maintain stack alignment) + BL _tx_thread_stack_error_handler // Call ThreadX/user handler + POP {r0,lr} // Restore LR and dummy reg + +#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE)) + // Call the thread exit function to indicate the thread is no longer executing. + PUSH {r0, lr} // Save LR (and r0 just for alignment) + BL _tx_execution_thread_exit // Call the thread exit function + POP {r0, lr} // Recover LR +#endif + + MOV r1, #0 // Build NULL value + LDR r0, =_tx_thread_current_ptr // Pickup address of current thread pointer + STR r1, [r0] // Clear current thread pointer + + // Return from UsageFault_Handler exception + LDR r0, =0xE000ED04 // Load ICSR + LDR r1, =0x10000000 // Set PENDSVSET bit + STR r1, [r0] // Store ICSR + DSB // Wait for memory access to complete + CPSIE i // Enable interrupts + BX lr // Return from exception + + + + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global __tx_NMIHandler + .thumb_func +.type __tx_NMIHandler, function +__tx_NMIHandler: + B __tx_NMIHandler + + + .section .text + .balign 4 + .syntax unified + .eabi_attribute Tag_ABI_align_preserved, 1 + .global __tx_DBGHandler + .thumb_func +.type __tx_DBGHandler, function +__tx_DBGHandler: + B __tx_DBGHandler + + .end diff --git a/ports/cortex_m33/ac6/src/tx_misra.S b/ports/cortex_m33/ac6/src/tx_misra.S new file mode 100644 index 00000000..155512be --- /dev/null +++ b/ports/cortex_m33/ac6/src/tx_misra.S @@ -0,0 +1,719 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** ThreadX MISRA Compliance */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + #define SHT_PROGBITS 0x1 + + .global __aeabi_memset + .global _tx_thread_current_ptr + .global _tx_thread_interrupt_disable + .global _tx_thread_interrupt_restore + .global _tx_thread_stack_analyze + .global _tx_thread_stack_error_handler + .global _tx_thread_system_state +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_trace_buffer_current_ptr + .global _tx_trace_buffer_end_ptr + .global _tx_trace_buffer_start_ptr + .global _tx_trace_event_enable_bits + .global _tx_trace_full_notify_function + .global _tx_trace_header_ptr +#endif + + .global _tx_misra_always_true + .global _tx_misra_block_pool_to_uchar_pointer_convert + .global _tx_misra_byte_pool_to_uchar_pointer_convert + .global _tx_misra_char_to_uchar_pointer_convert + .global _tx_misra_const_char_to_char_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_entry_to_uchar_pointer_convert +#endif + .global _tx_misra_indirect_void_to_uchar_pointer_convert + .global _tx_misra_memset + .global _tx_misra_message_copy +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_object_to_uchar_pointer_convert +#endif + .global _tx_misra_pointer_to_ulong_convert + .global _tx_misra_status_get + .global _tx_misra_thread_stack_check +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_time_stamp_get +#endif + .global _tx_misra_timer_indirect_to_void_pointer_convert + .global _tx_misra_timer_pointer_add + .global _tx_misra_timer_pointer_dif +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_trace_event_insert +#endif + .global _tx_misra_uchar_pointer_add + .global _tx_misra_uchar_pointer_dif + .global _tx_misra_uchar_pointer_sub + .global _tx_misra_uchar_to_align_type_pointer_convert + .global _tx_misra_uchar_to_block_pool_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_entry_pointer_convert + .global _tx_misra_uchar_to_header_pointer_convert +#endif + .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert + .global _tx_misra_uchar_to_indirect_uchar_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_object_pointer_convert +#endif + .global _tx_misra_uchar_to_void_pointer_convert + .global _tx_misra_ulong_pointer_add + .global _tx_misra_ulong_pointer_dif + .global _tx_misra_ulong_pointer_sub + .global _tx_misra_ulong_to_pointer_convert + .global _tx_misra_ulong_to_thread_pointer_convert + .global _tx_misra_user_timer_pointer_get + .global _tx_misra_void_to_block_pool_pointer_convert + .global _tx_misra_void_to_byte_pool_pointer_convert + .global _tx_misra_void_to_event_flags_pointer_convert + .global _tx_misra_void_to_indirect_uchar_pointer_convert + .global _tx_misra_void_to_mutex_pointer_convert + .global _tx_misra_void_to_queue_pointer_convert + .global _tx_misra_void_to_semaphore_pointer_convert + .global _tx_misra_void_to_thread_pointer_convert + .global _tx_misra_void_to_uchar_pointer_convert + .global _tx_misra_void_to_ulong_pointer_convert + .global _tx_misra_ipsr_get + .global _tx_misra_control_get + .global _tx_misra_control_set +#ifdef __ARM_FP + .global _tx_misra_fpccr_get + .global _tx_misra_vfp_touch +#endif + + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_memset(VOID *ptr, UINT value, UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .align 4 + .syntax unified + .thumb_func +_tx_misra_memset: + PUSH {R4,LR} + MOVS R4,R0 + MOVS R0,R2 + MOVS R2,R1 + MOVS R1,R0 + MOVS R0,R4 + BL __aeabi_memset + POP {R4,PC} // return + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_add: + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_sub: + RSBS R1,R1,#+0 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_dif: + SUBS R0,R0,R1 + BX LR // return + + +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ + .text + .thumb_func +_tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_add: + ADD R0,R0,R1, LSL #+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_sub: + MVNS R2,#+3 + MULS R1,R2,R1 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ +/** UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_message_copy: + PUSH {R4,R5} + LDR R3,[R0, #+0] + LDR R4,[R1, #+0] + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + CMP R2,#+2 + BCC.N _tx_misra_message_copy_0 + SUBS R2,R2,#+1 + B.N _tx_misra_message_copy_1 +_tx_misra_message_copy_2: + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + SUBS R2,R2,#+1 +_tx_misra_message_copy_1: + CMP R2,#+0 + BNE.N _tx_misra_message_copy_2 +_tx_misra_message_copy_0: + STR R3,[R0, #+0] + STR R4,[R1, #+0] + POP {R4,R5} + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1, */ +/** TX_TIMER_INTERNAL **ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL */ +/** **ptr1, ULONG size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_add: + ADD R0,R0,R1, LSL #+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL */ +/** *internal_timer, TX_TIMER **user_timer); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_user_timer_pointer_get: + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_thread_stack_check(TX_THREAD *thread_ptr, */ +/** VOID **highest_stack); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_thread_stack_check: + PUSH {R3-R5,LR} + MOVS R4,R0 + MOVS R5,R1 + BL _tx_thread_interrupt_disable + CMP R4,#+0 + BEQ.N _tx_misra_thread_stack_check_0 + LDR R1,[R4, #+0] + LDR R2,=0x54485244 + CMP R1,R2 + BNE.N _tx_misra_thread_stack_check_0 + LDR R1,[R4, #+8] + LDR R2,[R5, #+0] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_1 + LDR R1,[R4, #+8] + STR R1,[R5, #+0] +_tx_misra_thread_stack_check_1: + LDR R1,[R4, #+12] + LDR R1,[R1, #+0] + CMP R1,#-269488145 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R4, #+16] + LDR R1,[R1, #+1] + CMP R1,#-269488145 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R5, #+0] + LDR R2,[R4, #+12] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_3 +_tx_misra_thread_stack_check_2: + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_error_handler + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_3: + LDR R1,[R5, #+0] + LDR R1,[R1, #-4] + CMP R1,#-269488145 + BEQ.N _tx_misra_thread_stack_check_0 + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_analyze + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_0: + BL _tx_thread_interrupt_restore + POP {R0,R4,R5,PC} // return + +#ifdef TX_ENABLE_EVENT_TRACE + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_trace_event_insert(ULONG event_id, */ +/** VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */ +/** ULONG info_field_4, ULONG filter, ULONG time_stamp); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_trace_event_insert: + PUSH {R3-R7,LR} + LDR.N R4,DataTable2_1 + LDR R4,[R4, #+0] + CMP R4,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_2 + LDR R5,[R5, #+0] + LDR R6,[SP, #+28] + TST R5,R6 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_3 + LDR R5,[R5, #+0] + LDR.N R6,DataTable2_4 + LDR R6,[R6, #+0] + CMP R5,#+0 + BNE.N _tx_misra_trace_event_insert_1 + LDR R5,[R6, #+44] + LDR R7,[R6, #+60] + LSLS R7,R7,#+16 + ORRS R7,R7,#0x80000000 + ORRS R5,R7,R5 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_1: + CMP R5,#-252645136 + BCS.N _tx_misra_trace_event_insert_3 + MOVS R5,R6 + MOVS R6,#-1 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_3: + MOVS R6,#-252645136 + MOVS R5,#+0 +_tx_misra_trace_event_insert_2: + STR R6,[R4, #+0] + STR R5,[R4, #+4] + STR R0,[R4, #+8] + LDR R0,[SP, #+32] + STR R0,[R4, #+12] + STR R1,[R4, #+16] + STR R2,[R4, #+20] + STR R3,[R4, #+24] + LDR R0,[SP, #+24] + STR R0,[R4, #+28] + ADDS R4,R4,#+32 + LDR.N R0,DataTable2_5 + LDR R0,[R0, #+0] + CMP R4,R0 + BCC.N _tx_misra_trace_event_insert_4 + LDR.N R0,DataTable2_6 + LDR R4,[R0, #+0] + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] + LDR.N R0,DataTable2_8 + LDR R0,[R0, #+0] + CMP R0,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + LDR.N R1,DataTable2_8 + LDR R1,[R1, #+0] + BLX R1 + B.N _tx_misra_trace_event_insert_0 +_tx_misra_trace_event_insert_4: + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] +_tx_misra_trace_event_insert_0: + POP {R0,R4-R7,PC} // return + + + .data +DataTable2_1: + .word _tx_trace_buffer_current_ptr + + .data +DataTable2_2: + .word _tx_trace_event_enable_bits + + .data +DataTable2_5: + .word _tx_trace_buffer_end_ptr + + .data +DataTable2_6: + .word _tx_trace_buffer_start_ptr + + .data +DataTable2_7: + .word _tx_trace_header_ptr + + .data +DataTable2_8: + .word _tx_trace_full_notify_function + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_time_stamp_get(VOID); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_time_stamp_get: + MOVS R0,#+0 + BX LR // return + +#endif + + .data +DataTable2_3: + .word _tx_thread_system_state + + .data +DataTable2_4: + .word _tx_thread_current_ptr + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_always_true(void); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_always_true: + MOVS R0,#+1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_status_get(UINT status); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_status_get: + MOVS R0,#+0 + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_ipsr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_ipsr_get: + MRS R0, IPSR + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_control_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_get: + MRS R0, CONTROL + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_control_set(ULONG value); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_set: + MSR CONTROL, R0 + BX LR // return + + +#ifdef __ARM_FP + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_fpccr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_fpccr_get: + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_vfp_touch(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_vfp_touch: + vmov.f32 s0, s0 + BX LR // return + +#endif + + + .data + .word 0 diff --git a/ports/cortex_m33/ac6/src/tx_thread_secure_stack.c b/ports/cortex_m33/ac6/src/tx_thread_secure_stack.c index d41bdbbe..099ae737 100644 --- a/ports/cortex_m33/ac6/src/tx_thread_secure_stack.c +++ b/ports/cortex_m33/ac6/src/tx_thread_secure_stack.c @@ -219,7 +219,7 @@ TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; UCHAR *stack_mem; -INT secure_context_index; +INT secure_context_index; status = TX_SUCCESS; @@ -241,7 +241,6 @@ INT secure_context_index; else { - TX_DISABLE /* Allocate free index for secure stack info. */ diff --git a/ports/cortex_m33/ac6/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m33/ac6/src/tx_thread_secure_stack_initialize.S index 4baf378a..a96e30ab 100644 --- a/ports/cortex_m33/ac6/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m33/ac6/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M33/AC6 */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m85/ac6/CmakeLists.txt b/ports/cortex_m33/gnu/CMakeLists.txt index 5ad3b8e7..5ad3b8e7 100644 --- a/ports/cortex_m85/ac6/CmakeLists.txt +++ b/ports/cortex_m33/gnu/CMakeLists.txt diff --git a/ports/cortex_m33/gnu/inc/tx_port.h b/ports/cortex_m33/gnu/inc/tx_port.h index aaa02995..24c5adf2 100644 --- a/ports/cortex_m33/gnu/inc/tx_port.h +++ b/ports/cortex_m33/gnu/inc/tx_port.h @@ -25,8 +25,8 @@ /* */ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ -/* tx_port.h Cortex-M33 */ -/* 6.1.11 */ +/* tx_port.h Cortex-M33/GNU */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m33/gnu/src/tx_misra.S b/ports/cortex_m33/gnu/src/tx_misra.S new file mode 100644 index 00000000..155512be --- /dev/null +++ b/ports/cortex_m33/gnu/src/tx_misra.S @@ -0,0 +1,719 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** ThreadX MISRA Compliance */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + #define SHT_PROGBITS 0x1 + + .global __aeabi_memset + .global _tx_thread_current_ptr + .global _tx_thread_interrupt_disable + .global _tx_thread_interrupt_restore + .global _tx_thread_stack_analyze + .global _tx_thread_stack_error_handler + .global _tx_thread_system_state +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_trace_buffer_current_ptr + .global _tx_trace_buffer_end_ptr + .global _tx_trace_buffer_start_ptr + .global _tx_trace_event_enable_bits + .global _tx_trace_full_notify_function + .global _tx_trace_header_ptr +#endif + + .global _tx_misra_always_true + .global _tx_misra_block_pool_to_uchar_pointer_convert + .global _tx_misra_byte_pool_to_uchar_pointer_convert + .global _tx_misra_char_to_uchar_pointer_convert + .global _tx_misra_const_char_to_char_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_entry_to_uchar_pointer_convert +#endif + .global _tx_misra_indirect_void_to_uchar_pointer_convert + .global _tx_misra_memset + .global _tx_misra_message_copy +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_object_to_uchar_pointer_convert +#endif + .global _tx_misra_pointer_to_ulong_convert + .global _tx_misra_status_get + .global _tx_misra_thread_stack_check +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_time_stamp_get +#endif + .global _tx_misra_timer_indirect_to_void_pointer_convert + .global _tx_misra_timer_pointer_add + .global _tx_misra_timer_pointer_dif +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_trace_event_insert +#endif + .global _tx_misra_uchar_pointer_add + .global _tx_misra_uchar_pointer_dif + .global _tx_misra_uchar_pointer_sub + .global _tx_misra_uchar_to_align_type_pointer_convert + .global _tx_misra_uchar_to_block_pool_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_entry_pointer_convert + .global _tx_misra_uchar_to_header_pointer_convert +#endif + .global _tx_misra_uchar_to_indirect_byte_pool_pointer_convert + .global _tx_misra_uchar_to_indirect_uchar_pointer_convert +#ifdef TX_ENABLE_EVENT_TRACE + .global _tx_misra_uchar_to_object_pointer_convert +#endif + .global _tx_misra_uchar_to_void_pointer_convert + .global _tx_misra_ulong_pointer_add + .global _tx_misra_ulong_pointer_dif + .global _tx_misra_ulong_pointer_sub + .global _tx_misra_ulong_to_pointer_convert + .global _tx_misra_ulong_to_thread_pointer_convert + .global _tx_misra_user_timer_pointer_get + .global _tx_misra_void_to_block_pool_pointer_convert + .global _tx_misra_void_to_byte_pool_pointer_convert + .global _tx_misra_void_to_event_flags_pointer_convert + .global _tx_misra_void_to_indirect_uchar_pointer_convert + .global _tx_misra_void_to_mutex_pointer_convert + .global _tx_misra_void_to_queue_pointer_convert + .global _tx_misra_void_to_semaphore_pointer_convert + .global _tx_misra_void_to_thread_pointer_convert + .global _tx_misra_void_to_uchar_pointer_convert + .global _tx_misra_void_to_ulong_pointer_convert + .global _tx_misra_ipsr_get + .global _tx_misra_control_get + .global _tx_misra_control_set +#ifdef __ARM_FP + .global _tx_misra_fpccr_get + .global _tx_misra_vfp_touch +#endif + + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_memset(VOID *ptr, UINT value, UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .align 4 + .syntax unified + .thumb_func +_tx_misra_memset: + PUSH {R4,LR} + MOVS R4,R0 + MOVS R0,R2 + MOVS R2,R1 + MOVS R1,R0 + MOVS R0,R4 + BL __aeabi_memset + POP {R4,PC} // return + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_add(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_add: + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UCHAR *_tx_misra_uchar_pointer_sub(UCHAR *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_sub: + RSBS R1,R1,#+0 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_uchar_pointer_dif(UCHAR *ptr1, UCHAR *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_uchar_pointer_dif: + SUBS R0,R0,R1 + BX LR // return + + +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ + .text + .thumb_func +_tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_add(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_add: + ADD R0,R0,R1, LSL #+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG *_tx_misra_ulong_pointer_sub(ULONG *ptr, ULONG amount); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_sub: + MVNS R2,#+3 + MULS R1,R2,R1 + ADD R0,R0,R1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_ulong_pointer_dif(ULONG *ptr1, ULONG *ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_ulong_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ +/** UINT size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_message_copy: + PUSH {R4,R5} + LDR R3,[R0, #+0] + LDR R4,[R1, #+0] + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + CMP R2,#+2 + BCC.N _tx_misra_message_copy_0 + SUBS R2,R2,#+1 + B.N _tx_misra_message_copy_1 +_tx_misra_message_copy_2: + LDR R5,[R3, #+0] + STR R5,[R4, #+0] + ADDS R4,R4,#+4 + ADDS R3,R3,#+4 + SUBS R2,R2,#+1 +_tx_misra_message_copy_1: + CMP R2,#+0 + BNE.N _tx_misra_message_copy_2 +_tx_misra_message_copy_0: + STR R3,[R0, #+0] + STR R4,[R1, #+0] + POP {R4,R5} + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_timer_pointer_dif(TX_TIMER_INTERNAL **ptr1, */ +/** TX_TIMER_INTERNAL **ptr2); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_dif: + SUBS R0,R0,R1 + ASRS R0,R0,#+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** TX_TIMER_INTERNAL **_tx_misra_timer_pointer_add(TX_TIMER_INTERNAL */ +/** **ptr1, ULONG size); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_timer_pointer_add: + ADD R0,R0,R1, LSL #+2 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_user_timer_pointer_get(TX_TIMER_INTERNAL */ +/** *internal_timer, TX_TIMER **user_timer); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_user_timer_pointer_get: + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_thread_stack_check(TX_THREAD *thread_ptr, */ +/** VOID **highest_stack); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_thread_stack_check: + PUSH {R3-R5,LR} + MOVS R4,R0 + MOVS R5,R1 + BL _tx_thread_interrupt_disable + CMP R4,#+0 + BEQ.N _tx_misra_thread_stack_check_0 + LDR R1,[R4, #+0] + LDR R2,=0x54485244 + CMP R1,R2 + BNE.N _tx_misra_thread_stack_check_0 + LDR R1,[R4, #+8] + LDR R2,[R5, #+0] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_1 + LDR R1,[R4, #+8] + STR R1,[R5, #+0] +_tx_misra_thread_stack_check_1: + LDR R1,[R4, #+12] + LDR R1,[R1, #+0] + CMP R1,#-269488145 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R4, #+16] + LDR R1,[R1, #+1] + CMP R1,#-269488145 + BNE.N _tx_misra_thread_stack_check_2 + LDR R1,[R5, #+0] + LDR R2,[R4, #+12] + CMP R1,R2 + BCS.N _tx_misra_thread_stack_check_3 +_tx_misra_thread_stack_check_2: + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_error_handler + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_3: + LDR R1,[R5, #+0] + LDR R1,[R1, #-4] + CMP R1,#-269488145 + BEQ.N _tx_misra_thread_stack_check_0 + BL _tx_thread_interrupt_restore + MOVS R0,R4 + BL _tx_thread_stack_analyze + BL _tx_thread_interrupt_disable +_tx_misra_thread_stack_check_0: + BL _tx_thread_interrupt_restore + POP {R0,R4,R5,PC} // return + +#ifdef TX_ENABLE_EVENT_TRACE + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** VOID _tx_misra_trace_event_insert(ULONG event_id, */ +/** VOID *info_field_1, ULONG info_field_2, ULONG info_field_3, */ +/** ULONG info_field_4, ULONG filter, ULONG time_stamp); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_trace_event_insert: + PUSH {R3-R7,LR} + LDR.N R4,DataTable2_1 + LDR R4,[R4, #+0] + CMP R4,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_2 + LDR R5,[R5, #+0] + LDR R6,[SP, #+28] + TST R5,R6 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R5,DataTable2_3 + LDR R5,[R5, #+0] + LDR.N R6,DataTable2_4 + LDR R6,[R6, #+0] + CMP R5,#+0 + BNE.N _tx_misra_trace_event_insert_1 + LDR R5,[R6, #+44] + LDR R7,[R6, #+60] + LSLS R7,R7,#+16 + ORRS R7,R7,#0x80000000 + ORRS R5,R7,R5 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_1: + CMP R5,#-252645136 + BCS.N _tx_misra_trace_event_insert_3 + MOVS R5,R6 + MOVS R6,#-1 + B.N _tx_misra_trace_event_insert_2 +_tx_misra_trace_event_insert_3: + MOVS R6,#-252645136 + MOVS R5,#+0 +_tx_misra_trace_event_insert_2: + STR R6,[R4, #+0] + STR R5,[R4, #+4] + STR R0,[R4, #+8] + LDR R0,[SP, #+32] + STR R0,[R4, #+12] + STR R1,[R4, #+16] + STR R2,[R4, #+20] + STR R3,[R4, #+24] + LDR R0,[SP, #+24] + STR R0,[R4, #+28] + ADDS R4,R4,#+32 + LDR.N R0,DataTable2_5 + LDR R0,[R0, #+0] + CMP R4,R0 + BCC.N _tx_misra_trace_event_insert_4 + LDR.N R0,DataTable2_6 + LDR R4,[R0, #+0] + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] + LDR.N R0,DataTable2_8 + LDR R0,[R0, #+0] + CMP R0,#+0 + BEQ.N _tx_misra_trace_event_insert_0 + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + LDR.N R1,DataTable2_8 + LDR R1,[R1, #+0] + BLX R1 + B.N _tx_misra_trace_event_insert_0 +_tx_misra_trace_event_insert_4: + LDR.N R0,DataTable2_1 + STR R4,[R0, #+0] + LDR.N R0,DataTable2_7 + LDR R0,[R0, #+0] + STR R4,[R0, #+32] +_tx_misra_trace_event_insert_0: + POP {R0,R4-R7,PC} // return + + + .data +DataTable2_1: + .word _tx_trace_buffer_current_ptr + + .data +DataTable2_2: + .word _tx_trace_event_enable_bits + + .data +DataTable2_5: + .word _tx_trace_buffer_end_ptr + + .data +DataTable2_6: + .word _tx_trace_buffer_start_ptr + + .data +DataTable2_7: + .word _tx_trace_header_ptr + + .data +DataTable2_8: + .word _tx_trace_full_notify_function + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ULONG _tx_misra_time_stamp_get(VOID); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_time_stamp_get: + MOVS R0,#+0 + BX LR // return + +#endif + + .data +DataTable2_3: + .word _tx_thread_system_state + + .data +DataTable2_4: + .word _tx_thread_current_ptr + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_always_true(void); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_always_true: + MOVS R0,#+1 + BX LR // return + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** UINT _tx_misra_status_get(UINT status); */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + .text + .thumb_func +_tx_misra_status_get: + MOVS R0,#+0 + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_ipsr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_ipsr_get: + MRS R0, IPSR + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_control_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_get: + MRS R0, CONTROL + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_control_set(ULONG value); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_control_set: + MSR CONTROL, R0 + BX LR // return + + +#ifdef __ARM_FP + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_fpccr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_fpccr_get: + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return + + +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** void _tx_misra_vfp_touch(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ + + .text + .thumb_func +_tx_misra_vfp_touch: + vmov.f32 s0, s0 + BX LR // return + +#endif + + + .data + .word 0 diff --git a/ports/cortex_m33/gnu/src/tx_thread_secure_stack.c b/ports/cortex_m33/gnu/src/tx_thread_secure_stack.c index 0b064098..13bfc29a 100644 --- a/ports/cortex_m33/gnu/src/tx_thread_secure_stack.c +++ b/ports/cortex_m33/gnu/src/tx_thread_secure_stack.c @@ -167,7 +167,7 @@ INT index; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_allocate Cortex-M33/GNU */ -/* 6.1.10 */ +/* 6.1.11a */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -207,11 +207,15 @@ INT index; /* 01-31-2022 Himanshu Gupta Modified comments(s), updated */ /* secure stack allocation, */ /* resulting in version 6.1.10 */ +/* 05-02-2022 Scott Larson Modified comment(s), added */ +/* TX_INTERRUPT_SAVE_AREA, */ +/* resulting in version 6.1.11a*/ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; UCHAR *stack_mem; diff --git a/ports/cortex_m33/gnu/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m33/gnu/src/tx_thread_secure_stack_initialize.S index 9e9642fc..a9f899f6 100644 --- a/ports/cortex_m33/gnu/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m33/gnu/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M33/GNU */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m33/iar/inc/tx_port.h b/ports/cortex_m33/iar/inc/tx_port.h index aaa02995..05fc5a6b 100644 --- a/ports/cortex_m33/iar/inc/tx_port.h +++ b/ports/cortex_m33/iar/inc/tx_port.h @@ -25,8 +25,8 @@ /* */ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ -/* tx_port.h Cortex-M33 */ -/* 6.1.11 */ +/* tx_port.h Cortex-M33/IAR */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33 Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/IAR Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m33/iar/src/tx_misra.s b/ports/cortex_m33/iar/src/tx_misra.s index acb85cc9..c81c3e5c 100644 --- a/ports/cortex_m33/iar/src/tx_misra.s +++ b/ports/cortex_m33/iar/src/tx_misra.s @@ -96,6 +96,22 @@ PUBLIC _tx_misra_void_to_uchar_pointer_convert PUBLIC _tx_misra_void_to_ulong_pointer_convert PUBLIC _tx_misra_ipsr_get + PUBLIC _tx_misra_control_get + PUBLIC _tx_misra_control_set +#ifdef __ARMVFP__ + PUBLIC _tx_misra_fpccr_get + PUBLIC _tx_misra_vfp_touch +#endif + + PUBLIC _tx_misra_event_flags_group_not_used + PUBLIC _tx_misra_event_flags_set_notify_not_used + PUBLIC _tx_misra_queue_not_used + PUBLIC _tx_misra_queue_send_notify_not_used + PUBLIC _tx_misra_semaphore_not_used + PUBLIC _tx_misra_semaphore_put_notify_not_used + PUBLIC _tx_misra_thread_entry_exit_notify_not_used + PUBLIC _tx_misra_thread_not_used + PUBLIC _tx_version_id @@ -109,7 +125,7 @@ _tx_version_id: DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H - DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 30H + DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H DC8 6EH, 74H, 20H, 2AH, 0 @@ -133,7 +149,7 @@ _tx_misra_memset: MOVS R1,R0 MOVS R0,R4 BL __aeabi_memset - POP {R4,PC} ;; return + POP {R4,PC} // return /**************************************************************************/ /**************************************************************************/ @@ -147,7 +163,7 @@ _tx_misra_memset: THUMB _tx_misra_uchar_pointer_add: ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -163,7 +179,7 @@ _tx_misra_uchar_pointer_add: _tx_misra_uchar_pointer_sub: RSBS R1,R1,#+0 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -178,21 +194,97 @@ _tx_misra_uchar_pointer_sub: THUMB _tx_misra_uchar_pointer_dif: SUBS R0,R0,R1 - BX LR ;; return + BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_pointer_to_ulong_convert: - BX LR ;; return +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return /**************************************************************************/ @@ -207,7 +299,7 @@ _tx_misra_pointer_to_ulong_convert: THUMB _tx_misra_ulong_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -224,7 +316,7 @@ _tx_misra_ulong_pointer_sub: MVNS R2,#+3 MULS R1,R2,R1 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -240,21 +332,7 @@ _tx_misra_ulong_pointer_sub: _tx_misra_ulong_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -293,7 +371,7 @@ _tx_misra_message_copy: STR R3,[R0, #+0] STR R4,[R1, #+0] POP {R4,R5} - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -310,7 +388,7 @@ _tx_misra_message_copy: _tx_misra_timer_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -326,7 +404,7 @@ _tx_misra_timer_pointer_dif: THUMB _tx_misra_timer_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -341,12 +419,9 @@ _tx_misra_timer_pointer_add: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR ;; return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -368,7 +443,7 @@ _tx_misra_thread_stack_check: CMP R4,#+0 BEQ.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+0] - LDR.N R2,??DataTable2 ;; 0x54485244 + LDR.N R2,??DataTable2 // 0x54485244 CMP R1,R2 BNE.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+8] @@ -406,7 +481,7 @@ _tx_misra_thread_stack_check: BL _tx_thread_interrupt_disable ??_tx_misra_thread_stack_check_0: BL _tx_thread_interrupt_restore - POP {R0,R4,R5,PC} ;; return + POP {R0,R4,R5,PC} // return #ifdef TX_ENABLE_EVENT_TRACE @@ -494,7 +569,7 @@ _tx_misra_trace_event_insert: LDR R0,[R0, #+0] STR R4,[R0, #+32] ??_tx_misra_trace_event_insert_0: - POP {R0,R4-R7,PC} ;; return + POP {R0,R4-R7,PC} // return SECTION `.text`:CODE:NOROOT(2) @@ -546,7 +621,7 @@ _tx_misra_trace_event_insert: THUMB _tx_misra_time_stamp_get: MOVS R0,#+0 - BX LR ;; return + BX LR // return #endif @@ -581,203 +656,7 @@ _tx_misra_time_stamp_get: THUMB _tx_misra_always_true: MOVS R0,#+1 - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_block_pool_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR ;; return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_event_flags_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_ulong_pointer_convert: - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_mutex_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -792,209 +671,89 @@ _tx_misra_void_to_mutex_pointer_convert: THUMB _tx_misra_status_get: MOVS R0,#+0 - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_queue_pointer_convert: - BX LR ;; return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_semaphore_pointer_convert: - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_void_pointer_convert: - BX LR ;; return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_thread_pointer_convert: - BX LR ;; return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_const_char_to_char_pointer_convert: - BX LR ;; return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_thread_pointer_convert: - BX LR ;; return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_object_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_object_pointer_convert: - BX LR ;; return + BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ +/***********************************************************************************************/ +/***********************************************************************************************/ +/** */ +/** ULONG _tx_misra_ipsr_get(void); */ +/** */ +/***********************************************************************************************/ +/***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_uchar_to_header_pointer_convert: - BX LR ;; return +_tx_misra_ipsr_get: + MRS R0, IPSR + BX LR // return /***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** ULONG _tx_misra_control_get(void); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_uchar_to_entry_pointer_convert: - BX LR ;; return - +_tx_misra_control_get: + MRS R0, CONTROL + BX LR // return + /***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** void _tx_misra_control_set(ULONG value); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_entry_to_uchar_pointer_convert: - BX LR ;; return -#endif +_tx_misra_control_set: + MSR CONTROL, R0 + BX LR // return + +#ifdef __ARMVFP__ /***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** ULONG _tx_misra_fpccr_get(void); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ - SECTION `.text`:CODE:NOROOT(1) + SECTION `.text`:CODE:NOROOT(2) THUMB -_tx_misra_char_to_uchar_pointer_convert: - BX LR ;; return - - -***********************************************************************************************/ +_tx_misra_fpccr_get: + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return + + +/***********************************************************************************************/ /***********************************************************************************************/ /** */ -/** ULONG _tx_misra_ipsr_get(void); */ +/** void _tx_misra_vfp_touch(void); */ /** */ /***********************************************************************************************/ /***********************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB -_tx_misra_ipsr_get: - MRS R0, IPSR - BX LR ;; return - - +_tx_misra_vfp_touch: + vmov.f32 s0, s0 + BX LR // return + +#endif + + SECTION `.iar_vfe_header`:DATA:NOALLOC:NOROOT(2) SECTION_TYPE SHT_PROGBITS, 0 DATA diff --git a/ports/cortex_m33/iar/src/tx_thread_secure_stack.c b/ports/cortex_m33/iar/src/tx_thread_secure_stack.c index 94d41db7..83e6c37d 100644 --- a/ports/cortex_m33/iar/src/tx_thread_secure_stack.c +++ b/ports/cortex_m33/iar/src/tx_thread_secure_stack.c @@ -165,7 +165,7 @@ INT index; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_allocate Cortex-M33/IAR */ -/* 6.1.10 */ +/* 6.1.11a */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -209,11 +209,15 @@ INT index; /* 01-31-2022 Himanshu Gupta Modified comments(s), updated */ /* secure stack allocation, */ /* resulting in version 6.1.10 */ +/* 05-02-2022 Scott Larson Modified comment(s), added */ +/* TX_INTERRUPT_SAVE_AREA, */ +/* resulting in version 6.1.11a*/ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; UCHAR *stack_mem; @@ -314,7 +318,7 @@ INT secure_context_index; /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_mode_stack_free Cortex-M33/IAR */ -/* 6.1.10 */ +/* 6.1.11a */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -352,11 +356,15 @@ INT secure_context_index; /* 01-31-2022 Himanshu Gupta Modified comments(s), updated */ /* secure stack allocation, */ /* resulting in version 6.1.10 */ +/* 05-02-2022 Scott Larson Modified comment(s), added */ +/* TX_INTERRUPT_SAVE_AREA, */ +/* resulting in version 6.1.11a*/ /* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_free(TX_THREAD *thread_ptr) { +TX_INTERRUPT_SAVE_AREA UINT status; TX_THREAD_SECURE_STACK_INFO *info_ptr; INT secure_context_index; diff --git a/ports/cortex_m33/iar/src/tx_thread_secure_stack_initialize.s b/ports/cortex_m33/iar/src/tx_thread_secure_stack_initialize.s index 69e84264..4fb1bb3c 100644 --- a/ports/cortex_m33/iar/src/tx_thread_secure_stack_initialize.s +++ b/ports/cortex_m33/iar/src/tx_thread_secure_stack_initialize.s @@ -27,7 +27,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M33/IAR */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -50,13 +50,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m4/ac5/inc/tx_port.h b/ports/cortex_m4/ac5/inc/tx_port.h index 7967a951..0eec634b 100644 --- a/ports/cortex_m4/ac5/inc/tx_port.h +++ b/ports/cortex_m4/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/AC5 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC5 Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC5 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m4/ac6/inc/tx_port.h b/ports/cortex_m4/ac6/inc/tx_port.h index e0f408ab..71b66372 100644 --- a/ports/cortex_m4/ac6/inc/tx_port.h +++ b/ports/cortex_m4/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/AC6 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC6 Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC6 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m4/ac6/src/tx_misra.S b/ports/cortex_m4/ac6/src/tx_misra.S index b03fdcd0..155512be 100644 --- a/ports/cortex_m4/ac6/src/tx_misra.S +++ b/ports/cortex_m4/ac6/src/tx_misra.S @@ -103,6 +103,14 @@ .global _tx_misra_vfp_touch #endif + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used /**************************************************************************/ /**************************************************************************/ @@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif: BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ .text .thumb_func _tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + BX LR // return @@ -237,20 +321,6 @@ _tx_misra_ulong_pointer_dif: /**************************************************************************/ /**************************************************************************/ /** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ /** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ /** UINT size); */ /** */ @@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add: .text .thumb_func _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR // return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -553,202 +620,6 @@ _tx_misra_always_true: BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR // return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - .text - .thumb_func -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_block_pool_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR // return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_event_flags_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_ulong_pointer_convert: - BX LR // return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_mutex_pointer_convert: - BX LR // return - - /**************************************************************************/ /**************************************************************************/ /** */ @@ -764,191 +635,6 @@ _tx_misra_status_get: BX LR // return -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_queue_pointer_convert: - BX LR // return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_semaphore_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_void_pointer_convert: - BX LR // return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_thread_pointer_convert: - BX LR // return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - .text - .thumb_func -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_const_char_to_char_pointer_convert: - BX LR // return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_thread_pointer_convert: - BX LR // return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_object_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_object_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_header_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_entry_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_entry_to_uchar_pointer_convert: - BX LR // return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_char_to_uchar_pointer_convert: - BX LR // return - - /***********************************************************************************************/ /***********************************************************************************************/ /** */ diff --git a/ports/cortex_m4/gnu/example_build/build_threadx.bat b/ports/cortex_m4/gnu/example_build/build_threadx.bat index 062092d3..a52e9e68 100644 --- a/ports/cortex_m4/gnu/example_build/build_threadx.bat +++ b/ports/cortex_m4/gnu/example_build/build_threadx.bat @@ -1,199 +1,198 @@ del tx.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_initialize_low_level.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_stack_build.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_schedule.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_system_return.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_context_save.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_context_restore.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_interrupt_control.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_timer_interrupt.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb ../src/tx_thread_interrupt_control.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_stack_build.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_schedule.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_system_return.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_context_save.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_context_restore.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_thread_interrupt_control.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb ../src/tx_timer_interrupt.S + +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c + arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o -arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o diff --git a/ports/cortex_m4/gnu/example_build/build_threadx_sample.bat b/ports/cortex_m4/gnu/example_build/build_threadx_sample.bat index fd75f7bd..b25cd515 100644 --- a/ports/cortex_m4/gnu/example_build/build_threadx_sample.bat +++ b/ports/cortex_m4/gnu/example_build/build_threadx_sample.bat @@ -1,7 +1,5 @@ -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_simulator_startup.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb cortexm4_crt0.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb tx_initialize_low_level.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mthumb -I../../../../common/inc -I../inc sample_threadx.c -arm-none-eabi-ld -A cortex-m4 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm4_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libc.a -o sample_threadx.out -M > sample_threadx.map - - +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb cortexm4_vectors.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb cortexm4_crt0.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb tx_initialize_low_level.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -I../../../../common/inc -I../inc sample_threadx.c +arm-none-eabi-gcc -g -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfpv4 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm4_vectors.o cortexm4_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a diff --git a/ports/cortex_m7/gnu/example_build/cortexm7_crt0.s b/ports/cortex_m4/gnu/example_build/cortexm4_crt0.S index d4cb1636..bb530ac5 100644 --- a/ports/cortex_m7/gnu/example_build/cortexm7_crt0.s +++ b/ports/cortex_m4/gnu/example_build/cortexm4_crt0.S @@ -13,7 +13,6 @@ _start: ldr r1, =__stack_end__ mov sp, r1 - /* Copy initialised sections into RAM if required. */ ldr r0, =__data_load_start__ ldr r1, =__data_start__ @@ -47,7 +46,6 @@ _start: mov r2, #0 bl crt0_memory_set - /* Setup heap - not recommended for Threadx but here for compatibility reasons */ ldr r0, = __heap_start__ ldr r1, = __heap_end__ @@ -57,7 +55,6 @@ _start: add r0, r0, #4 str r1, [r0] - /* constructors in case of using C++ */ ldr r0, =__ctors_start__ ldr r1, =__ctors_end__ @@ -72,13 +69,11 @@ crt0_ctor_loop: b crt0_ctor_loop crt0_ctor_end: - /* Setup call frame for main() */ mov r0, #0 mov lr, r0 mov r12, sp - start: /* Jump to main() */ mov r0, #0 @@ -93,7 +88,6 @@ crt0_exit_loop: /* Startup helper functions. */ - crt0_memory_copy: cmp r0, r1 beq memory_copy_done @@ -109,7 +103,6 @@ memory_copy_loop: memory_copy_done: bx lr - crt0_memory_set: cmp r0, r1 beq memory_set_done @@ -119,7 +112,6 @@ crt0_memory_set: memory_set_done: bx lr - /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ .section .stack, "wa", %nobits .section .stack_process, "wa", %nobits diff --git a/ports/cortex_m3/gnu/example_build/tx_simulator_startup.s b/ports/cortex_m4/gnu/example_build/cortexm4_vectors.S index cf0db974..6ae558e4 100644 --- a/ports/cortex_m3/gnu/example_build/tx_simulator_startup.s +++ b/ports/cortex_m4/gnu/example_build/cortexm4_vectors.S @@ -1,5 +1,3 @@ - - .global reset_handler .global __tx_NMIHandler @@ -10,7 +8,6 @@ .global __tx_SysTickHandler .global __tx_BadHandler - .syntax unified .section .vectors, "ax" .code 16 @@ -29,7 +26,7 @@ _vectors: .word 0 // Reserved .word 0 // Reserved .word 0 // Reserved - .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // + .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // .word __tx_DBGHandler .word 0 // Reserved .word __tx_PendSVHandler @@ -70,14 +67,10 @@ _vectors: .word __tx_BadHandler .word __tx_BadHandler - - - .section .init, "ax" - .thumb_func + .section .init, "ax" + .thumb_func reset_handler: - -// low level hardware config, such as PLL setup goes here - + // low level hardware config, such as PLL setup goes here b _start diff --git a/ports/cortex_m4/gnu/example_build/sample_threadx.ld b/ports/cortex_m4/gnu/example_build/sample_threadx.ld index 28f203fd..c65a1346 100644 --- a/ports/cortex_m4/gnu/example_build/sample_threadx.ld +++ b/ports/cortex_m4/gnu/example_build/sample_threadx.ld @@ -1,206 +1,125 @@ MEMORY { - UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0 - CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000 - AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000 - APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000 - APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000 - GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000 - AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000 - AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000 - RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000 - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000 } +__STACKSIZE__ = 1024; +__STACKSIZE_PROCESS__ = 0; +__HEAPSIZE__ = 128; SECTIONS { - __CM3_System_Control_Space_segment_start__ = 0xe000e000; - __CM3_System_Control_Space_segment_end__ = 0xe000f000; - __AHB_Peripherals_segment_start__ = 0x50000000; - __AHB_Peripherals_segment_end__ = 0x50200000; - __APB1_Peripherals_segment_start__ = 0x40080000; - __APB1_Peripherals_segment_end__ = 0x40100000; - __APB0_Peripherals_segment_start__ = 0x40000000; - __APB0_Peripherals_segment_end__ = 0x40080000; - __GPIO_segment_start__ = 0x2009c000; - __GPIO_segment_end__ = 0x200a0000; - __AHBSRAM1_segment_start__ = 0x20080000; - __AHBSRAM1_segment_end__ = 0x20084000; - __AHBSRAM0_segment_start__ = 0x2007c000; - __AHBSRAM0_segment_end__ = 0x20080000; - __RAM_segment_start__ = 0x10000000; - __RAM_segment_end__ = 0x10008000; - __FLASH_segment_start__ = 0x00000000; - __FLASH_segment_end__ = 0x00080000; - - __STACKSIZE__ = 1024; - __STACKSIZE_PROCESS__ = 0; - __STACKSIZE_IRQ__ = 0; - __STACKSIZE_FIQ__ = 0; - __STACKSIZE_SVC__ = 0; - __STACKSIZE_ABT__ = 0; - __STACKSIZE_UND__ = 0; - __HEAPSIZE__ = 128; - - __vectors_load_start__ = __FLASH_segment_start__; - .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__) - { - __vectors_start__ = .; - *(.vectors .vectors.*) - } - __vectors_end__ = __vectors_start__ + SIZEOF(.vectors); - - . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment"); - - __init_load_start__ = ALIGN(__vectors_end__ , 4); - .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4)) - { - __init_start__ = .; - *(.init .init.*) - } - __init_end__ = __init_start__ + SIZEOF(.init); - - . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment"); - - __text_load_start__ = ALIGN(__init_end__ , 4); - .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4)) + .vectors : { - __text_start__ = .; - *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table) - } - __text_end__ = __text_start__ + SIZEOF(.text); - - . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment"); - - __dtors_load_start__ = ALIGN(__text_end__ , 4); - .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4)) - { - __dtors_start__ = .; - KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } - __dtors_end__ = __dtors_start__ + SIZEOF(.dtors); - - . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment"); - - __ctors_load_start__ = ALIGN(__dtors_end__ , 4); - .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4)) - { - __ctors_start__ = .; - KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } - __ctors_end__ = __ctors_start__ + SIZEOF(.ctors); - - . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment"); + KEEP(*(.vectors .vectors.*)) + } > FLASH - __rodata_load_start__ = ALIGN(__ctors_end__ , 4); - .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4)) - { - __rodata_start__ = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - } - __rodata_end__ = __rodata_start__ + SIZEOF(.rodata); + .text : + { + *(.text*) - . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment"); + KEEP(*(.init)) + KEEP(*(.fini)) - __fast_load_start__ = ALIGN(__rodata_end__ , 4); - .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4)) - { - __fast_start__ = .; - *(.fast .fast.*) - } - __fast_end__ = __fast_start__ + SIZEOF(.fast); + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + __ctors_start__ = ALIGN(4); + *(SORT(.ctors.*)) + *(.ctors) + __ctors_end__ = ALIGN(4); - __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast); + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + __dtors_start__ = ALIGN(4); + *(SORT(.dtors.*)) + *(.dtors) + __dtors_end__ = ALIGN(4); - . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment"); + *(.rodata*) - .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) : - { - __fast_run_start__ = .; - . = MAX(__fast_run_start__ + SIZEOF(.fast), .); - } - __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run); + KEEP(*(.eh_frame*)) + } > FLASH - . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment"); + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH - __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4); - .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4)) - { - __data_start__ = .; - *(.data .data.* .gnu.linkonce.d.*) - } - __data_end__ = __data_start__ + SIZEOF(.data); + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; - __data_load_end__ = __data_load_start__ + SIZEOF(.data); + __data_load_start__ = ALIGN (4); - __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data); + .data : AT (__data_load_start__) + { + __data_start__ = .; - . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment"); + *(vtable) + *(.data*) - .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) : - { - __data_run_start__ = .; - . = MAX(__data_run_start__ + SIZEOF(.data), .); - } - __data_run_end__ = __data_run_start__ + SIZEOF(.data_run); + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); - . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment"); + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); - __bss_load_start__ = ALIGN(__data_run_end__ , 4); - .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4)) - { - __bss_start__ = .; - *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) - } - __bss_end__ = __bss_start__ + SIZEOF(.bss); + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); - . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment"); + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + + __data_end__ = .; - __non_init_load_start__ = ALIGN(__bss_end__ , 4); - .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4)) - { - __non_init_start__ = .; - *(.non_init .non_init.*) - } - __non_init_end__ = __non_init_start__ + SIZEOF(.non_init); + } > RAM - . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment"); + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; - __heap_load_start__ = ALIGN(__non_init_end__ , 4); - .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4)) - { - __heap_start__ = .; + } > RAM + + .heap (COPY): + { + __heap_start__ = ALIGN(4); *(.heap) - . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4); - } - __heap_end__ = __heap_start__ + SIZEOF(.heap); + . = ALIGN(. + __HEAPSIZE__, 4); + __heap_end__ = ALIGN(4); + } > RAM - . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment"); - - __stack_load_start__ = ALIGN(__heap_end__ , 4); - .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4)) + .stack ALIGN(4) (NOLOAD) : { - __stack_start__ = .; + __stack_start__ = ALIGN(4); *(.stack) - . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4); - } - __stack_end__ = __stack_start__ + SIZEOF(.stack); - - . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment"); - - __stack_process_load_start__ = ALIGN(__stack_end__ , 4); - .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4)) - { - __stack_process_start__ = .; - *(.stack_process) - . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4); - } - __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process); - - __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process); - - . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment"); + . = ALIGN(. + __STACKSIZE__, 4); + __stack_end__ = ALIGN(4); + } > RAM + __RAM_segment_used_end__ = .; } - diff --git a/ports/cortex_m4/gnu/inc/tx_port.h b/ports/cortex_m4/gnu/inc/tx_port.h index f1e25ab3..7d3cb280 100644 --- a/ports/cortex_m4/gnu/inc/tx_port.h +++ b/ports/cortex_m4/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/GNU */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GNU Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m4/gnu/src/tx_misra.S b/ports/cortex_m4/gnu/src/tx_misra.S index b03fdcd0..155512be 100644 --- a/ports/cortex_m4/gnu/src/tx_misra.S +++ b/ports/cortex_m4/gnu/src/tx_misra.S @@ -103,6 +103,14 @@ .global _tx_misra_vfp_touch #endif + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used /**************************************************************************/ /**************************************************************************/ @@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif: BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ .text .thumb_func _tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + BX LR // return @@ -237,20 +321,6 @@ _tx_misra_ulong_pointer_dif: /**************************************************************************/ /**************************************************************************/ /** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ /** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ /** UINT size); */ /** */ @@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add: .text .thumb_func _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR // return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -553,202 +620,6 @@ _tx_misra_always_true: BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR // return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - .text - .thumb_func -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_block_pool_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR // return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_event_flags_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_ulong_pointer_convert: - BX LR // return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_mutex_pointer_convert: - BX LR // return - - /**************************************************************************/ /**************************************************************************/ /** */ @@ -764,191 +635,6 @@ _tx_misra_status_get: BX LR // return -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_queue_pointer_convert: - BX LR // return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_semaphore_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_void_pointer_convert: - BX LR // return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_thread_pointer_convert: - BX LR // return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - .text - .thumb_func -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_const_char_to_char_pointer_convert: - BX LR // return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_thread_pointer_convert: - BX LR // return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_object_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_object_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_header_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_entry_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_entry_to_uchar_pointer_convert: - BX LR // return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_char_to_uchar_pointer_convert: - BX LR // return - - /***********************************************************************************************/ /***********************************************************************************************/ /** */ diff --git a/ports/cortex_m4/iar/CMakeLists.txt b/ports/cortex_m4/iar/CMakeLists.txt new file mode 100644 index 00000000..a524d79f --- /dev/null +++ b/ports/cortex_m4/iar/CMakeLists.txt @@ -0,0 +1,21 @@ + +target_sources(${PROJECT_NAME} + PRIVATE + # {{BEGIN_TARGET_SOURCES}} + ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S + # {{END_TARGET_SOURCES}} +) + +target_include_directories(${PROJECT_NAME} + PUBLIC + ${CMAKE_CURRENT_LIST_DIR}/inc +) diff --git a/ports/cortex_m4/iar/inc/tx_port.h b/ports/cortex_m4/iar/inc/tx_port.h index b27fa00f..93f0651a 100644 --- a/ports/cortex_m4/iar/inc/tx_port.h +++ b/ports/cortex_m4/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/IAR */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/IAR Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/IAR Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m4/iar/src/tx_misra.s b/ports/cortex_m4/iar/src/tx_misra.s index 2add69b3..c81c3e5c 100644 --- a/ports/cortex_m4/iar/src/tx_misra.s +++ b/ports/cortex_m4/iar/src/tx_misra.s @@ -102,6 +102,16 @@ PUBLIC _tx_misra_fpccr_get PUBLIC _tx_misra_vfp_touch #endif + + PUBLIC _tx_misra_event_flags_group_not_used + PUBLIC _tx_misra_event_flags_set_notify_not_used + PUBLIC _tx_misra_queue_not_used + PUBLIC _tx_misra_queue_send_notify_not_used + PUBLIC _tx_misra_semaphore_not_used + PUBLIC _tx_misra_semaphore_put_notify_not_used + PUBLIC _tx_misra_thread_entry_exit_notify_not_used + PUBLIC _tx_misra_thread_not_used + PUBLIC _tx_version_id @@ -115,7 +125,7 @@ _tx_version_id: DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H - DC8 65H, 61H, 64H, 58H, 20H, 35H, 2EH, 38H + DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H DC8 6EH, 74H, 20H, 2AH, 0 @@ -139,7 +149,7 @@ _tx_misra_memset: MOVS R1,R0 MOVS R0,R4 BL __aeabi_memset - POP {R4,PC} ;; return + POP {R4,PC} // return /**************************************************************************/ /**************************************************************************/ @@ -153,7 +163,7 @@ _tx_misra_memset: THUMB _tx_misra_uchar_pointer_add: ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -169,7 +179,7 @@ _tx_misra_uchar_pointer_add: _tx_misra_uchar_pointer_sub: RSBS R1,R1,#+0 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -184,21 +194,97 @@ _tx_misra_uchar_pointer_sub: THUMB _tx_misra_uchar_pointer_dif: SUBS R0,R0,R1 - BX LR ;; return + BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_pointer_to_ulong_convert: - BX LR ;; return +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return /**************************************************************************/ @@ -213,7 +299,7 @@ _tx_misra_pointer_to_ulong_convert: THUMB _tx_misra_ulong_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -230,7 +316,7 @@ _tx_misra_ulong_pointer_sub: MVNS R2,#+3 MULS R1,R2,R1 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -246,21 +332,7 @@ _tx_misra_ulong_pointer_sub: _tx_misra_ulong_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -299,7 +371,7 @@ _tx_misra_message_copy: STR R3,[R0, #+0] STR R4,[R1, #+0] POP {R4,R5} - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -316,7 +388,7 @@ _tx_misra_message_copy: _tx_misra_timer_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -332,7 +404,7 @@ _tx_misra_timer_pointer_dif: THUMB _tx_misra_timer_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -347,12 +419,9 @@ _tx_misra_timer_pointer_add: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR ;; return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -374,7 +443,7 @@ _tx_misra_thread_stack_check: CMP R4,#+0 BEQ.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+0] - LDR.N R2,??DataTable2 ;; 0x54485244 + LDR.N R2,??DataTable2 // 0x54485244 CMP R1,R2 BNE.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+8] @@ -412,7 +481,7 @@ _tx_misra_thread_stack_check: BL _tx_thread_interrupt_disable ??_tx_misra_thread_stack_check_0: BL _tx_thread_interrupt_restore - POP {R0,R4,R5,PC} ;; return + POP {R0,R4,R5,PC} // return #ifdef TX_ENABLE_EVENT_TRACE @@ -500,7 +569,7 @@ _tx_misra_trace_event_insert: LDR R0,[R0, #+0] STR R4,[R0, #+32] ??_tx_misra_trace_event_insert_0: - POP {R0,R4-R7,PC} ;; return + POP {R0,R4-R7,PC} // return SECTION `.text`:CODE:NOROOT(2) @@ -552,7 +621,7 @@ _tx_misra_trace_event_insert: THUMB _tx_misra_time_stamp_get: MOVS R0,#+0 - BX LR ;; return + BX LR // return #endif @@ -587,203 +656,7 @@ _tx_misra_time_stamp_get: THUMB _tx_misra_always_true: MOVS R0,#+1 - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_block_pool_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR ;; return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_event_flags_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_ulong_pointer_convert: - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_mutex_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -798,192 +671,7 @@ _tx_misra_void_to_mutex_pointer_convert: THUMB _tx_misra_status_get: MOVS R0,#+0 - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_queue_pointer_convert: - BX LR ;; return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_semaphore_pointer_convert: - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_void_pointer_convert: - BX LR ;; return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_thread_pointer_convert: - BX LR ;; return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_const_char_to_char_pointer_convert: - BX LR ;; return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_thread_pointer_convert: - BX LR ;; return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_object_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_object_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_header_pointer_convert: - BX LR ;; return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_entry_pointer_convert: - BX LR ;; return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_entry_to_uchar_pointer_convert: - BX LR ;; return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_char_to_uchar_pointer_convert: - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -998,7 +686,7 @@ _tx_misra_char_to_uchar_pointer_convert: THUMB _tx_misra_ipsr_get: MRS R0, IPSR - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -1013,7 +701,7 @@ _tx_misra_ipsr_get: THUMB _tx_misra_control_get: MRS R0, CONTROL - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -1028,7 +716,7 @@ _tx_misra_control_get: THUMB _tx_misra_control_set: MSR CONTROL, R0 - BX LR ;; return + BX LR // return #ifdef __ARMVFP__ @@ -1044,9 +732,9 @@ _tx_misra_control_set: SECTION `.text`:CODE:NOROOT(2) THUMB _tx_misra_fpccr_get: - LDR r0, =0xE000EF34 ; Build FPCCR address - LDR r0, [r0] ; Load FPCCR value - BX LR ;; return + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return /***********************************************************************************************/ @@ -1061,7 +749,7 @@ _tx_misra_fpccr_get: THUMB _tx_misra_vfp_touch: vmov.f32 s0, s0 - BX LR ;; return + BX LR // return #endif diff --git a/ports/cortex_m4/keil/inc/tx_port.h b/ports/cortex_m4/keil/inc/tx_port.h index 199c876a..ae7954aa 100644 --- a/ports/cortex_m4/keil/inc/tx_port.h +++ b/ports/cortex_m4/keil/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/Keil */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/Keil Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/Keil Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m55/ac6/CMakeLists.txt b/ports/cortex_m55/ac6/CMakeLists.txt new file mode 100644 index 00000000..5ad3b8e7 --- /dev/null +++ b/ports/cortex_m55/ac6/CMakeLists.txt @@ -0,0 +1,21 @@ +target_sources(${PROJECT_NAME} PRIVATE + ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c + ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S +) + +target_include_directories(${PROJECT_NAME} PUBLIC + inc +) diff --git a/ports/cortex_m55/ac6/inc/tx_port.h b/ports/cortex_m55/ac6/inc/tx_port.h index 2217150e..bda877e6 100644 --- a/ports/cortex_m55/ac6/inc/tx_port.h +++ b/ports/cortex_m55/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M55/AC6 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M55/AC6 Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M55/AC6 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m55/ac6/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m55/ac6/src/tx_thread_secure_stack_initialize.S index 58754797..18d3f158 100644 --- a/ports/cortex_m55/ac6/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m55/ac6/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M55/AC6 */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m55/gnu/inc/tx_port.h b/ports/cortex_m55/gnu/inc/tx_port.h index f99373f3..eb709b5a 100644 --- a/ports/cortex_m55/gnu/inc/tx_port.h +++ b/ports/cortex_m55/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M55/GNU */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M55/GNU Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M55/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m55/gnu/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m55/gnu/src/tx_thread_secure_stack_initialize.S index 89e4185a..e5bb784a 100644 --- a/ports/cortex_m55/gnu/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m55/gnu/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M55/GNU */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m55/iar/inc/tx_port.h b/ports/cortex_m55/iar/inc/tx_port.h index a2919d9b..cfafe1b5 100644 --- a/ports/cortex_m55/iar/inc/tx_port.h +++ b/ports/cortex_m55/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M55/IAR */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M55/IAR Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M55/IAR Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m55/iar/src/tx_thread_secure_stack_initialize.s b/ports/cortex_m55/iar/src/tx_thread_secure_stack_initialize.s index 4ad8c1ed..cc8e8c7b 100644 --- a/ports/cortex_m55/iar/src/tx_thread_secure_stack_initialize.s +++ b/ports/cortex_m55/iar/src/tx_thread_secure_stack_initialize.s @@ -27,7 +27,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M55/IAR */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -50,13 +50,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m7/ac5/inc/tx_port.h b/ports/cortex_m7/ac5/inc/tx_port.h index a0e3d194..7de2ee6d 100644 --- a/ports/cortex_m7/ac5/inc/tx_port.h +++ b/ports/cortex_m7/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/AC5 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC5 Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC5 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m7/ac6/inc/tx_port.h b/ports/cortex_m7/ac6/inc/tx_port.h index cfd833fa..302bbc7d 100644 --- a/ports/cortex_m7/ac6/inc/tx_port.h +++ b/ports/cortex_m7/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/AC6 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC6 Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC6 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m7/ac6/src/tx_misra.S b/ports/cortex_m7/ac6/src/tx_misra.S index b03fdcd0..155512be 100644 --- a/ports/cortex_m7/ac6/src/tx_misra.S +++ b/ports/cortex_m7/ac6/src/tx_misra.S @@ -103,6 +103,14 @@ .global _tx_misra_vfp_touch #endif + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used /**************************************************************************/ /**************************************************************************/ @@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif: BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ .text .thumb_func _tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + BX LR // return @@ -237,20 +321,6 @@ _tx_misra_ulong_pointer_dif: /**************************************************************************/ /**************************************************************************/ /** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ /** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ /** UINT size); */ /** */ @@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add: .text .thumb_func _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR // return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -553,202 +620,6 @@ _tx_misra_always_true: BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR // return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - .text - .thumb_func -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_block_pool_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR // return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_event_flags_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_ulong_pointer_convert: - BX LR // return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_mutex_pointer_convert: - BX LR // return - - /**************************************************************************/ /**************************************************************************/ /** */ @@ -764,191 +635,6 @@ _tx_misra_status_get: BX LR // return -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_queue_pointer_convert: - BX LR // return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_semaphore_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_void_pointer_convert: - BX LR // return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_thread_pointer_convert: - BX LR // return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - .text - .thumb_func -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_const_char_to_char_pointer_convert: - BX LR // return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_thread_pointer_convert: - BX LR // return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_object_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_object_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_header_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_entry_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_entry_to_uchar_pointer_convert: - BX LR // return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_char_to_uchar_pointer_convert: - BX LR // return - - /***********************************************************************************************/ /***********************************************************************************************/ /** */ diff --git a/ports/cortex_m7/gnu/example_build/build_threadx.bat b/ports/cortex_m7/gnu/example_build/build_threadx.bat index f0c995e7..3d92efd3 100644 --- a/ports/cortex_m7/gnu/example_build/build_threadx.bat +++ b/ports/cortex_m7/gnu/example_build/build_threadx.bat @@ -1,199 +1,198 @@ del tx.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb tx_initialize_low_level.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_stack_build.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_schedule.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_system_return.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_context_save.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_context_restore.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_interrupt_control.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_timer_interrupt.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_interrupt_control.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ../src/tx_thread_stack_build.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ../src/tx_thread_schedule.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ../src/tx_thread_system_return.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ../src/tx_thread_context_save.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ../src/tx_thread_context_restore.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ../src/tx_thread_interrupt_control.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb ../src/tx_timer_interrupt.S + +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_resume.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_shell_entry.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_sleep.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_analyze.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_suspend.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_preempt_check.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_resume.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_system_suspend.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_terminate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_time_slice_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_timeout.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_wait_abort.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_time_set.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_activate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_deactivate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_expiration_process.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_unfilter.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c + arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o -arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o diff --git a/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat b/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat index 0e58e963..52e836bc 100644 --- a/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat +++ b/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat @@ -1,7 +1,5 @@ -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb tx_simulator_startup.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb cortexm7_crt0.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb tx_initialize_low_level.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc sample_threadx.c -arm-none-eabi-ld -A cortex-m7 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm7_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libc.a -o sample_threadx.out -M > sample_threadx.map - - +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb cortexm7_vectors.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb cortexm7_crt0.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb tx_initialize_low_level.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc sample_threadx.c +arm-none-eabi-gcc -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm7_vectors.o cortexm7_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a diff --git a/ports/cortex_m3/gnu/example_build/cortexm3_crt0.s b/ports/cortex_m7/gnu/example_build/cortexm7_crt0.S index d4cb1636..4228fc11 100644 --- a/ports/cortex_m3/gnu/example_build/cortexm3_crt0.s +++ b/ports/cortex_m7/gnu/example_build/cortexm7_crt0.S @@ -1,45 +1,20 @@ - .global _start - .extern main - - + .syntax unified .section .init, "ax" .code 16 .align 2 .thumb_func - + .global _start _start: CPSID i ldr r1, =__stack_end__ mov sp, r1 - /* Copy initialised sections into RAM if required. */ ldr r0, =__data_load_start__ ldr r1, =__data_start__ ldr r2, =__data_end__ bl crt0_memory_copy - ldr r0, =__text_load_start__ - ldr r1, =__text_start__ - ldr r2, =__text_end__ - bl crt0_memory_copy - ldr r0, =__fast_load_start__ - ldr r1, =__fast_start__ - ldr r2, =__fast_end__ - bl crt0_memory_copy - ldr r0, =__ctors_load_start__ - ldr r1, =__ctors_start__ - ldr r2, =__ctors_end__ - bl crt0_memory_copy - ldr r0, =__dtors_load_start__ - ldr r1, =__dtors_start__ - ldr r2, =__dtors_end__ - bl crt0_memory_copy - ldr r0, =__rodata_load_start__ - ldr r1, =__rodata_start__ - ldr r2, =__rodata_end__ - bl crt0_memory_copy - /* Zero bss. */ ldr r0, =__bss_start__ @@ -47,7 +22,6 @@ _start: mov r2, #0 bl crt0_memory_set - /* Setup heap - not recommended for Threadx but here for compatibility reasons */ ldr r0, = __heap_start__ ldr r1, = __heap_end__ @@ -57,7 +31,6 @@ _start: add r0, r0, #4 str r1, [r0] - /* constructors in case of using C++ */ ldr r0, =__ctors_start__ ldr r1, =__ctors_end__ @@ -72,13 +45,11 @@ crt0_ctor_loop: b crt0_ctor_loop crt0_ctor_end: - /* Setup call frame for main() */ mov r0, #0 mov lr, r0 mov r12, sp - start: /* Jump to main() */ mov r0, #0 @@ -88,28 +59,22 @@ start: /* when main returns, loop forever. */ crt0_exit_loop: b crt0_exit_loop - - /* Startup helper functions. */ - crt0_memory_copy: cmp r0, r1 beq memory_copy_done - sub r2, r2, r1 - beq memory_copy_done memory_copy_loop: ldrb r3, [r0] add r0, r0, #1 strb r3, [r1] add r1, r1, #1 - sub r2, r2, #1 + cmp r1, r2 bne memory_copy_loop memory_copy_done: bx lr - crt0_memory_set: cmp r0, r1 beq memory_set_done @@ -119,7 +84,6 @@ crt0_memory_set: memory_set_done: bx lr - /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ .section .stack, "wa", %nobits .section .stack_process, "wa", %nobits diff --git a/ports/cortex_m0/gnu/example_build/tx_vectors.s b/ports/cortex_m7/gnu/example_build/cortexm7_vectors.S index 55395cd1..6ae558e4 100644 --- a/ports/cortex_m0/gnu/example_build/tx_vectors.s +++ b/ports/cortex_m7/gnu/example_build/cortexm7_vectors.S @@ -1,5 +1,3 @@ - - .global reset_handler .global __tx_NMIHandler @@ -9,8 +7,6 @@ .global __tx_PendSVHandler .global __tx_SysTickHandler .global __tx_BadHandler - .global __tx_HardfaultHandler - .syntax unified .section .vectors, "ax" @@ -30,7 +26,7 @@ _vectors: .word 0 // Reserved .word 0 // Reserved .word 0 // Reserved - .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // + .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // .word __tx_DBGHandler .word 0 // Reserved .word __tx_PendSVHandler @@ -71,32 +67,11 @@ _vectors: .word __tx_BadHandler .word __tx_BadHandler - - - .section .init, "ax" - .thumb_func + .section .init, "ax" + .thumb_func reset_handler: - -// low level hardware config, such as PLL setup goes here - + // low level hardware config, such as PLL setup goes here b _start - .text 32 - .align 4 - .syntax unified - - -__tx_NMIHandler: - b __tx_NMIHandler - -__tx_BadHandler: - b __tx_BadHandler - -__tx_DBGHandler: - b __tx_DBGHandler - -__tx_HardfaultHandler: - b __tx_HardfaultHandler - diff --git a/ports/cortex_m7/gnu/example_build/sample_threadx.ld b/ports/cortex_m7/gnu/example_build/sample_threadx.ld index 28f203fd..c65a1346 100644 --- a/ports/cortex_m7/gnu/example_build/sample_threadx.ld +++ b/ports/cortex_m7/gnu/example_build/sample_threadx.ld @@ -1,206 +1,125 @@ MEMORY { - UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0 - CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000 - AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000 - APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000 - APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000 - GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000 - AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000 - AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000 - RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000 - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000 } +__STACKSIZE__ = 1024; +__STACKSIZE_PROCESS__ = 0; +__HEAPSIZE__ = 128; SECTIONS { - __CM3_System_Control_Space_segment_start__ = 0xe000e000; - __CM3_System_Control_Space_segment_end__ = 0xe000f000; - __AHB_Peripherals_segment_start__ = 0x50000000; - __AHB_Peripherals_segment_end__ = 0x50200000; - __APB1_Peripherals_segment_start__ = 0x40080000; - __APB1_Peripherals_segment_end__ = 0x40100000; - __APB0_Peripherals_segment_start__ = 0x40000000; - __APB0_Peripherals_segment_end__ = 0x40080000; - __GPIO_segment_start__ = 0x2009c000; - __GPIO_segment_end__ = 0x200a0000; - __AHBSRAM1_segment_start__ = 0x20080000; - __AHBSRAM1_segment_end__ = 0x20084000; - __AHBSRAM0_segment_start__ = 0x2007c000; - __AHBSRAM0_segment_end__ = 0x20080000; - __RAM_segment_start__ = 0x10000000; - __RAM_segment_end__ = 0x10008000; - __FLASH_segment_start__ = 0x00000000; - __FLASH_segment_end__ = 0x00080000; - - __STACKSIZE__ = 1024; - __STACKSIZE_PROCESS__ = 0; - __STACKSIZE_IRQ__ = 0; - __STACKSIZE_FIQ__ = 0; - __STACKSIZE_SVC__ = 0; - __STACKSIZE_ABT__ = 0; - __STACKSIZE_UND__ = 0; - __HEAPSIZE__ = 128; - - __vectors_load_start__ = __FLASH_segment_start__; - .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__) - { - __vectors_start__ = .; - *(.vectors .vectors.*) - } - __vectors_end__ = __vectors_start__ + SIZEOF(.vectors); - - . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment"); - - __init_load_start__ = ALIGN(__vectors_end__ , 4); - .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4)) - { - __init_start__ = .; - *(.init .init.*) - } - __init_end__ = __init_start__ + SIZEOF(.init); - - . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment"); - - __text_load_start__ = ALIGN(__init_end__ , 4); - .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4)) + .vectors : { - __text_start__ = .; - *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table) - } - __text_end__ = __text_start__ + SIZEOF(.text); - - . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment"); - - __dtors_load_start__ = ALIGN(__text_end__ , 4); - .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4)) - { - __dtors_start__ = .; - KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } - __dtors_end__ = __dtors_start__ + SIZEOF(.dtors); - - . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment"); - - __ctors_load_start__ = ALIGN(__dtors_end__ , 4); - .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4)) - { - __ctors_start__ = .; - KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } - __ctors_end__ = __ctors_start__ + SIZEOF(.ctors); - - . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment"); + KEEP(*(.vectors .vectors.*)) + } > FLASH - __rodata_load_start__ = ALIGN(__ctors_end__ , 4); - .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4)) - { - __rodata_start__ = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - } - __rodata_end__ = __rodata_start__ + SIZEOF(.rodata); + .text : + { + *(.text*) - . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment"); + KEEP(*(.init)) + KEEP(*(.fini)) - __fast_load_start__ = ALIGN(__rodata_end__ , 4); - .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4)) - { - __fast_start__ = .; - *(.fast .fast.*) - } - __fast_end__ = __fast_start__ + SIZEOF(.fast); + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + __ctors_start__ = ALIGN(4); + *(SORT(.ctors.*)) + *(.ctors) + __ctors_end__ = ALIGN(4); - __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast); + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + __dtors_start__ = ALIGN(4); + *(SORT(.dtors.*)) + *(.dtors) + __dtors_end__ = ALIGN(4); - . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment"); + *(.rodata*) - .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) : - { - __fast_run_start__ = .; - . = MAX(__fast_run_start__ + SIZEOF(.fast), .); - } - __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run); + KEEP(*(.eh_frame*)) + } > FLASH - . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment"); + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH - __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4); - .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4)) - { - __data_start__ = .; - *(.data .data.* .gnu.linkonce.d.*) - } - __data_end__ = __data_start__ + SIZEOF(.data); + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; - __data_load_end__ = __data_load_start__ + SIZEOF(.data); + __data_load_start__ = ALIGN (4); - __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data); + .data : AT (__data_load_start__) + { + __data_start__ = .; - . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment"); + *(vtable) + *(.data*) - .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) : - { - __data_run_start__ = .; - . = MAX(__data_run_start__ + SIZEOF(.data), .); - } - __data_run_end__ = __data_run_start__ + SIZEOF(.data_run); + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); - . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment"); + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); - __bss_load_start__ = ALIGN(__data_run_end__ , 4); - .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4)) - { - __bss_start__ = .; - *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) - } - __bss_end__ = __bss_start__ + SIZEOF(.bss); + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); - . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment"); + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + + __data_end__ = .; - __non_init_load_start__ = ALIGN(__bss_end__ , 4); - .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4)) - { - __non_init_start__ = .; - *(.non_init .non_init.*) - } - __non_init_end__ = __non_init_start__ + SIZEOF(.non_init); + } > RAM - . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment"); + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; - __heap_load_start__ = ALIGN(__non_init_end__ , 4); - .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4)) - { - __heap_start__ = .; + } > RAM + + .heap (COPY): + { + __heap_start__ = ALIGN(4); *(.heap) - . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4); - } - __heap_end__ = __heap_start__ + SIZEOF(.heap); + . = ALIGN(. + __HEAPSIZE__, 4); + __heap_end__ = ALIGN(4); + } > RAM - . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment"); - - __stack_load_start__ = ALIGN(__heap_end__ , 4); - .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4)) + .stack ALIGN(4) (NOLOAD) : { - __stack_start__ = .; + __stack_start__ = ALIGN(4); *(.stack) - . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4); - } - __stack_end__ = __stack_start__ + SIZEOF(.stack); - - . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment"); - - __stack_process_load_start__ = ALIGN(__stack_end__ , 4); - .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4)) - { - __stack_process_start__ = .; - *(.stack_process) - . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4); - } - __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process); - - __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process); - - . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment"); + . = ALIGN(. + __STACKSIZE__, 4); + __stack_end__ = ALIGN(4); + } > RAM + __RAM_segment_used_end__ = .; } - diff --git a/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S b/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S index 85e612a6..c84822e6 100644 --- a/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S +++ b/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S @@ -1,226 +1,201 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Initialize */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ -@ -@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Initialize */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .global _tx_thread_system_stack_ptr .global _tx_initialize_unused_memory .global __RAM_segment_used_end__ .global _tx_timer_interrupt .global __main - .global __tx_SVCallHandler - .global __tx_PendSVHandler .global _vectors - .global __tx_NMIHandler @ NMI - .global __tx_BadHandler @ HardFault - .global __tx_SVCallHandler @ SVCall - .global __tx_DBGHandler @ Monitor - .global __tx_PendSVHandler @ PendSV - .global __tx_SysTickHandler @ SysTick - .global __tx_IntHandler @ Int 0 -@ -@ + .global __tx_NMIHandler // NMI + .global __tx_BadHandler // HardFault + .global __tx_SVCallHandler // SVCall + .global __tx_DBGHandler // Monitor + .global __tx_PendSVHandler // PendSV + .global __tx_SysTickHandler // SysTick + .global __tx_IntHandler // Int 0 + SYSTEM_CLOCK = 6000000 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) .text 32 .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_initialize_low_level Cortex-M7/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function is responsible for any low-level processor */ -@/* initialization, including setting up interrupt vectors, setting */ -@/* up a periodic timer interrupt source, saving the system stack */ -@/* pointer for use in ISR processing later, and finding the first */ -@/* available RAM memory address for tx_application_define. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* _tx_initialize_kernel_enter ThreadX entry function */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 05-19-2020 William E. Lamie Initial Version 6.0 */ -@/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */ -@/* GNU assembly comment, clean */ -@/* up whitespace, resulting */ -@/* in version 6.1 */ -@/* */ -@/**************************************************************************/ -@VOID _tx_initialize_low_level(VOID) -@{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-M7/GNU */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 William E. Lamie Initial Version 6.0 */ +/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */ +/* GNU assembly comment, clean */ +/* up whitespace, resulting */ +/* in version 6.1 */ +/* */ +/**************************************************************************/ +// VOID _tx_initialize_low_level(VOID) +// { .global _tx_initialize_low_level .thumb_func _tx_initialize_low_level: -@ -@ /* Disable interrupts during ThreadX initialization. */ -@ + + /* Disable interrupts during ThreadX initialization. */ CPSID i -@ -@ /* Set base of available memory to end of non-initialised RAM area. */ -@ - LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer - LDR r1, =__RAM_segment_used_end__ @ Build first free address - ADD r1, r1, #4 @ - STR r1, [r0] @ Setup first unused memory pointer -@ -@ /* Setup Vector Table Offset Register. */ -@ - MOV r0, #0xE000E000 @ Build address of NVIC registers - LDR r1, =_vectors @ Pickup address of vector table - STR r1, [r0, #0xD08] @ Set vector table address -@ -@ /* Set system stack pointer from vector value. */ -@ - LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer - LDR r1, =_vectors @ Pickup address of vector table - LDR r1, [r1] @ Pickup reset stack pointer - STR r1, [r0] @ Save system stack pointer -@ -@ /* Enable the cycle count register. */ -@ - LDR r0, =0xE0001000 @ Build address of DWT register - LDR r1, [r0] @ Pickup the current value - ORR r1, r1, #1 @ Set the CYCCNTENA bit - STR r1, [r0] @ Enable the cycle count register -@ -@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ -@ - MOV r0, #0xE000E000 @ Build address of NVIC registers + + /* Set base of available memory to end of non-initialised RAM area. */ + LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer + LDR r1, =__RAM_segment_used_end__ // Build first free address + ADD r1, r1, #4 // + STR r1, [r0] // Setup first unused memory pointer + + /* Setup Vector Table Offset Register. */ + MOV r0, #0xE000E000 // Build address of NVIC registers + LDR r1, =_vectors // Pickup address of vector table + STR r1, [r0, #0xD08] // Set vector table address + + /* Set system stack pointer from vector value. */ + LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer + LDR r1, =_vectors // Pickup address of vector table + LDR r1, [r1] // Pickup reset stack pointer + STR r1, [r0] // Save system stack pointer + + /* Enable the cycle count register. */ + LDR r0, =0xE0001000 // Build address of DWT register + LDR r1, [r0] // Pickup the current value + ORR r1, r1, #1 // Set the CYCCNTENA bit + STR r1, [r0] // Enable the cycle count register + + /* Configure SysTick. */ + MOV r0, #0xE000E000 // Build address of NVIC registers LDR r1, =SYSTICK_CYCLES - STR r1, [r0, #0x14] @ Setup SysTick Reload Value - MOV r1, #0x7 @ Build SysTick Control Enable Value - STR r1, [r0, #0x10] @ Setup SysTick Control -@ -@ /* Configure handler priorities. */ -@ - LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM - STR r1, [r0, #0xD18] @ Setup System Handlers 4-7 Priority Registers + STR r1, [r0, #0x14] // Setup SysTick Reload Value + MOV r1, #0x7 // Build SysTick Control Enable Value + STR r1, [r0, #0x10] // Setup SysTick Control - LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv - STR r1, [r0, #0xD1C] @ Setup System Handlers 8-11 Priority Registers - @ Note: SVC must be lowest priority, which is 0xFF + /* Configure handler priorities. */ + LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM + STR r1, [r0, #0xD18] // Setup System Handlers 4-7 Priority Registers + LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv + STR r1, [r0, #0xD1C] // Setup System Handlers 8-11 Priority Registers + // Note: SVC must be lowest priority, which is 0xFF + LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM + STR r1, [r0, #0xD20] // Setup System Handlers 12-15 Priority Registers + // Note: PnSV must be lowest priority, which is 0xFF - LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM - STR r1, [r0, #0xD20] @ Setup System Handlers 12-15 Priority Registers - @ Note: PnSV must be lowest priority, which is 0xFF -@ -@ /* Return to caller. */ -@ + /* Return to caller. */ BX lr -@} -@ +// } -@/* Define shells for each of the unused vectors. */ -@ +/* Define shells for each of the unused vectors. */ .global __tx_BadHandler .thumb_func __tx_BadHandler: B __tx_BadHandler -@ /* added to catch the hardfault */ - +/* added to catch the hardfault */ .global __tx_HardfaultHandler .thumb_func __tx_HardfaultHandler: B __tx_HardfaultHandler - -@ /* added to catch the SVC */ - +/* added to catch the SVC */ .global __tx_SVCallHandler .thumb_func __tx_SVCallHandler: B __tx_SVCallHandler - -@ /* Generic interrupt handler template */ +/* Generic interrupt handler template */ .global __tx_IntHandler .thumb_func __tx_IntHandler: -@ VOID InterruptHandler (VOID) -@ { +// VOID InterruptHandler (VOID) +// { PUSH {r0, lr} #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_enter @ Call the ISR enter function + BL _tx_execution_isr_enter // Call the ISR enter function #endif - -@ /* Do interrupt handler work here */ -@ /* BL <your C Function>.... */ - + /* Do interrupt handler work here */ + /* BL <your C Function>.... */ #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_exit @ Call the ISR exit function + BL _tx_execution_isr_exit // Call the ISR exit function #endif POP {r0, lr} BX LR -@ } +// } -@ /* System Tick timer interrupt handler */ +/* System Tick timer interrupt handler */ .global __tx_SysTickHandler .global SysTick_Handler .thumb_func __tx_SysTickHandler: .thumb_func SysTick_Handler: -@ VOID TimerInterruptHandler (VOID) -@ { -@ +// VOID SysTick_Handler (VOID) +// { PUSH {r0, lr} #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_enter @ Call the ISR enter function + BL _tx_execution_isr_enter // Call the ISR enter function #endif BL _tx_timer_interrupt #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_exit @ Call the ISR exit function + BL _tx_execution_isr_exit // Call the ISR exit function #endif POP {r0, lr} - BX LR -@ } - + BX lr +// } -@ /* NMI, DBG handlers */ +/* NMI, DBG handlers */ .global __tx_NMIHandler .thumb_func __tx_NMIHandler: diff --git a/ports/cortex_m7/gnu/inc/tx_port.h b/ports/cortex_m7/gnu/inc/tx_port.h index 9a88b1d8..7d14ac82 100644 --- a/ports/cortex_m7/gnu/inc/tx_port.h +++ b/ports/cortex_m7/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/GNU */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m7/gnu/src/tx_misra.S b/ports/cortex_m7/gnu/src/tx_misra.S index b03fdcd0..155512be 100644 --- a/ports/cortex_m7/gnu/src/tx_misra.S +++ b/ports/cortex_m7/gnu/src/tx_misra.S @@ -103,6 +103,14 @@ .global _tx_misra_vfp_touch #endif + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used /**************************************************************************/ /**************************************************************************/ @@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif: BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ .text .thumb_func _tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + BX LR // return @@ -237,20 +321,6 @@ _tx_misra_ulong_pointer_dif: /**************************************************************************/ /**************************************************************************/ /** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ /** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ /** UINT size); */ /** */ @@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add: .text .thumb_func _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR // return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -553,202 +620,6 @@ _tx_misra_always_true: BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR // return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - .text - .thumb_func -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_block_pool_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR // return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_event_flags_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_ulong_pointer_convert: - BX LR // return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_mutex_pointer_convert: - BX LR // return - - /**************************************************************************/ /**************************************************************************/ /** */ @@ -764,191 +635,6 @@ _tx_misra_status_get: BX LR // return -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_queue_pointer_convert: - BX LR // return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_semaphore_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_void_pointer_convert: - BX LR // return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_thread_pointer_convert: - BX LR // return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - .text - .thumb_func -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_const_char_to_char_pointer_convert: - BX LR // return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_thread_pointer_convert: - BX LR // return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_object_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_object_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_header_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_entry_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_entry_to_uchar_pointer_convert: - BX LR // return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_char_to_uchar_pointer_convert: - BX LR // return - - /***********************************************************************************************/ /***********************************************************************************************/ /** */ diff --git a/ports/cortex_m7/iar/CMakeLists.txt b/ports/cortex_m7/iar/CMakeLists.txt new file mode 100644 index 00000000..a524d79f --- /dev/null +++ b/ports/cortex_m7/iar/CMakeLists.txt @@ -0,0 +1,21 @@ + +target_sources(${PROJECT_NAME} + PRIVATE + # {{BEGIN_TARGET_SOURCES}} + ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S + # {{END_TARGET_SOURCES}} +) + +target_include_directories(${PROJECT_NAME} + PUBLIC + ${CMAKE_CURRENT_LIST_DIR}/inc +) diff --git a/ports/cortex_m7/iar/inc/tx_port.h b/ports/cortex_m7/iar/inc/tx_port.h index f11ff9a9..191ad569 100644 --- a/ports/cortex_m7/iar/inc/tx_port.h +++ b/ports/cortex_m7/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/IAR */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/IAR Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/IAR Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m7/iar/src/tx_misra.s b/ports/cortex_m7/iar/src/tx_misra.s index 2add69b3..c81c3e5c 100644 --- a/ports/cortex_m7/iar/src/tx_misra.s +++ b/ports/cortex_m7/iar/src/tx_misra.s @@ -102,6 +102,16 @@ PUBLIC _tx_misra_fpccr_get PUBLIC _tx_misra_vfp_touch #endif + + PUBLIC _tx_misra_event_flags_group_not_used + PUBLIC _tx_misra_event_flags_set_notify_not_used + PUBLIC _tx_misra_queue_not_used + PUBLIC _tx_misra_queue_send_notify_not_used + PUBLIC _tx_misra_semaphore_not_used + PUBLIC _tx_misra_semaphore_put_notify_not_used + PUBLIC _tx_misra_thread_entry_exit_notify_not_used + PUBLIC _tx_misra_thread_not_used + PUBLIC _tx_version_id @@ -115,7 +125,7 @@ _tx_version_id: DC8 45H, 78H, 70H, 72H, 65H, 73H, 73H, 20H DC8 4CH, 6FH, 67H, 69H, 63H, 20H, 49H, 6EH DC8 63H, 2EH, 20H, 2AH, 20H, 54H, 68H, 72H - DC8 65H, 61H, 64H, 58H, 20H, 35H, 2EH, 38H + DC8 65H, 61H, 64H, 58H, 20H, 36H, 2EH, 31H DC8 20H, 4DH, 49H, 53H, 52H, 41H, 20H, 43H DC8 20H, 43H, 6FH, 6DH, 70H, 6CH, 69H, 61H DC8 6EH, 74H, 20H, 2AH, 0 @@ -139,7 +149,7 @@ _tx_misra_memset: MOVS R1,R0 MOVS R0,R4 BL __aeabi_memset - POP {R4,PC} ;; return + POP {R4,PC} // return /**************************************************************************/ /**************************************************************************/ @@ -153,7 +163,7 @@ _tx_misra_memset: THUMB _tx_misra_uchar_pointer_add: ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -169,7 +179,7 @@ _tx_misra_uchar_pointer_add: _tx_misra_uchar_pointer_sub: RSBS R1,R1,#+0 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -184,21 +194,97 @@ _tx_misra_uchar_pointer_sub: THUMB _tx_misra_uchar_pointer_dif: SUBS R0,R0,R1 - BX LR ;; return + BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_pointer_to_ulong_convert: - BX LR ;; return +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + + BX LR // return /**************************************************************************/ @@ -213,7 +299,7 @@ _tx_misra_pointer_to_ulong_convert: THUMB _tx_misra_ulong_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -230,7 +316,7 @@ _tx_misra_ulong_pointer_sub: MVNS R2,#+3 MULS R1,R2,R1 ADD R0,R0,R1 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -246,21 +332,7 @@ _tx_misra_ulong_pointer_sub: _tx_misra_ulong_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -299,7 +371,7 @@ _tx_misra_message_copy: STR R3,[R0, #+0] STR R4,[R1, #+0] POP {R4,R5} - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -316,7 +388,7 @@ _tx_misra_message_copy: _tx_misra_timer_pointer_dif: SUBS R0,R0,R1 ASRS R0,R0,#+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -332,7 +404,7 @@ _tx_misra_timer_pointer_dif: THUMB _tx_misra_timer_pointer_add: ADD R0,R0,R1, LSL #+2 - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -347,12 +419,9 @@ _tx_misra_timer_pointer_add: SECTION `.text`:CODE:NOROOT(1) THUMB _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR ;; return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -374,7 +443,7 @@ _tx_misra_thread_stack_check: CMP R4,#+0 BEQ.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+0] - LDR.N R2,??DataTable2 ;; 0x54485244 + LDR.N R2,??DataTable2 // 0x54485244 CMP R1,R2 BNE.N ??_tx_misra_thread_stack_check_0 LDR R1,[R4, #+8] @@ -412,7 +481,7 @@ _tx_misra_thread_stack_check: BL _tx_thread_interrupt_disable ??_tx_misra_thread_stack_check_0: BL _tx_thread_interrupt_restore - POP {R0,R4,R5,PC} ;; return + POP {R0,R4,R5,PC} // return #ifdef TX_ENABLE_EVENT_TRACE @@ -500,7 +569,7 @@ _tx_misra_trace_event_insert: LDR R0,[R0, #+0] STR R4,[R0, #+32] ??_tx_misra_trace_event_insert_0: - POP {R0,R4-R7,PC} ;; return + POP {R0,R4-R7,PC} // return SECTION `.text`:CODE:NOROOT(2) @@ -552,7 +621,7 @@ _tx_misra_trace_event_insert: THUMB _tx_misra_time_stamp_get: MOVS R0,#+0 - BX LR ;; return + BX LR // return #endif @@ -587,203 +656,7 @@ _tx_misra_time_stamp_get: THUMB _tx_misra_always_true: MOVS R0,#+1 - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_block_pool_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR ;; return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR ;; return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR ;; return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_event_flags_pointer_convert: - BX LR ;; return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_ulong_pointer_convert: - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_mutex_pointer_convert: - BX LR ;; return + BX LR // return /**************************************************************************/ @@ -798,192 +671,7 @@ _tx_misra_void_to_mutex_pointer_convert: THUMB _tx_misra_status_get: MOVS R0,#+0 - BX LR ;; return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_queue_pointer_convert: - BX LR ;; return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_semaphore_pointer_convert: - BX LR ;; return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_void_pointer_convert: - BX LR ;; return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_ulong_to_thread_pointer_convert: - BX LR ;; return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR ;; return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_const_char_to_char_pointer_convert: - BX LR ;; return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_void_to_thread_pointer_convert: - BX LR ;; return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_object_to_uchar_pointer_convert: - BX LR ;; return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_object_pointer_convert: - BX LR ;; return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_header_pointer_convert: - BX LR ;; return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_uchar_to_entry_pointer_convert: - BX LR ;; return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_entry_to_uchar_pointer_convert: - BX LR ;; return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - SECTION `.text`:CODE:NOROOT(1) - THUMB -_tx_misra_char_to_uchar_pointer_convert: - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -998,7 +686,7 @@ _tx_misra_char_to_uchar_pointer_convert: THUMB _tx_misra_ipsr_get: MRS R0, IPSR - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -1013,7 +701,7 @@ _tx_misra_ipsr_get: THUMB _tx_misra_control_get: MRS R0, CONTROL - BX LR ;; return + BX LR // return /***********************************************************************************************/ @@ -1028,7 +716,7 @@ _tx_misra_control_get: THUMB _tx_misra_control_set: MSR CONTROL, R0 - BX LR ;; return + BX LR // return #ifdef __ARMVFP__ @@ -1044,9 +732,9 @@ _tx_misra_control_set: SECTION `.text`:CODE:NOROOT(2) THUMB _tx_misra_fpccr_get: - LDR r0, =0xE000EF34 ; Build FPCCR address - LDR r0, [r0] ; Load FPCCR value - BX LR ;; return + LDR r0, =0xE000EF34 // Build FPCCR address + LDR r0, [r0] // Load FPCCR value + BX LR // return /***********************************************************************************************/ @@ -1061,7 +749,7 @@ _tx_misra_fpccr_get: THUMB _tx_misra_vfp_touch: vmov.f32 s0, s0 - BX LR ;; return + BX LR // return #endif diff --git a/ports/cortex_m85/ac6/CMakeLists.txt b/ports/cortex_m85/ac6/CMakeLists.txt new file mode 100644 index 00000000..5ad3b8e7 --- /dev/null +++ b/ports/cortex_m85/ac6/CMakeLists.txt @@ -0,0 +1,21 @@ +target_sources(${PROJECT_NAME} PRIVATE + ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c + ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S +) + +target_include_directories(${PROJECT_NAME} PUBLIC + inc +) diff --git a/ports/cortex_m85/ac6/inc/tx_port.h b/ports/cortex_m85/ac6/inc/tx_port.h index 0a556b70..91348fb4 100644 --- a/ports/cortex_m85/ac6/inc/tx_port.h +++ b/ports/cortex_m85/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M85/AC6 */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M85/AC6 Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M85/AC6 Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m85/ac6/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m85/ac6/src/tx_thread_secure_stack_initialize.S index 6a24afac..0509420c 100644 --- a/ports/cortex_m85/ac6/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m85/ac6/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M85/AC6 */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m85/gnu/inc/tx_port.h b/ports/cortex_m85/gnu/inc/tx_port.h index 0cf16cd5..69cdc5f6 100644 --- a/ports/cortex_m85/gnu/inc/tx_port.h +++ b/ports/cortex_m85/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M85/GNU */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M85/GNU Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M85/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m85/gnu/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m85/gnu/src/tx_thread_secure_stack_initialize.S index f84f6029..8afc3bcc 100644 --- a/ports/cortex_m85/gnu/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m85/gnu/src/tx_thread_secure_stack_initialize.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M85/GNU */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -49,13 +49,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_m85/iar/inc/tx_port.h b/ports/cortex_m85/iar/inc/tx_port.h index d02272c7..1161d44b 100644 --- a/ports/cortex_m85/iar/inc/tx_port.h +++ b/ports/cortex_m85/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M85/IAR */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -61,16 +61,21 @@ /* added symbol to enable */ /* stack error handler, */ /* resulting in version 6.1.7 */ -/* 10-15-2021 Scott Larson Modified comment(s), improved */ +/* 10-15-2021 Scott Larson Modified comment(s), improved */ /* stack check error handling, */ /* resulting in version 6.1.9 */ -/* 01-31-2022 Scott Larson Modified comment(s), unified */ +/* 01-31-2022 Scott Larson Modified comment(s), unified */ /* this file across compilers, */ /* fixed predefined macro, */ /* resulting in version 6.1.10 */ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -188,6 +193,12 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -524,7 +535,7 @@ ULONG _tx_misra_ipsr_get(VOID); #if !defined(TX_SINGLE_MODE_SECURE) && !defined(TX_SINGLE_MODE_NON_SECURE) /* Initialize secure stacks for threads calling secure functions. */ extern void _tx_thread_secure_stack_initialize(void); -#define TX_INITIALIZE_KERNEL_ENTER_EXTENSION _tx_thread_secure_stack_initialize(); +#define TX_PORT_SPECIFIC_PRE_INITIALIZATION _tx_thread_secure_stack_initialize(); #endif /* Define the macro to ensure _tx_thread_preempt_disable is set early in initialization in order to @@ -637,7 +648,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M85/IAR Version 6.1.10 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M85/IAR Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m85/iar/src/tx_thread_secure_stack_initialize.s b/ports/cortex_m85/iar/src/tx_thread_secure_stack_initialize.s index de2df1c1..20f51ad6 100644 --- a/ports/cortex_m85/iar/src/tx_thread_secure_stack_initialize.s +++ b/ports/cortex_m85/iar/src/tx_thread_secure_stack_initialize.s @@ -27,7 +27,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_secure_stack_initialize Cortex-M85/IAR */ -/* 6.1.7 */ +/* 6.1.12 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -50,13 +50,17 @@ /* */ /* CALLED BY */ /* */ -/* TX_INITIALIZE_KERNEL_ENTER_EXTENSION */ +/* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ /* RELEASE HISTORY */ /* */ /* DATE NAME DESCRIPTION */ /* */ /* 06-02-2021 Scott Larson Initial Version 6.1.7 */ +/* 07-29-2022 Scott Larson Modified comments and changed */ +/* secure stack initialization */ +/* macro to port-specific, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) diff --git a/ports/cortex_r4/gnu/inc/tx_port.h b/ports/cortex_r4/gnu/inc/tx_port.h index 8d84beac..c69fa298 100644 --- a/ports/cortex_r4/gnu/inc/tx_port.h +++ b/ports/cortex_r4/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R4/GNU */ -/* 6.1.6 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,10 +47,13 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -282,7 +285,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_r5/ac6/inc/tx_port.h b/ports/cortex_r5/ac6/inc/tx_port.h index 213773d0..7eccfe75 100644 --- a/ports/cortex_r5/ac6/inc/tx_port.h +++ b/ports/cortex_r5/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R5/AC6 */ -/* 6.1.6 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,10 +47,13 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -282,7 +285,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); diff --git a/ports/cortex_r5/gnu/inc/tx_port.h b/ports/cortex_r5/gnu/inc/tx_port.h index 7de3df7a..d477c188 100644 --- a/ports/cortex_r5/gnu/inc/tx_port.h +++ b/ports/cortex_r5/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R5/GNU */ -/* 6.1.6 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -47,10 +47,13 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ /* macro definition, */ /* resulting in version 6.1.6 */ +/* 07-29-2022 Scott Larson Updated comments, removed */ +/* unneeded temp variable, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -282,7 +285,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #else -#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); |