diff options
| author | Yuxin Zhou <[email protected]> | 2021-04-03 01:03:21 +0000 |
|---|---|---|
| committer | Yuxin Zhou <[email protected]> | 2021-04-03 01:03:21 +0000 |
| commit | b12bd44faaca46dbad4b06cb93a8669c6e36e02a (patch) | |
| tree | 033f9c24f940f39d8c4b1b40fcd0d388e80bf317 /ports | |
| parent | 6ffaf848a06ce9dbf8948254ed806ed94ae58305 (diff) | |
Release 6.1.6v6.1.6_rel
Diffstat (limited to 'ports')
170 files changed, 1252 insertions, 936 deletions
diff --git a/ports/arc_em/metaware/inc/tx_port.h b/ports/arc_em/metaware/inc/tx_port.h index 2fee779d..64b14664 100644 --- a/ports/arc_em/metaware/inc/tx_port.h +++ b/ports/arc_em/metaware/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARCv2_EM/MetaWare */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -288,7 +291,7 @@ ULONG _tx_misra_time_stamp_get(VOID); macros. */ -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save; #define TX_DISABLE interrupt_save = _clri(); #define TX_RESTORE _seti(interrupt_save); @@ -308,7 +311,7 @@ ULONG _tx_misra_time_stamp_get(VOID); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARCv2_EM/MetaWare Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARCv2_EM/MetaWare Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/arc_em/metaware/readme_threadx.txt b/ports/arc_em/metaware/readme_threadx.txt index d7791171..276c9867 100644 --- a/ports/arc_em/metaware/readme_threadx.txt +++ b/ports/arc_em/metaware/readme_threadx.txt @@ -209,6 +209,18 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_initialize_low_level.s Modified comments + tx_thread_context_restore.s r25/r30 are caller saved + tx_thread_context_save.s r25/r30 are caller saved + tx_thread_interrupt_control.s Modified comments + tx_thread_schedule.s fixed interrupt priority overwritting bug, + and fixed hardware stack checker disable and reenable logic + tx_thread_stack_build.s Modified comments + tx_thread_system_return.s Modified comments + tx_timer_interrupt.s remove unneeded load of _tx_thread_preempt_disable + 09-30-2020 Initial ThreadX 6.1 for ARCv2 EM using MetaWare tools. diff --git a/ports/arc_em/metaware/src/tx_initialize_low_level.s b/ports/arc_em/metaware/src/tx_initialize_low_level.s index bcd91dff..4be1e0c1 100644 --- a/ports/arc_em/metaware/src/tx_initialize_low_level.s +++ b/ports/arc_em/metaware/src/tx_initialize_low_level.s @@ -8,33 +8,32 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Initialize */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; + .equ IRQ_SELECT, 0x40B .equ KSTACK_TOP, 0x264 .equ KSTACK_BASE, 0x265 .equ STATUS32_SC, 0x4000 -; + ; ; /* Define section for placement after all linker allocated RAM memory. This -; is used to calculate the first free address that is passed to +; is used to calculate the first free address that is passed to ; tx_appication_define, soley for the ThreadX application's use. */ ; .section ".free_memory","aw" .align 4 .global _tx_first_free_address _tx_first_free_address: - .space 4 + .space 4 ; ; /* Define section for placement before the main stack area for setting ; up the STACK_TOP address for hardware stack checking. */ @@ -53,54 +52,55 @@ _tx_system_stack_top_address: .global _tx_system_stack_base_address _tx_system_stack_base_address: .space 4 -; -; + .text -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_initialize_low_level ARCv2_EM/MetaWare */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for any low-level processor */ -;/* initialization, including setting up interrupt vectors, setting */ -;/* up a periodic timer interrupt source, saving the system stack */ -;/* pointer for use in ISR processing later, and finding the first */ -;/* available RAM memory address for tx_application_define. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_initialize_kernel_enter ThreadX entry function */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* This function is responsible for any low-level processor */ +;/* initialization, including setting up interrupt vectors, setting */ +;/* up a periodic timer interrupt source, saving the system stack */ +;/* pointer for use in ISR processing later, and finding the first */ +;/* available RAM memory address for tx_application_define. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* _tx_initialize_kernel_enter ThreadX entry function */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* 04-02-2021 Andres Mlinar Modified comments, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_initialize_low_level(VOID) ;{ .global _tx_initialize_low_level - .type _tx_initialize_low_level, @function + .type _tx_initialize_low_level, @function _tx_initialize_low_level: .ifdef TX_ENABLE_HW_STACK_CHECKING @@ -130,7 +130,7 @@ _tx_initialize_low_level: ; ; ; /* Setup Timer 0 for periodic interrupts at interrupt vector 16. */ -; +; mov r0, 0 ; Disable additional ISR reg saving/restoring sr r0, [AUX_IRQ_CTRL] ; @@ -171,7 +171,7 @@ _tx_initialize_low_level: ; ; /* Define default vector table entries. */ ; - .global _tx_memory_error + .global _tx_memory_error _tx_memory_error: flag 1 nop @@ -179,7 +179,7 @@ _tx_memory_error: nop b _tx_memory_error - .global _tx_instruction_error + .global _tx_instruction_error _tx_instruction_error: flag 1 nop @@ -187,7 +187,7 @@ _tx_instruction_error: nop b _tx_instruction_error - .global _tx_ev_machine_check + .global _tx_ev_machine_check _tx_ev_machine_check: flag 1 nop @@ -195,7 +195,7 @@ _tx_ev_machine_check: nop b _tx_ev_machine_check - .global _tx_ev_tblmiss_inst + .global _tx_ev_tblmiss_inst _tx_ev_tblmiss_inst: flag 1 nop @@ -203,7 +203,7 @@ _tx_ev_tblmiss_inst: nop b _tx_ev_tblmiss_inst - .global _tx_ev_tblmiss_data + .global _tx_ev_tblmiss_data _tx_ev_tblmiss_data: flag 1 nop @@ -211,7 +211,7 @@ _tx_ev_tblmiss_data: nop b _tx_ev_tblmiss_data - .global _tx_ev_protection_viol + .global _tx_ev_protection_viol _tx_ev_protection_viol: flag 1 nop @@ -219,7 +219,7 @@ _tx_ev_protection_viol: nop b _tx_ev_protection_viol - .global _tx_ev_privilege_viol + .global _tx_ev_privilege_viol _tx_ev_privilege_viol: flag 1 nop @@ -227,7 +227,7 @@ _tx_ev_privilege_viol: nop b _tx_ev_privilege_viol - .global _tx_ev_software_int + .global _tx_ev_software_int _tx_ev_software_int: flag 1 nop @@ -235,7 +235,7 @@ _tx_ev_software_int: nop b _tx_ev_software_int - .global _tx_ev_trap + .global _tx_ev_trap _tx_ev_trap: flag 1 nop @@ -243,7 +243,7 @@ _tx_ev_trap: nop b _tx_ev_trap - .global _tx_ev_extension + .global _tx_ev_extension _tx_ev_extension: flag 1 nop @@ -251,7 +251,7 @@ _tx_ev_extension: nop b _tx_ev_extension - .global _tx_ev_divide_by_zero + .global _tx_ev_divide_by_zero _tx_ev_divide_by_zero: flag 1 nop @@ -259,7 +259,7 @@ _tx_ev_divide_by_zero: nop b _tx_ev_divide_by_zero - .global _tx_ev_dc_error + .global _tx_ev_dc_error _tx_ev_dc_error: flag 1 nop @@ -267,7 +267,7 @@ _tx_ev_dc_error: nop b _tx_ev_dc_error - .global _tx_ev_maligned + .global _tx_ev_maligned _tx_ev_maligned: flag 1 nop @@ -275,7 +275,7 @@ _tx_ev_maligned: nop b _tx_ev_maligned - .global _tx_unsued_0 + .global _tx_unsued_0 _tx_unsued_0: flag 1 nop @@ -283,7 +283,7 @@ _tx_unsued_0: nop b _tx_unsued_0 - .global _tx_unused_1 + .global _tx_unused_1 _tx_unused_1: flag 1 nop @@ -291,7 +291,7 @@ _tx_unused_1: nop b _tx_unused_1 - .global _tx_timer_0 + .global _tx_timer_0 _tx_timer_0: ; ; /* By default, setup Timer 0 as the ThreadX timer interrupt. */ @@ -311,7 +311,7 @@ _tx_timer_0: ; nop ; b _tx_timer_0 - .global _tx_timer_1 + .global _tx_timer_1 _tx_timer_1: sub sp, sp, 160 ; Allocate an interrupt stack frame st blink, [sp, 16] ; Save blink @@ -333,7 +333,7 @@ _tx_timer_1: ; nop ; b _tx_timer_1 - .global _tx_undefined_0 + .global _tx_undefined_0 _tx_undefined_0: flag 1 nop @@ -341,7 +341,7 @@ _tx_undefined_0: nop b _tx_undefined_0 - .global _tx_undefined_1 + .global _tx_undefined_1 _tx_undefined_1: flag 1 nop @@ -349,7 +349,7 @@ _tx_undefined_1: nop b _tx_undefined_1 - .global _tx_undefined_2 + .global _tx_undefined_2 _tx_undefined_2: flag 1 nop diff --git a/ports/arc_em/metaware/src/tx_thread_context_restore.s b/ports/arc_em/metaware/src/tx_thread_context_restore.s index 882b306c..df072a7b 100644 --- a/ports/arc_em/metaware/src/tx_thread_context_restore.s +++ b/ports/arc_em/metaware/src/tx_thread_context_restore.s @@ -8,77 +8,70 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; -; -;#define TX_SOURCE_CODE -; + .equ BTA, 0x412 .equ KSTACK_TOP, 0x264 .equ KSTACK_BASE, 0x265 .equ STATUS32_SC, 0x4000 -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_thread.h" -;#include "tx_timer.h" -; -; -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_context_restore ARCv2_EM/MetaWare */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function restores the interrupt context if it is processing a */ -;/* nested interrupt. If not, it returns to the interrupt thread if no */ -;/* preemption is necessary. Otherwise, if preemption is necessary or */ -;/* if no thread was running, the function returns to the scheduler. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling routine */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs Interrupt Service Routines */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* This function restores the interrupt context if it is processing a */ +;/* nested interrupt. If not, it returns to the interrupt thread if no */ +;/* preemption is necessary. Otherwise, if preemption is necessary or */ +;/* if no thread was running, the function returns to the scheduler. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_thread_schedule Thread scheduling routine */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs Interrupt Service Routines */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* 04-02-2021 Andres Mlinar Modified comment(s), and */ +;/* r25/r30 are caller saved, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_restore(VOID) ;{ .global _tx_thread_context_restore - .type _tx_thread_context_restore, @function + .type _tx_thread_context_restore, @function _tx_thread_context_restore: ; ; /* Note: it is assumed that the stack pointer is in the same position now as @@ -109,7 +102,7 @@ _tx_thread_context_restore: ; ; /* Interrupts are nested. */ ; -; /* Just recover the saved registers and return to the point of +; /* Just recover the saved registers and return to the point of ; interrupt. */ ; @@ -119,7 +112,7 @@ __tx_thread_nested_restore: sr r0, [LP_START] ; Restore LP_START ld r1, [sp, 8] ; Recover LP_END sr r1, [LP_END] ; Restore LP_END - ld r2, [sp, 12] ; Recover LP_COUNT + ld r2, [sp, 12] ; Recover LP_COUNT mov LP_COUNT, r2 ld r2, [sp, 156] ; Pickup BTA sr r2, [BTA] ; Recover BTA @@ -128,6 +121,7 @@ __tx_thread_nested_restore: ld r59, [sp, 144] ; Recover r59 .endif ld blink, [sp, 16] ; Recover blink + ld r25, [sp, 32] ; Recover r25 ld r12, [sp, 84] ; Recover r12 ld r11, [sp, 88] ; Recover r11 ld r10, [sp, 92] ; Recover r10 @@ -140,8 +134,9 @@ __tx_thread_nested_restore: ld r3, [sp, 120] ; Recover r3 ld r2, [sp, 124] ; Recover r2 ld r1, [sp, 128] ; Recover r1 - ld r0, [sp, 132] ; Recover r0 - add sp, sp, 160 ; Recover interrupt stack frame + ld r0, [sp, 132] ; Recover r0 + ld r30, [sp, 136] ; Recover r30 + add sp, sp, 160 ; Recover interrupt stack frame rtie ; Return from interrupt ; ; @@ -149,7 +144,7 @@ __tx_thread_nested_restore: __tx_thread_not_nested_restore: ; ; /* Determine if a thread was interrupted and no preemption is required. */ -; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr) +; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr) ; || (_tx_thread_preempt_disable)) ; { ; @@ -207,6 +202,7 @@ __tx_thread_no_preempt_restore: ld r59, [sp, 144] ; Recover r59 .endif ld blink, [sp, 16] ; Recover blink + ld r25, [sp, 32] ; Recover r25 ld r12, [sp, 84] ; Recover r12 ld r11, [sp, 88] ; Recover r11 ld r10, [sp, 92] ; Recover r10 @@ -220,6 +216,7 @@ __tx_thread_no_preempt_restore: ld r2, [sp, 124] ; Recover r2 ld r1, [sp, 128] ; Recover r1 ld r0, [sp, 132] ; Recover r0 + ld r30, [sp, 136] ; Recover r30 add sp, sp, 160 ; Recover interrupt stack frame rtie ; Return from interrupt ; diff --git a/ports/arc_em/metaware/src/tx_thread_context_save.s b/ports/arc_em/metaware/src/tx_thread_context_save.s index e67cdd80..e252af97 100644 --- a/ports/arc_em/metaware/src/tx_thread_context_save.s +++ b/ports/arc_em/metaware/src/tx_thread_context_save.s @@ -8,76 +8,68 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; -; -;#define TX_SOURCE_CODE -; + .equ BTA, 0x412 .equ KSTACK_TOP, 0x264 .equ KSTACK_BASE, 0x265 .equ STATUS32_SC, 0x4000 -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_thread.h" -;#include "tx_timer.h" -; -; -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_context_save ARCv2_EM/MetaWare */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function saves the context of an executing thread in the */ -;/* beginning of interrupt processing. The function also ensures that */ -;/* the system stack is used upon return to the calling ISR. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ISRs */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* This function saves the context of an executing thread in the */ +;/* beginning of interrupt processing. The function also ensures that */ +;/* the system stack is used upon return to the calling ISR. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ISRs */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* 04-02-2021 Andres Mlinar Modified comment(s), and */ +;/* r25/r30 are caller saved, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_context_save(VOID) ;{ .global _tx_thread_context_save - .type _tx_thread_context_save, @function + .type _tx_thread_context_save, @function _tx_thread_context_save: ; ; /* Upon entry to this routine, it is assumed that an interrupt stack frame @@ -106,6 +98,8 @@ _tx_thread_context_save: ; calling ISR. */ ; __tx_thread_nested_save: ; Label is for special nested interrupt case from idle system save below + st r30, [sp, 136] ; Save r30 + st r25, [sp, 32] ; Save r25 st r12, [sp, 84] ; Save r12 st r11, [sp, 88] ; Save r11 st r10, [sp, 92] ; Save r10 @@ -114,7 +108,7 @@ __tx_thread_nested_save: ; Label is for special n st r7, [sp, 104] ; Save r7 st r6, [sp, 108] ; Save r6 st r5, [sp, 112] ; Save r5 - st r4, [sp, 116] ; Save r6 + st r4, [sp, 116] ; Save r4 lr r10, [LP_START] ; Pickup LP_START lr r9, [LP_END] ; Pickup LP_END st LP_COUNT, [sp, 12] ; Save LP_COUNT @@ -156,6 +150,8 @@ __tx_thread_not_nested_save: add r0, r0, 1 ; Increment the nested interrupt count st r0, [gp, _tx_thread_system_state@sda] ; Update system state ld r1, [gp, _tx_thread_current_ptr@sda] ; Pickup current thread pointer + st r30, [sp, 136] ; Save r30 + st r25, [sp, 32] ; Save r25 st r12, [sp, 84] ; Save r12 st r11, [sp, 88] ; Save r11 breq r1, 0, __tx_thread_idle_system_save ; If no thread is running, idle system was @@ -247,13 +243,15 @@ __tx_thread_idle_system_save: lr r0, [AUX_IRQ_ACT] ; Pickup the interrupt active register neg r1, r0 ; Negate and r1, r0, r1 ; See if there are any other interrupts present - brne r0, r1, __tx_thread_nested_save ; If more interrupts, go into the nested interrupt save logic + breq r0, r1, __tx_thread_not_nested + j __tx_thread_nested_save ; If more interrupts, go into the nested interrupt save logic +__tx_thread_not_nested: ; -; /* Not much to do here, just adjust the stack pointer, and return to +; /* Not much to do here, just adjust the stack pointer, and return to ; ISR processing. */ ; j_s.d [blink] ; Return to ISR - add sp, sp, 160 ; Recover stack space + add sp, sp, 160 ; Recover stack space ; ; } ;} diff --git a/ports/arc_em/metaware/src/tx_thread_interrupt_control.s b/ports/arc_em/metaware/src/tx_thread_interrupt_control.s index e032d6d8..59a078fa 100644 --- a/ports/arc_em/metaware/src/tx_thread_interrupt_control.s +++ b/ports/arc_em/metaware/src/tx_thread_interrupt_control.s @@ -8,69 +8,61 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; -;#define TX_SOURCE_CODE -; -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_thread.h" -; -; -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_interrupt_control ARCv2_EM/MetaWare */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is responsible for changing the interrupt lockout */ -;/* posture of the system. */ -;/* */ -;/* INPUT */ -;/* */ -;/* new_posture New interrupt lockout posture */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* old_posture Old interrupt lockout posture */ -;/* */ -;/* CALLS */ -;/* */ -;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* Application Code */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* This function is responsible for changing the interrupt lockout */ +;/* posture of the system. */ +;/* */ +;/* INPUT */ +;/* */ +;/* new_posture New interrupt lockout posture */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* old_posture Old interrupt lockout posture */ +;/* */ +;/* CALLS */ +;/* */ +;/* None */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* Application Code */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* 04-02-2021 Andres Mlinar Modified comments, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;UINT _tx_thread_interrupt_control(UINT new_posture) ;{ .global _tx_thread_interrupt_control - .type _tx_thread_interrupt_control, @function + .type _tx_thread_interrupt_control, @function _tx_thread_interrupt_control: ; ; /* Pickup current interrupt lockout posture. */ diff --git a/ports/arc_em/metaware/src/tx_thread_schedule.s b/ports/arc_em/metaware/src/tx_thread_schedule.s index bb50e563..0cc74757 100644 --- a/ports/arc_em/metaware/src/tx_thread_schedule.s +++ b/ports/arc_em/metaware/src/tx_thread_schedule.s @@ -8,73 +8,67 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; -; -;#define TX_SOURCE_CODE -; -; + .equ BTA, 0x412 .equ KSTACK_TOP, 0x264 .equ KSTACK_BASE, 0x265 .equ STATUS32_SC, 0x4000 -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_thread.h" -;#include "tx_timer.h" -; -; -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_schedule ARCv2_EM/MetaWare */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function waits for a thread control block pointer to appear in */ -;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ -;/* in the variable, the corresponding thread is resumed. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ +;/* */ +;/* This function waits for a thread control block pointer to appear in */ +;/* the _tx_thread_execute_ptr variable. Once a thread pointer appears */ +;/* in the variable, the corresponding thread is resumed. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ ;/* None */ -;/* */ -;/* CALLS */ -;/* */ +;/* */ +;/* CALLS */ +;/* */ ;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* _tx_initialize_kernel_enter ThreadX entry function */ -;/* _tx_thread_system_return Return to system from thread */ -;/* _tx_thread_context_restore Restore thread's context */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* _tx_initialize_kernel_enter ThreadX entry function */ +;/* _tx_thread_system_return Return to system from thread */ +;/* _tx_thread_context_restore Restore thread's context */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* 04-02-2021 Andres Mlinar Modified comment(s), and */ +;/* fixed interrupt priority */ +;/* overwritting bug, and */ +;/* fixed hardware stack checker*/ +;/* disable and reenable logic, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_schedule(VOID) @@ -85,8 +79,13 @@ _tx_thread_schedule: ; ; /* Enable interrupts. */ ; - mov r0, 0x1F ; Build enable interrupt value - seti r0 ; Enable interrupts + seti 0 ; Enable interrupts without changing threshold level + + .ifdef TX_ENABLE_HW_STACK_CHECKING + lr r2, [status32] ; Pickup current STATUS32 + and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC) + kflag r2 ; Disable hardware stack checking + .endif ; ; /* Wait for a thread to execute. */ ; do @@ -99,7 +98,7 @@ __tx_thread_schedule_loop: ; ; } ; while(_tx_thread_execute_ptr == TX_NULL); -; +; ; /* Yes! We have a thread to execute. Lockout interrupts and ; transfer control to it. */ ; @@ -118,16 +117,6 @@ __tx_thread_schedule_loop: ld r4, [r0, 24] ; Pickup time-slice for this thread add r3, r3, 1 ; Increment run counter st r3, [r0, 4] ; Store the new run counter - - .ifdef TX_ENABLE_HW_STACK_CHECKING - lr r2, [status32] ; Pickup current STATUS32 - and r2, r2, ~STATUS32_SC ; Clear the hardware stack checking enable bit (SC) - kflag r2 ; Disable hardware stack checking - ld r3, [r0, 12] ; Pickup the top of the thread's stack (lowest address) - sr r3, [KSTACK_TOP] ; Setup KSTACK_TOP - ld r3, [r0, 16] ; Pickup the base of the thread's stack (highest address) - sr r3, [KSTACK_BASE] ; Setup KSTACK_BASE - .endif ; ; /* Setup time-slice, if present. */ ; _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; @@ -135,6 +124,10 @@ __tx_thread_schedule_loop: ld sp, [r0, 8] ; Switch to thread's stack .ifdef TX_ENABLE_HW_STACK_CHECKING + ld r3, [r0, 12] ; Pickup the top of the thread's stack (lowest address) + sr r3, [KSTACK_TOP] ; Setup KSTACK_TOP + ld r3, [r0, 16] ; Pickup the base of the thread's stack (highest address) + sr r3, [KSTACK_BASE] ; Setup KSTACK_BASE or r2, r2, STATUS32_SC ; Or in hardware stack checking enable bit (SC) kflag r2 ; Enable hardware stack checking .endif @@ -176,8 +169,8 @@ __tx_thread_schedule_loop: ld r13, [sp, 64] ; Recover r13 ld r1, [sp, 68] ; Pickup status32 ld r30, [sp, 72] ; Recover r30 - add sp, sp, 76 ; Recover solicited stack frame - j_s.d [blink] ; Return to thread and restore flags + add sp, sp, 76 ; Recover solicited stack frame + j_s.d [blink] ; Return to thread and restore flags seti r1 ; Recover STATUS32 ; __tx_thread_schedule_int_ret: @@ -189,7 +182,7 @@ __tx_thread_schedule_int_ret: sr r0, [LP_START] ; Restore LP_START ld r1, [sp, 8] ; Recover LP_END sr r1, [LP_END] ; Restore LP_END - ld r2, [sp, 12] ; Recover LP_COUNT + ld r2, [sp, 12] ; Recover LP_COUNT mov LP_COUNT, r2 ld r0, [sp, 156] ; Pickup saved BTA sr r0, [BTA] ; Recover BTA @@ -230,7 +223,7 @@ __tx_thread_schedule_int_ret: .endif add sp, sp, 160 ; Recover interrupt stack frame rtie ; Return to point of interrupt - + ; ;} ; diff --git a/ports/arc_em/metaware/src/tx_thread_stack_build.s b/ports/arc_em/metaware/src/tx_thread_stack_build.s index b576b0ff..b6550712 100644 --- a/ports/arc_em/metaware/src/tx_thread_stack_build.s +++ b/ports/arc_em/metaware/src/tx_thread_stack_build.s @@ -8,70 +8,60 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; -; -;#define TX_SOURCE_CODE -; -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_thread.h" -; -; - .equ LONG_ALIGN_MASK, 0xFFFFFFFC + + .equ LONG_ALIGN_MASK, 0xFFFFFFFC .equ INT_ENABLE_BITS, 0x8000001E -; -; -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_stack_build ARCv2_EM/MetaWare */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ +;/* */ ;/* This function builds a stack frame on the supplied thread's stack. */ ;/* The stack frame results in a fake interrupt return to the supplied */ -;/* function pointer. */ -;/* */ -;/* INPUT */ -;/* */ +;/* function pointer. */ +;/* */ +;/* INPUT */ +;/* */ ;/* thread_ptr Pointer to thread control blk */ ;/* function_ptr Pointer to return function */ -;/* */ -;/* OUTPUT */ -;/* */ +;/* */ +;/* OUTPUT */ +;/* */ ;/* None */ -;/* */ -;/* CALLS */ -;/* */ +;/* */ +;/* CALLS */ +;/* */ ;/* None */ -;/* */ -;/* CALLED BY */ -;/* */ +;/* */ +;/* CALLED BY */ +;/* */ ;/* _tx_thread_create Create thread service */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* 04-02-2021 Andres Mlinar Modified comments, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) @@ -80,11 +70,11 @@ .type _tx_thread_stack_build, @function _tx_thread_stack_build: ; -; +; ; /* Build a fake interrupt frame. The form of the fake interrupt stack ; on the ARCv2 EM should look like the following after it is built. ; Note that the extension registers are always assigned space here. -; +; ; Stack Top: 1 Interrupt stack frame type ; LP_START Initial loop start ; LP_END Initial loop end @@ -119,7 +109,7 @@ _tx_thread_stack_build: ; r2 Initial r2 ; r1 Initial r1 ; r0 Initial r0 -; r30 Initial r30 +; r30 Initial r30 ; r58 Initial r58 ; r59 Initial r59 ; 0 Reserved @@ -127,10 +117,10 @@ _tx_thread_stack_build: ; 0 Initial BTA ; 0 Point of Interrupt (thread entry point) ; 0 Initial STATUS32 -; 0 Backtrace -; 0 Backtrace -; 0 Backtrace -; 0 Backtrace +; 0 Backtrace +; 0 Backtrace +; 0 Backtrace +; 0 Backtrace ; ; *: these registers will only be saved and restored if flag -Xxmac_d16 is passed to hcac ; @@ -179,19 +169,19 @@ _tx_thread_stack_build: st r5, [r3, 128] ; Store initial r1 st r5, [r3, 132] ; Store initial r0 st r5, [r3, 136] ; Store initial r30 - st r5, [r3, 140] ; Store initial r58 + st r5, [r3, 140] ; Store initial r58 st r5, [r3, 144] ; Store initial r59 st r5, [r3, 148] ; Reserved st r5, [r3, 152] ; Reserved st r5, [r3, 156] ; Store initial BTA - st r1, [r3, 160] ; Store initial point of entry + st r1, [r3, 160] ; Store initial point of entry lr r6, [status32] ; Pickup STATUS32 or r6, r6, INT_ENABLE_BITS ; Make sure interrupts are enabled st r6, [r3, 164] ; Store initial STATUS32 - st r5, [r3, 168] ; Backtrace 0 - st r5, [r3, 172] ; Backtrace 0 - st r5, [r3, 176] ; Backtrace 0 - st r5, [r3, 180] ; Backtrace 0 + st r5, [r3, 168] ; Backtrace 0 + st r5, [r3, 172] ; Backtrace 0 + st r5, [r3, 176] ; Backtrace 0 + st r5, [r3, 180] ; Backtrace 0 ; ; /* Setup stack pointer. */ ; thread_ptr -> tx_thread_stack_ptr = r3; diff --git a/ports/arc_em/metaware/src/tx_thread_system_return.s b/ports/arc_em/metaware/src/tx_thread_system_return.s index fa061e1c..b3bbafed 100644 --- a/ports/arc_em/metaware/src/tx_thread_system_return.s +++ b/ports/arc_em/metaware/src/tx_thread_system_return.s @@ -8,69 +8,61 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Thread */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; -;#define TX_SOURCE_CODE -; + .equ KSTACK_TOP, 0x264 .equ KSTACK_BASE, 0x265 .equ STATUS32_SC, 0x4000 -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_thread.h" -;#include "tx_timer.h" -; -; -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_thread_system_return ARCv2_EM/MetaWare */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function is target processor specific. It is used to transfer */ -;/* control from a thread back to the ThreadX system. Only a */ -;/* minimal context is saved since the compiler assumes temp registers */ -;/* are going to get slicked by a function call anyway. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_thread_schedule Thread scheduling loop */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* ThreadX components */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* This function is target processor specific. It is used to transfer */ +;/* control from a thread back to the ThreadX system. Only a */ +;/* minimal context is saved since the compiler assumes temp registers */ +;/* are going to get slicked by a function call anyway. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_thread_schedule Thread scheduling loop */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* ThreadX components */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +;/* 04-02-2021 Andres Mlinar Modified comments, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_system_return(VOID) @@ -105,7 +97,7 @@ _tx_thread_system_return: st r13, [sp, 64] ; Save r13 st r2, [sp, 68] ; Save status32 st r30, [sp, 72] ; Save r30 -; +; .ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY ; ; /* Call the thread exit function to indicate the thread is no longer executing. */ diff --git a/ports/arc_em/metaware/src/tx_timer_interrupt.s b/ports/arc_em/metaware/src/tx_timer_interrupt.s index 27141e01..a3aea5eb 100644 --- a/ports/arc_em/metaware/src/tx_timer_interrupt.s +++ b/ports/arc_em/metaware/src/tx_timer_interrupt.s @@ -8,32 +8,21 @@ ;/* and in the root directory of this software. */ ;/* */ ;/**************************************************************************/ -; -; + ;/**************************************************************************/ ;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ +;/** */ +;/** ThreadX Component */ ;/** */ ;/** Timer */ ;/** */ ;/**************************************************************************/ ;/**************************************************************************/ -; -;#define TX_SOURCE_CODE -; -; -;/* Include necessary system files. */ -; -;#include "tx_api.h" -;#include "tx_timer.h" -;#include "tx_thread.h" -; -; -;/**************************************************************************/ -;/* */ -;/* FUNCTION RELEASE */ -;/* */ + +;/**************************************************************************/ +;/* */ +;/* FUNCTION RELEASE */ +;/* */ ;/* _tx_timer_interrupt ARCv2_EM/MetaWare */ ;/* 6.1.3 */ ;/* AUTHOR */ @@ -41,34 +30,34 @@ ;/* William E. Lamie, Microsoft Corporation */ ;/* */ ;/* DESCRIPTION */ -;/* */ -;/* This function processes the hardware timer interrupt. This */ -;/* processing includes incrementing the system clock and checking for */ -;/* time slice and/or timer expiration. If either is found, the */ -;/* interrupt context save/restore functions are called along with the */ -;/* expiration functions. */ -;/* */ -;/* INPUT */ -;/* */ -;/* None */ -;/* */ -;/* OUTPUT */ -;/* */ -;/* None */ -;/* */ -;/* CALLS */ -;/* */ -;/* _tx_timer_expiration_process Process timer expiration */ -;/* _tx_thread_time_slice Time slice interrupted thread */ -;/* _tx_thread_context_save Save interrupt context */ -;/* _tx_thread_context_restore Restore interrupt context */ -;/* */ -;/* CALLED BY */ -;/* */ -;/* interrupt vector */ -;/* */ -;/* RELEASE HISTORY */ -;/* */ +;/* */ +;/* This function processes the hardware timer interrupt. This */ +;/* processing includes incrementing the system clock and checking for */ +;/* time slice and/or timer expiration. If either is found, the */ +;/* interrupt context save/restore functions are called along with the */ +;/* expiration functions. */ +;/* */ +;/* INPUT */ +;/* */ +;/* None */ +;/* */ +;/* OUTPUT */ +;/* */ +;/* None */ +;/* */ +;/* CALLS */ +;/* */ +;/* _tx_timer_expiration_process Process timer expiration */ +;/* _tx_thread_time_slice Time slice interrupted thread */ +;/* _tx_thread_context_save Save interrupt context */ +;/* _tx_thread_context_restore Restore interrupt context */ +;/* */ +;/* CALLED BY */ +;/* */ +;/* interrupt vector */ +;/* */ +;/* RELEASE HISTORY */ +;/* */ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ @@ -81,7 +70,7 @@ ;VOID _tx_timer_interrupt(VOID) ;{ .global _tx_timer_interrupt - .type _tx_timer_interrupt, @function + .type _tx_timer_interrupt, @function _tx_timer_interrupt: ; ; /* Upon entry to this routine, it is assumed the interrupt stack frame has @@ -132,7 +121,7 @@ __tx_timer_no_time_slice: ; ld r0, [gp, _tx_timer_current_ptr@sda] ; Pickup current timer pointer ld r2, [r0, 0] ; Pickup examine actual list entry - breq r2, 0, __tx_timer_no_timer ; + breq r2, 0, __tx_timer_no_timer ; ; If NULL, no timer has expired, just move to the next entry ; ; /* Set expiration flag. */ @@ -220,7 +209,7 @@ __tx_timer_dont_activate: ; __tx_timer_not_ts_expiration: ; - st 0, [gp, _tx_timer_expired_time_slice@sda] + st 0, [gp, _tx_timer_expired_time_slice@sda] b _tx_thread_context_restore ; Go restore interrupt context.. ; ..clearing time-slice expired flag ; Note that we don't return from @@ -233,9 +222,9 @@ __tx_timer_nothing_expired: ld r0, [sp, 0] ; Recover r0 ld r1, [sp, 4] ; Recover r1 ld r2, [sp, 8] ; Recover r2 - add sp, sp, 160 ; Recover interrupt stack frame + add sp, sp, 160 ; Recover interrupt stack frame rtie ; Return to point of interrupt ; ;} .end - + diff --git a/ports/arc_hs/metaware/inc/tx_port.h b/ports/arc_hs/metaware/inc/tx_port.h index db08784e..d0cd7a99 100644 --- a/ports/arc_hs/metaware/inc/tx_port.h +++ b/ports/arc_hs/metaware/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARC_HS/MetaWare */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -288,7 +291,7 @@ ULONG _tx_misra_time_stamp_get(VOID); macros. */ -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save; #define TX_DISABLE interrupt_save = _clri(); #define TX_RESTORE _seti(interrupt_save); @@ -322,7 +325,7 @@ VOID tx_thread_register_bank_assign(VOID *thread_ptr, UINT register_bank); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARC_HS/MetaWare Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARC_HS/MetaWare Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/arc_hs/metaware/readme_threadx.txt b/ports/arc_hs/metaware/readme_threadx.txt index 92b604b6..5e431c1d 100644 --- a/ports/arc_hs/metaware/readme_threadx.txt +++ b/ports/arc_hs/metaware/readme_threadx.txt @@ -241,6 +241,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 for ARC HS using MetaWare tools. diff --git a/ports/arm11/ac5/inc/tx_port.h b/ports/arm11/ac5/inc/tx_port.h index 0c873cc1..7b48f0c8 100644 --- a/ports/arm11/ac5/inc/tx_port.h +++ b/ports/arm11/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARM11/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -265,7 +268,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -317,7 +320,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/arm11/ac5/readme_threadx.txt b/ports/arm11/ac5/readme_threadx.txt index 114b5089..82a9dfa2 100644 --- a/ports/arm11/ac5/readme_threadx.txt +++ b/ports/arm11/ac5/readme_threadx.txt @@ -524,6 +524,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A5 using AC5 tools. diff --git a/ports/arm11/gnu/inc/tx_port.h b/ports/arm11/gnu/inc/tx_port.h index 09c52000..037377ba 100644 --- a/ports/arm11/gnu/inc/tx_port.h +++ b/ports/arm11/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARM11/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; ORR %1,%0,#0xC0; MSR CPSR_cxsf,%1 ": "=r" (interrupt_save), "=r" (tx_temp) ); @@ -306,7 +309,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/arm11/gnu/readme_threadx.txt b/ports/arm11/gnu/readme_threadx.txt index 6c502efd..d7300854 100644 --- a/ports/arm11/gnu/readme_threadx.txt +++ b/ports/arm11/gnu/readme_threadx.txt @@ -486,6 +486,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for ARM11 using GNU tools. diff --git a/ports/arm11/iar/inc/tx_port.h b/ports/arm11/iar/inc/tx_port.h index 150c0578..75d7b613 100644 --- a/ports/arm11/iar/inc/tx_port.h +++ b/ports/arm11/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARM11/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -334,9 +337,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif #define TX_DISABLE interrupt_save = __get_CPSR(); \ @@ -372,7 +375,7 @@ void _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM11/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/arm11/iar/readme_threadx.txt b/ports/arm11/iar/readme_threadx.txt index 7b0400af..fbe7deeb 100644 --- a/ports/arm11/iar/readme_threadx.txt +++ b/ports/arm11/iar/readme_threadx.txt @@ -517,6 +517,9 @@ The project options "General Options -> Library Configuration" should also have 11. Revision History +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for ARM11 using IAR's ARM tools. diff --git a/ports/arm9/ac5/inc/tx_port.h b/ports/arm9/ac5/inc/tx_port.h index 0d5c2ac3..05712046 100644 --- a/ports/arm9/ac5/inc/tx_port.h +++ b/ports/arm9/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARM9/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -267,7 +270,7 @@ typedef unsigned short USHORT; macros. */ #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -298,7 +301,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -319,7 +322,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/arm9/ac5/readme_threadx.txt b/ports/arm9/ac5/readme_threadx.txt index 47272b53..f07ea494 100644 --- a/ports/arm9/ac5/readme_threadx.txt +++ b/ports/arm9/ac5/readme_threadx.txt @@ -508,6 +508,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for ARM9 using AC5 tools. diff --git a/ports/arm9/gnu/inc/tx_port.h b/ports/arm9/gnu/inc/tx_port.h index 3535f75f..a7431396 100644 --- a/ports/arm9/gnu/inc/tx_port.h +++ b/ports/arm9/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARM9/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; ORR %1,%0,#0xC0; MSR CPSR_cxsf,%1 ": "=r" (interrupt_save), "=r" (tx_temp) ); @@ -306,7 +309,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/arm9/gnu/readme_threadx.txt b/ports/arm9/gnu/readme_threadx.txt index 41572f18..54046146 100644 --- a/ports/arm9/gnu/readme_threadx.txt +++ b/ports/arm9/gnu/readme_threadx.txt @@ -486,6 +486,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for ARM9 using GNU tools. diff --git a/ports/arm9/iar/inc/tx_port.h b/ports/arm9/iar/inc/tx_port.h index 2c14c396..352cac03 100644 --- a/ports/arm9/iar/inc/tx_port.h +++ b/ports/arm9/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h ARM9/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -334,9 +337,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif #define TX_DISABLE interrupt_save = __get_CPSR(); \ @@ -372,7 +375,7 @@ void _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX ARM9/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/arm9/iar/readme_threadx.txt b/ports/arm9/iar/readme_threadx.txt index dd7b087a..3f394604 100644 --- a/ports/arm9/iar/readme_threadx.txt +++ b/ports/arm9/iar/readme_threadx.txt @@ -518,6 +518,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version 6.1 for ARM9 using IAR's ARM tools. diff --git a/ports/c667x/ccs/inc/tx_port.h b/ports/c667x/ccs/inc/tx_port.h index 03feeac8..d650e737 100644 --- a/ports/c667x/ccs/inc/tx_port.h +++ b/ports/c667x/ccs/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h C667x/TI */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -237,7 +240,7 @@ typedef unsigned short USHORT; is used to define a local function save area for the disable and restore macros. */ -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #ifdef TX_SKIP_INTRINSICS unsigned int _tx_thread_interrupt_control(unsigned int); @@ -264,7 +267,7 @@ unsigned int _tx_thread_interrupt_control(unsigned int); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX C667x/TI Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX C667x/TI Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/c667x/ccs/readme_threadx.txt b/ports/c667x/ccs/readme_threadx.txt index c5cffbd4..8826de45 100644 --- a/ports/c667x/ccs/readme_threadx.txt +++ b/ports/c667x/ccs/readme_threadx.txt @@ -238,6 +238,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for TMS320C667x using TI Code Composer tools. diff --git a/ports/cortex_a15/ac6/inc/tx_port.h b/ports/cortex_a15/ac6/inc/tx_port.h index 59659cf0..de22d9a2 100644 --- a/ports/cortex_a15/ac6/inc/tx_port.h +++ b/ports/cortex_a15/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A15/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a15/ac6/readme_threadx.txt b/ports/cortex_a15/ac6/readme_threadx.txt index 27a3c8f4..8d81625a 100644 --- a/ports/cortex_a15/ac6/readme_threadx.txt +++ b/ports/cortex_a15/ac6/readme_threadx.txt @@ -332,6 +332,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A15 using AC6 tools. diff --git a/ports/cortex_a15/gnu/inc/tx_port.h b/ports/cortex_a15/gnu/inc/tx_port.h index 507f69ed..d054d283 100644 --- a/ports/cortex_a15/gnu/inc/tx_port.h +++ b/ports/cortex_a15/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A15/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a15/gnu/readme_threadx.txt b/ports/cortex_a15/gnu/readme_threadx.txt index b060b1b8..5bd5eb7c 100644 --- a/ports/cortex_a15/gnu/readme_threadx.txt +++ b/ports/cortex_a15/gnu/readme_threadx.txt @@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A15 using GNU tools. diff --git a/ports/cortex_a15/iar/inc/tx_port.h b/ports/cortex_a15/iar/inc/tx_port.h index 7529be75..e2870721 100644 --- a/ports/cortex_a15/iar/inc/tx_port.h +++ b/ports/cortex_a15/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A15/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -336,9 +339,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif @@ -382,7 +385,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A15/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_a15/iar/readme_threadx.txt b/ports/cortex_a15/iar/readme_threadx.txt index f7b0f20e..151c5253 100644 --- a/ports/cortex_a15/iar/readme_threadx.txt +++ b/ports/cortex_a15/iar/readme_threadx.txt @@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version 6.1 for Cortex-A15 using IAR's ARM tools. diff --git a/ports/cortex_a35/ac6/inc/tx_port.h b/ports/cortex_a35/ac6/inc/tx_port.h index 41192cd5..cde96a4b 100644 --- a/ports/cortex_a35/ac6/inc/tx_port.h +++ b/ports/cortex_a35/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A35/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -311,7 +314,7 @@ unsigned long long temp; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -321,7 +324,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -354,7 +357,7 @@ VOID tx_thread_fp_disable(VOID); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a35/ac6/readme_threadx.txt b/ports/cortex_a35/ac6/readme_threadx.txt index 6dd1a997..fafe435c 100644 --- a/ports/cortex_a35/ac6/readme_threadx.txt +++ b/ports/cortex_a35/ac6/readme_threadx.txt @@ -243,6 +243,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A35 using AC6 tools. diff --git a/ports/cortex_a35/gnu/inc/tx_port.h b/ports/cortex_a35/gnu/inc/tx_port.h index ca8a1149..4ca50721 100644 --- a/ports/cortex_a35/gnu/inc/tx_port.h +++ b/ports/cortex_a35/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A35/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -311,7 +314,7 @@ unsigned long long temp; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -321,7 +324,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -354,7 +357,7 @@ VOID tx_thread_fp_disable(VOID); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A35/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a35/gnu/readme_threadx.txt b/ports/cortex_a35/gnu/readme_threadx.txt index 5b2a3ef8..bab64522 100644 --- a/ports/cortex_a35/gnu/readme_threadx.txt +++ b/ports/cortex_a35/gnu/readme_threadx.txt @@ -243,6 +243,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A35 using GCC tools. diff --git a/ports/cortex_a5/ac5/inc/tx_port.h b/ports/cortex_a5/ac5/inc/tx_port.h index 516f3f0f..4e51b123 100644 --- a/ports/cortex_a5/ac5/inc/tx_port.h +++ b/ports/cortex_a5/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A5/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -265,7 +268,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a5/ac5/readme_threadx.txt b/ports/cortex_a5/ac5/readme_threadx.txt index d6a08426..12962be2 100644 --- a/ports/cortex_a5/ac5/readme_threadx.txt +++ b/ports/cortex_a5/ac5/readme_threadx.txt @@ -535,6 +535,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A5 using AC5 tools. diff --git a/ports/cortex_a5/gnu/inc/tx_port.h b/ports/cortex_a5/gnu/inc/tx_port.h index 989d71ed..d3ca8b91 100644 --- a/ports/cortex_a5/gnu/inc/tx_port.h +++ b/ports/cortex_a5/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A5/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a5/gnu/readme_threadx.txt b/ports/cortex_a5/gnu/readme_threadx.txt index 28569eda..9653bd11 100644 --- a/ports/cortex_a5/gnu/readme_threadx.txt +++ b/ports/cortex_a5/gnu/readme_threadx.txt @@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A5 using GNU tools. diff --git a/ports/cortex_a5/green/inc/tx_port.h b/ports/cortex_a5/green/inc/tx_port.h index 037a85f0..f2de0496 100644 --- a/ports/cortex_a5/green/inc/tx_port.h +++ b/ports/cortex_a5/green/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A5/Green Hills */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_disable(void); void _tx_thread_interrupt_restore(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); @@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350) @@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/Green Hills Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/Green Hills Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a5/green/readme_threadx.txt b/ports/cortex_a5/green/readme_threadx.txt index 58eb9de0..28e59b78 100644 --- a/ports/cortex_a5/green/readme_threadx.txt +++ b/ports/cortex_a5/green/readme_threadx.txt @@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 05/19/2020 Initial ThreadX version of Cortex-A5/Green Hills port. diff --git a/ports/cortex_a5/iar/inc/tx_port.h b/ports/cortex_a5/iar/inc/tx_port.h index 7d02f22a..27c61956 100644 --- a/ports/cortex_a5/iar/inc/tx_port.h +++ b/ports/cortex_a5/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A5/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -335,9 +338,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif #define TX_DISABLE interrupt_save = __get_CPSR(); \ @@ -380,7 +383,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_a5/iar/readme_threadx.txt b/ports/cortex_a5/iar/readme_threadx.txt index fc4d73d2..dc62701c 100644 --- a/ports/cortex_a5/iar/readme_threadx.txt +++ b/ports/cortex_a5/iar/readme_threadx.txt @@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version 6.1 for Cortex-A5 using IAR's ARM tools. diff --git a/ports/cortex_a5x/ac6/inc/tx_port.h b/ports/cortex_a5x/ac6/inc/tx_port.h index 82de074d..129771ad 100644 --- a/ports/cortex_a5x/ac6/inc/tx_port.h +++ b/ports/cortex_a5x/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A5x/ARM */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -311,7 +314,7 @@ unsigned long long temp; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -321,7 +324,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -354,7 +357,7 @@ VOID tx_thread_fp_disable(VOID); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5x/ARM Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5x/ARM Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a5x/ac6/readme_threadx.txt b/ports/cortex_a5x/ac6/readme_threadx.txt index 0e3a645a..c3de31bb 100644 --- a/ports/cortex_a5x/ac6/readme_threadx.txt +++ b/ports/cortex_a5x/ac6/readme_threadx.txt @@ -245,6 +245,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A5x using ARM tools. diff --git a/ports/cortex_a7/ac5/inc/tx_port.h b/ports/cortex_a7/ac5/inc/tx_port.h index 7f3f43bc..7c0ee281 100644 --- a/ports/cortex_a7/ac5/inc/tx_port.h +++ b/ports/cortex_a7/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A7/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -265,7 +268,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a7/ac5/readme_threadx.txt b/ports/cortex_a7/ac5/readme_threadx.txt index 48b5a904..347a5ec9 100644 --- a/ports/cortex_a7/ac5/readme_threadx.txt +++ b/ports/cortex_a7/ac5/readme_threadx.txt @@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A7 using AC5 tools. diff --git a/ports/cortex_a7/ac6/inc/tx_port.h b/ports/cortex_a7/ac6/inc/tx_port.h index b418ea3b..83a43e76 100644 --- a/ports/cortex_a7/ac6/inc/tx_port.h +++ b/ports/cortex_a7/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A7/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a7/ac6/readme_threadx.txt b/ports/cortex_a7/ac6/readme_threadx.txt index 82503ec4..b9d6bf88 100644 --- a/ports/cortex_a7/ac6/readme_threadx.txt +++ b/ports/cortex_a7/ac6/readme_threadx.txt @@ -332,6 +332,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A7 using AC6 tools. diff --git a/ports/cortex_a7/gnu/inc/tx_port.h b/ports/cortex_a7/gnu/inc/tx_port.h index 997dd446..ada3bfa6 100644 --- a/ports/cortex_a7/gnu/inc/tx_port.h +++ b/ports/cortex_a7/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A7/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a7/gnu/readme_threadx.txt b/ports/cortex_a7/gnu/readme_threadx.txt index b7186b39..446d6bcf 100644 --- a/ports/cortex_a7/gnu/readme_threadx.txt +++ b/ports/cortex_a7/gnu/readme_threadx.txt @@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A7 using GNU tools. diff --git a/ports/cortex_a7/green/inc/tx_port.h b/ports/cortex_a7/green/inc/tx_port.h index 76e55d62..6190db5f 100644 --- a/ports/cortex_a7/green/inc/tx_port.h +++ b/ports/cortex_a7/green/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A7/Green Hills */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_disable(void); void _tx_thread_interrupt_restore(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); @@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350) @@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/Green Hills Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/Green Hills Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a7/green/readme_threadx.txt b/ports/cortex_a7/green/readme_threadx.txt index 6ed148a0..3195b4e4 100644 --- a/ports/cortex_a7/green/readme_threadx.txt +++ b/ports/cortex_a7/green/readme_threadx.txt @@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 05/19/2020 Initial ThreadX version of Cortex-A7/Green Hills port. diff --git a/ports/cortex_a7/iar/inc/tx_port.h b/ports/cortex_a7/iar/inc/tx_port.h index d339d526..5c2139fb 100644 --- a/ports/cortex_a7/iar/inc/tx_port.h +++ b/ports/cortex_a7/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A7/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -335,9 +338,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif #define TX_DISABLE interrupt_save = __get_CPSR(); \ @@ -380,7 +383,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A7/IAR Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a7/iar/readme_threadx.txt b/ports/cortex_a7/iar/readme_threadx.txt index 534f8465..7f16ed21 100644 --- a/ports/cortex_a7/iar/readme_threadx.txt +++ b/ports/cortex_a7/iar/readme_threadx.txt @@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version 6.1 for Cortex-A7 using IAR's ARM tools. diff --git a/ports/cortex_a8/ac5/inc/tx_port.h b/ports/cortex_a8/ac5/inc/tx_port.h index 3f3889d9..72b047df 100644 --- a/ports/cortex_a8/ac5/inc/tx_port.h +++ b/ports/cortex_a8/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A8/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -265,7 +268,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a8/ac5/readme_threadx.txt b/ports/cortex_a8/ac5/readme_threadx.txt index 05355c12..13fa045f 100644 --- a/ports/cortex_a8/ac5/readme_threadx.txt +++ b/ports/cortex_a8/ac5/readme_threadx.txt @@ -537,6 +537,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A8 using AC5 tools. diff --git a/ports/cortex_a8/ac6/inc/tx_port.h b/ports/cortex_a8/ac6/inc/tx_port.h index 0dcdf194..fe8c562d 100644 --- a/ports/cortex_a8/ac6/inc/tx_port.h +++ b/ports/cortex_a8/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A8/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a8/ac6/readme_threadx.txt b/ports/cortex_a8/ac6/readme_threadx.txt index fc0697bb..a6e5a5c0 100644 --- a/ports/cortex_a8/ac6/readme_threadx.txt +++ b/ports/cortex_a8/ac6/readme_threadx.txt @@ -329,6 +329,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A8 using AC6 tools. diff --git a/ports/cortex_a8/gnu/inc/tx_port.h b/ports/cortex_a8/gnu/inc/tx_port.h index dac79ee2..120ac155 100644 --- a/ports/cortex_a8/gnu/inc/tx_port.h +++ b/ports/cortex_a8/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A8/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a8/gnu/readme_threadx.txt b/ports/cortex_a8/gnu/readme_threadx.txt index e06f0dc0..8f57bf4a 100644 --- a/ports/cortex_a8/gnu/readme_threadx.txt +++ b/ports/cortex_a8/gnu/readme_threadx.txt @@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A8 using GNU tools. diff --git a/ports/cortex_a8/green/inc/tx_port.h b/ports/cortex_a8/green/inc/tx_port.h index 61b3db87..13d8f0f5 100644 --- a/ports/cortex_a8/green/inc/tx_port.h +++ b/ports/cortex_a8/green/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A8/Green Hills */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_disable(void); void _tx_thread_interrupt_restore(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); @@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350) @@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/Green Hills Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/Green Hills Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a8/green/readme_threadx.txt b/ports/cortex_a8/green/readme_threadx.txt index 330d21e2..be5de73a 100644 --- a/ports/cortex_a8/green/readme_threadx.txt +++ b/ports/cortex_a8/green/readme_threadx.txt @@ -518,6 +518,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 05/19/2020 Initial ThreadX version of Cortex-A8/Green Hills port. diff --git a/ports/cortex_a8/iar/inc/tx_port.h b/ports/cortex_a8/iar/inc/tx_port.h index 58c88d26..30fa56de 100644 --- a/ports/cortex_a8/iar/inc/tx_port.h +++ b/ports/cortex_a8/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A8/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -335,9 +338,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif @@ -381,7 +384,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A8/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_a8/iar/readme_threadx.txt b/ports/cortex_a8/iar/readme_threadx.txt index 3f380c85..9c55e729 100644 --- a/ports/cortex_a8/iar/readme_threadx.txt +++ b/ports/cortex_a8/iar/readme_threadx.txt @@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version 6.1 for Cortex-A8 using IAR's ARM tools. diff --git a/ports/cortex_a9/ac5/inc/tx_port.h b/ports/cortex_a9/ac5/inc/tx_port.h index b14def8c..3f648a56 100644 --- a/ports/cortex_a9/ac5/inc/tx_port.h +++ b/ports/cortex_a9/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A9/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -265,7 +268,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a9/ac5/readme_threadx.txt b/ports/cortex_a9/ac5/readme_threadx.txt index 68fdde1c..56cff19c 100644 --- a/ports/cortex_a9/ac5/readme_threadx.txt +++ b/ports/cortex_a9/ac5/readme_threadx.txt @@ -535,6 +535,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A9 using AC5 tools. diff --git a/ports/cortex_a9/ac6/inc/tx_port.h b/ports/cortex_a9/ac6/inc/tx_port.h index bc54c159..b03bdb85 100644 --- a/ports/cortex_a9/ac6/inc/tx_port.h +++ b/ports/cortex_a9/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A9/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a9/ac6/readme_threadx.txt b/ports/cortex_a9/ac6/readme_threadx.txt index ab150408..f8196fb5 100644 --- a/ports/cortex_a9/ac6/readme_threadx.txt +++ b/ports/cortex_a9/ac6/readme_threadx.txt @@ -332,6 +332,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A9 using AC6 tools. diff --git a/ports/cortex_a9/gnu/inc/tx_port.h b/ports/cortex_a9/gnu/inc/tx_port.h index a9652aad..28bc2788 100644 --- a/ports/cortex_a9/gnu/inc/tx_port.h +++ b/ports/cortex_a9/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A9/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -313,7 +316,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a9/gnu/readme_threadx.txt b/ports/cortex_a9/gnu/readme_threadx.txt index c1b02ff8..d4d7627a 100644 --- a/ports/cortex_a9/gnu/readme_threadx.txt +++ b/ports/cortex_a9/gnu/readme_threadx.txt @@ -503,6 +503,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-A9 using GNU tools. diff --git a/ports/cortex_a9/green/inc/tx_port.h b/ports/cortex_a9/green/inc/tx_port.h index ba01cbdc..46367740 100644 --- a/ports/cortex_a9/green/inc/tx_port.h +++ b/ports/cortex_a9/green/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A9/Green Hills */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_disable(void); void _tx_thread_interrupt_restore(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); @@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350) @@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/Green Hills Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/Green Hills Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a9/green/readme_threadx.txt b/ports/cortex_a9/green/readme_threadx.txt index 18e4fcdf..db232e1f 100644 --- a/ports/cortex_a9/green/readme_threadx.txt +++ b/ports/cortex_a9/green/readme_threadx.txt @@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 05/19/2020 Initial ThreadX version of Cortex-A9/Green Hills port. diff --git a/ports/cortex_a9/iar/inc/tx_port.h b/ports/cortex_a9/iar/inc/tx_port.h index b67dafed..411dfe17 100644 --- a/ports/cortex_a9/iar/inc/tx_port.h +++ b/ports/cortex_a9/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-A9/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -336,9 +339,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif @@ -382,7 +385,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A9/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_a9/iar/readme_threadx.txt b/ports/cortex_a9/iar/readme_threadx.txt index a9882a81..1b8ed694 100644 --- a/ports/cortex_a9/iar/readme_threadx.txt +++ b/ports/cortex_a9/iar/readme_threadx.txt @@ -534,6 +534,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version 6.1 for Cortex-A9 using IAR's ARM tools. diff --git a/ports/cortex_m0/ac5/inc/tx_port.h b/ports/cortex_m0/ac5/inc/tx_port.h index ce6a88c2..3a5afab1 100644 --- a/ports/cortex_m0/ac5/inc/tx_port.h +++ b/ports/cortex_m0/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M0/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -288,7 +291,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -318,7 +321,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m0/ac5/readme_threadx.txt b/ports/cortex_m0/ac5/readme_threadx.txt index 341d07e5..301aa31e 100644 --- a/ports/cortex_m0/ac5/readme_threadx.txt +++ b/ports/cortex_m0/ac5/readme_threadx.txt @@ -133,6 +133,10 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Fix compilation error + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m0/ac6/inc/tx_port.h b/ports/cortex_m0/ac6/inc/tx_port.h index 6205113d..73a3cd4e 100644 --- a/ports/cortex_m0/ac6/inc/tx_port.h +++ b/ports/cortex_m0/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M0/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -335,7 +338,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -348,7 +351,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -359,7 +362,7 @@ unsigned int interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m0/ac6/readme_threadx.txt b/ports/cortex_m0/ac6/readme_threadx.txt index 0cd9b4b7..a84dfa25 100644 --- a/ports/cortex_m0/ac6/readme_threadx.txt +++ b/ports/cortex_m0/ac6/readme_threadx.txt @@ -148,6 +148,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m0/gnu/inc/tx_port.h b/ports/cortex_m0/gnu/inc/tx_port.h index 63d7d427..798dbdb8 100644 --- a/ports/cortex_m0/gnu/inc/tx_port.h +++ b/ports/cortex_m0/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M0/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -50,6 +50,9 @@ /* 05-19-2020 William E. Lamie Initial Version 6.0 */ /* 09-30-2020 William E. Lamie Modified comment(s), */ /* resulting in version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -337,7 +340,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -350,7 +353,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -361,7 +364,7 @@ unsigned int interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m0/gnu/readme_threadx.txt b/ports/cortex_m0/gnu/readme_threadx.txt index cee11aac..6ef8a028 100644 --- a/ports/cortex_m0/gnu/readme_threadx.txt +++ b/ports/cortex_m0/gnu/readme_threadx.txt @@ -145,6 +145,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m0/iar/inc/tx_port.h b/ports/cortex_m0/iar/inc/tx_port.h index b8175994..2c671a74 100644 --- a/ports/cortex_m0/iar/inc/tx_port.h +++ b/ports/cortex_m0/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M0/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -349,7 +352,7 @@ __istate_t interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m0/iar/readme_threadx.txt b/ports/cortex_m0/iar/readme_threadx.txt index f3eb001d..580a0736 100644 --- a/ports/cortex_m0/iar/readme_threadx.txt +++ b/ports/cortex_m0/iar/readme_threadx.txt @@ -148,6 +148,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m0/keil/inc/tx_port.h b/ports/cortex_m0/keil/inc/tx_port.h index 593e734b..68388adb 100644 --- a/ports/cortex_m0/keil/inc/tx_port.h +++ b/ports/cortex_m0/keil/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M0/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -288,7 +291,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -318,7 +321,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M0/AC5 Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m0/keil/readme_threadx.txt b/ports/cortex_m0/keil/readme_threadx.txt index ec9295a9..b1c1c0fd 100644 --- a/ports/cortex_m0/keil/readme_threadx.txt +++ b/ports/cortex_m0/keil/readme_threadx.txt @@ -139,6 +139,10 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Fix compilation error + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m23/ac5/inc/tx_port.h b/ports/cortex_m23/ac5/inc/tx_port.h index 0ac7a7ff..7805b1eb 100644 --- a/ports/cortex_m23/ac5/inc/tx_port.h +++ b/ports/cortex_m23/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M23/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -377,7 +380,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -406,7 +409,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M23/AC5 Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m23/ac5/readme_threadx.txt b/ports/cortex_m23/ac5/readme_threadx.txt index 7c60c2c4..1753a961 100644 --- a/ports/cortex_m23/ac5/readme_threadx.txt +++ b/ports/cortex_m23/ac5/readme_threadx.txt @@ -143,6 +143,8 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition 09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using AC5 tools. diff --git a/ports/cortex_m23/ac6/inc/tx_port.h b/ports/cortex_m23/ac6/inc/tx_port.h index 0781c2b0..0e3f401c 100644 --- a/ports/cortex_m23/ac6/inc/tx_port.h +++ b/ports/cortex_m23/ac6/inc/tx_port.h @@ -381,7 +381,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); diff --git a/ports/cortex_m23/ac6/readme_threadx.txt b/ports/cortex_m23/ac6/readme_threadx.txt index 66bf1636..45188e83 100644 --- a/ports/cortex_m23/ac6/readme_threadx.txt +++ b/ports/cortex_m23/ac6/readme_threadx.txt @@ -145,6 +145,12 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Added low power support + +03-02-2021 The following files were changed/added for version 6.1.5: + tx_port.h Added ULONG64_DEFINED 09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using AC6 tools. diff --git a/ports/cortex_m23/ac6/src/tx_thread_schedule.s b/ports/cortex_m23/ac6/src/tx_thread_schedule.s index 442a0567..dfe83983 100644 --- a/ports/cortex_m23/ac6/src/tx_thread_schedule.s +++ b/ports/cortex_m23/ac6/src/tx_thread_schedule.s @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_schedule Cortex-M23/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -59,6 +59,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 04-02-2021 Scott Larson Modified comment(s), added */ +/* low power code, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) @@ -253,11 +256,25 @@ __tx_ts_wait: LDR r1, [r2] // Pickup the next thread to execute pointer STR r1, [r0] // Store it in the current pointer CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_enter // Possibly enter low power mode + POP {r0-r3} +#endif + #ifdef TX_ENABLE_WFI DSB // Ensure no outstanding memory transactions WFI // Wait for interrupt ISB // Ensure pipeline is flushed #endif + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_exit // Exit low power mode + POP {r0-r3} +#endif + CPSIE i // Enable interrupts B __tx_ts_wait // Loop to continue waiting diff --git a/ports/cortex_m23/gnu/inc/tx_port.h b/ports/cortex_m23/gnu/inc/tx_port.h index 47850b84..d09ff80b 100644 --- a/ports/cortex_m23/gnu/inc/tx_port.h +++ b/ports/cortex_m23/gnu/inc/tx_port.h @@ -416,7 +416,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -429,7 +429,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); diff --git a/ports/cortex_m23/gnu/readme_threadx.txt b/ports/cortex_m23/gnu/readme_threadx.txt index 357990cb..435e3cb9 100644 --- a/ports/cortex_m23/gnu/readme_threadx.txt +++ b/ports/cortex_m23/gnu/readme_threadx.txt @@ -128,10 +128,16 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Added low power support + +03-02-2021 The following files were changed/added for version 6.1.5: + tx_port.h Added ULONG64_DEFINED + 12-31-2020 The following files were changed/added for port specific version 6.1.3: - tx_port.h Remove unneeded include files, use builtin functions, modified comments. diff --git a/ports/cortex_m23/gnu/src/tx_thread_schedule.s b/ports/cortex_m23/gnu/src/tx_thread_schedule.s index 9fefdb6e..24d64e64 100644 --- a/ports/cortex_m23/gnu/src/tx_thread_schedule.s +++ b/ports/cortex_m23/gnu/src/tx_thread_schedule.s @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_schedule Cortex-M23/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -59,6 +59,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 04-02-2021 Scott Larson Modified comment(s), added */ +/* low power code, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) @@ -253,11 +256,25 @@ __tx_ts_wait: LDR r1, [r2] // Pickup the next thread to execute pointer STR r1, [r0] // Store it in the current pointer CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_enter // Possibly enter low power mode + POP {r0-r3} +#endif + #ifdef TX_ENABLE_WFI DSB // Ensure no outstanding memory transactions WFI // Wait for interrupt ISB // Ensure pipeline is flushed #endif + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_exit // Exit low power mode + POP {r0-r3} +#endif + CPSIE i // Enable interrupts B __tx_ts_wait // Loop to continue waiting diff --git a/ports/cortex_m23/iar/readme_threadx.txt b/ports/cortex_m23/iar/readme_threadx.txt index 7f454e17..11717ae3 100644 --- a/ports/cortex_m23/iar/readme_threadx.txt +++ b/ports/cortex_m23/iar/readme_threadx.txt @@ -136,6 +136,13 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Added low power support + +03-02-2021 The following files were changed/added for version 6.1.5: + tx_port.h Added ULONG64_DEFINED + 09-30-2020 Initial ThreadX 6.1 version for Cortex-M23 using IAR's ARM tools. diff --git a/ports/cortex_m23/iar/src/tx_thread_schedule.s b/ports/cortex_m23/iar/src/tx_thread_schedule.s index 53b92102..2acf2f77 100644 --- a/ports/cortex_m23/iar/src/tx_thread_schedule.s +++ b/ports/cortex_m23/iar/src/tx_thread_schedule.s @@ -32,6 +32,10 @@ EXTERN _tx_thread_secure_stack_context_save EXTERN _tx_thread_secure_mode_stack_allocate EXTERN _tx_thread_secure_mode_stack_free +#ifdef TX_LOW_POWER + EXTERN tx_low_power_enter + EXTERN tx_low_power_exit +#endif ; ; SECTION `.text`:CODE:NOROOT(2) @@ -41,7 +45,7 @@ ;/* FUNCTION RELEASE */ ;/* */ ;/* _tx_thread_schedule Cortex-M23/IAR */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* Scott Larson, Microsoft Corporation */ @@ -74,6 +78,9 @@ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 Scott Larson Initial Version 6.1 */ +;/* 04-02-2021 Scott Larson Modified comment(s), added */ +;/* low power code, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_schedule(VOID) @@ -266,11 +273,25 @@ __tx_ts_wait: LDR r1, [r2] ; Pickup the next thread to execute pointer STR r1, [r0] ; Store it in the current pointer CBNZ r1, __tx_ts_ready ; If non-NULL, a new thread is ready! + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_enter ; Possibly enter low power mode + POP {r0-r3} +#endif + #ifdef TX_ENABLE_WFI DSB ; Ensure no outstanding memory transactions WFI ; Wait for interrupt ISB ; Ensure pipeline is flushed #endif + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_exit ; Exit low power mode + POP {r0-r3} +#endif + CPSIE i ; Enable interrupts B __tx_ts_wait ; Loop to continue waiting ; diff --git a/ports/cortex_m3/ac5/inc/tx_port.h b/ports/cortex_m3/ac5/inc/tx_port.h index b68f3659..8f2ce32d 100644 --- a/ports/cortex_m3/ac5/inc/tx_port.h +++ b/ports/cortex_m3/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -329,7 +332,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC5 Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m3/ac5/readme_threadx.txt b/ports/cortex_m3/ac5/readme_threadx.txt index 8b76305b..cc441de0 100644 --- a/ports/cortex_m3/ac5/readme_threadx.txt +++ b/ports/cortex_m3/ac5/readme_threadx.txt @@ -135,6 +135,10 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Fix compilation error + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m3/ac6/inc/tx_port.h b/ports/cortex_m3/ac6/inc/tx_port.h index 71b052e8..c5a10d9c 100644 --- a/ports/cortex_m3/ac6/inc/tx_port.h +++ b/ports/cortex_m3/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -319,7 +322,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -332,7 +335,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -343,7 +346,7 @@ unsigned int interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m3/ac6/readme_threadx.txt b/ports/cortex_m3/ac6/readme_threadx.txt index 81f47fb7..0772cdbf 100644 --- a/ports/cortex_m3/ac6/readme_threadx.txt +++ b/ports/cortex_m3/ac6/readme_threadx.txt @@ -146,6 +146,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m3/ghs/inc/tx_port.h b/ports/cortex_m3/ghs/inc/tx_port.h index 3ba5b354..f1b2c306 100644 --- a/ports/cortex_m3/ghs/inc/tx_port.h +++ b/ports/cortex_m3/ghs/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/GHS */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -324,7 +327,7 @@ typedef unsigned short USHORT; UINT _tx_thread_interrupt_disable(VOID); VOID _tx_thread_interrupt_restore(UINT previous_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); @@ -332,7 +335,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; /* Define ThreadX interrupt lockout and restore macros using asm macros. */ @@ -376,8 +379,8 @@ asm void restore_ints(int a) /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/GHS Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/GHS Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m3/ghs/readme_threadx.txt b/ports/cortex_m3/ghs/readme_threadx.txt index f401b81e..ad1110fe 100644 --- a/ports/cortex_m3/ghs/readme_threadx.txt +++ b/ports/cortex_m3/ghs/readme_threadx.txt @@ -148,6 +148,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m3/gnu/inc/tx_port.h b/ports/cortex_m3/gnu/inc/tx_port.h index b5a75fd3..f70397a3 100644 --- a/ports/cortex_m3/gnu/inc/tx_port.h +++ b/ports/cortex_m3/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -50,6 +50,9 @@ /* 05-19-2020 William E. Lamie Initial Version 6.0 */ /* 09-30-2020 William E. Lamie Modified comment(s), */ /* resulting in version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -321,7 +324,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -334,7 +337,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -345,7 +348,7 @@ unsigned int interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m3/gnu/readme_threadx.txt b/ports/cortex_m3/gnu/readme_threadx.txt index cc9b14d2..ea4f807d 100644 --- a/ports/cortex_m3/gnu/readme_threadx.txt +++ b/ports/cortex_m3/gnu/readme_threadx.txt @@ -143,6 +143,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m3/iar/inc/tx_port.h b/ports/cortex_m3/iar/inc/tx_port.h index 6c18fab3..78c3575a 100644 --- a/ports/cortex_m3/iar/inc/tx_port.h +++ b/ports/cortex_m3/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -357,7 +360,7 @@ __istate_t interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m3/iar/readme_threadx.txt b/ports/cortex_m3/iar/readme_threadx.txt index 61eb7b07..24b8cd80 100644 --- a/ports/cortex_m3/iar/readme_threadx.txt +++ b/ports/cortex_m3/iar/readme_threadx.txt @@ -148,6 +148,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m3/keil/inc/tx_port.h b/ports/cortex_m3/keil/inc/tx_port.h index 39ed4e53..6aea4610 100644 --- a/ports/cortex_m3/keil/inc/tx_port.h +++ b/ports/cortex_m3/keil/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M3/Keil */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -329,7 +332,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/Keil Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/Keil Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m3/keil/readme_threadx.txt b/ports/cortex_m3/keil/readme_threadx.txt index e7eeabb5..9cd94bc2 100644 --- a/ports/cortex_m3/keil/readme_threadx.txt +++ b/ports/cortex_m3/keil/readme_threadx.txt @@ -142,6 +142,10 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Fix compilation error + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m33/ac5/inc/tx_port.h b/ports/cortex_m33/ac5/inc/tx_port.h index 855e0491..4cf5588e 100644 --- a/ports/cortex_m33/ac5/inc/tx_port.h +++ b/ports/cortex_m33/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M33/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -506,7 +509,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -535,7 +538,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC5 Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m33/ac5/readme_threadx.txt b/ports/cortex_m33/ac5/readme_threadx.txt index 6846668b..65f9624e 100644 --- a/ports/cortex_m33/ac5/readme_threadx.txt +++ b/ports/cortex_m33/ac5/readme_threadx.txt @@ -204,6 +204,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using AC5 tools. diff --git a/ports/cortex_m33/ac6/inc/tx_port.h b/ports/cortex_m33/ac6/inc/tx_port.h index 061edfc5..c53e8b37 100644 --- a/ports/cortex_m33/ac6/inc/tx_port.h +++ b/ports/cortex_m33/ac6/inc/tx_port.h @@ -510,7 +510,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); diff --git a/ports/cortex_m33/ac6/readme_threadx.txt b/ports/cortex_m33/ac6/readme_threadx.txt index 74b488f8..e9a434ad 100644 --- a/ports/cortex_m33/ac6/readme_threadx.txt +++ b/ports/cortex_m33/ac6/readme_threadx.txt @@ -205,6 +205,13 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Added low power support + +03-02-2021 The following files were changed/added for version 6.1.5: + tx_port.h Added ULONG64_DEFINED + 09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using AC6 tools. diff --git a/ports/cortex_m33/ac6/src/tx_thread_schedule.S b/ports/cortex_m33/ac6/src/tx_thread_schedule.S index cd6b3e67..1f50c8bc 100644 --- a/ports/cortex_m33/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_m33/ac6/src/tx_thread_schedule.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_schedule Cortex-M33/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -59,6 +59,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 04-02-2021 Scott Larson Modified comment(s), added */ +/* low power code, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) @@ -248,11 +251,25 @@ __tx_ts_wait: LDR r1, [r2] // Pickup the next thread to execute pointer STR r1, [r0] // Store it in the current pointer CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_enter // Possibly enter low power mode + POP {r0-r3} +#endif + #ifdef TX_ENABLE_WFI DSB // Ensure no outstanding memory transactions WFI // Wait for interrupt ISB // Ensure pipeline is flushed #endif + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_exit // Exit low power mode + POP {r0-r3} +#endif + CPSIE i // Enable interrupts B __tx_ts_wait // Loop to continue waiting diff --git a/ports/cortex_m33/gnu/inc/tx_port.h b/ports/cortex_m33/gnu/inc/tx_port.h index 4bfb27e3..653be90e 100644 --- a/ports/cortex_m33/gnu/inc/tx_port.h +++ b/ports/cortex_m33/gnu/inc/tx_port.h @@ -546,7 +546,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -559,7 +559,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); diff --git a/ports/cortex_m33/gnu/readme_threadx.txt b/ports/cortex_m33/gnu/readme_threadx.txt index 72f6e25e..51ab47f0 100644 --- a/ports/cortex_m33/gnu/readme_threadx.txt +++ b/ports/cortex_m33/gnu/readme_threadx.txt @@ -188,6 +188,13 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Added low power support + +03-02-2021 The following files were changed/added for version 6.1.5: + tx_port.h Added ULONG64_DEFINED + 09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using GNU tools. diff --git a/ports/cortex_m33/gnu/src/tx_thread_schedule.S b/ports/cortex_m33/gnu/src/tx_thread_schedule.S index 59717066..e88d6897 100644 --- a/ports/cortex_m33/gnu/src/tx_thread_schedule.S +++ b/ports/cortex_m33/gnu/src/tx_thread_schedule.S @@ -26,7 +26,7 @@ /* FUNCTION RELEASE */ /* */ /* _tx_thread_schedule Cortex-M33/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -59,6 +59,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 04-02-2021 Scott Larson Modified comment(s), added */ +/* low power code, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) @@ -248,11 +251,25 @@ __tx_ts_wait: LDR r1, [r2] // Pickup the next thread to execute pointer STR r1, [r0] // Store it in the current pointer CBNZ r1, __tx_ts_ready // If non-NULL, a new thread is ready! + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_enter // Possibly enter low power mode + POP {r0-r3} +#endif + #ifdef TX_ENABLE_WFI DSB // Ensure no outstanding memory transactions WFI // Wait for interrupt ISB // Ensure pipeline is flushed #endif + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_exit // Exit low power mode + POP {r0-r3} +#endif + CPSIE i // Enable interrupts B __tx_ts_wait // Loop to continue waiting diff --git a/ports/cortex_m33/iar/readme_threadx.txt b/ports/cortex_m33/iar/readme_threadx.txt index 588fa29f..73895476 100644 --- a/ports/cortex_m33/iar/readme_threadx.txt +++ b/ports/cortex_m33/iar/readme_threadx.txt @@ -199,6 +199,13 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Added low power support + +03-02-2021 The following files were changed/added for version 6.1.5: + tx_port.h Added ULONG64_DEFINED + 09-30-2020 Initial ThreadX 6.1 version for Cortex-M33 using IAR's ARM tools. diff --git a/ports/cortex_m33/iar/src/tx_thread_schedule.s b/ports/cortex_m33/iar/src/tx_thread_schedule.s index e8962618..a00e03d3 100644 --- a/ports/cortex_m33/iar/src/tx_thread_schedule.s +++ b/ports/cortex_m33/iar/src/tx_thread_schedule.s @@ -32,6 +32,10 @@ EXTERN _tx_thread_secure_stack_context_save EXTERN _tx_thread_secure_mode_stack_allocate EXTERN _tx_thread_secure_mode_stack_free +#ifdef TX_LOW_POWER + EXTERN tx_low_power_enter + EXTERN tx_low_power_exit +#endif ; ; SECTION `.text`:CODE:NOROOT(2) @@ -41,7 +45,7 @@ ;/* FUNCTION RELEASE */ ;/* */ ;/* _tx_thread_schedule Cortex-M33/IAR */ -;/* 6.1 */ +;/* 6.1.6 */ ;/* AUTHOR */ ;/* */ ;/* Scott Larson, Microsoft Corporation */ @@ -74,6 +78,9 @@ ;/* DATE NAME DESCRIPTION */ ;/* */ ;/* 09-30-2020 Scott Larson Initial Version 6.1 */ +;/* 04-02-2021 Scott Larson Modified comment(s), added */ +;/* low power code, */ +;/* resulting in version 6.1.6 */ ;/* */ ;/**************************************************************************/ ;VOID _tx_thread_schedule(VOID) @@ -261,11 +268,25 @@ __tx_ts_wait: LDR r1, [r2] ; Pickup the next thread to execute pointer STR r1, [r0] ; Store it in the current pointer CBNZ r1, __tx_ts_ready ; If non-NULL, a new thread is ready! + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_enter ; Possibly enter low power mode + POP {r0-r3} +#endif + #ifdef TX_ENABLE_WFI DSB ; Ensure no outstanding memory transactions WFI ; Wait for interrupt ISB ; Ensure pipeline is flushed #endif + +#ifdef TX_LOW_POWER + PUSH {r0-r3} + BL tx_low_power_exit ; Exit low power mode + POP {r0-r3} +#endif + CPSIE i ; Enable interrupts B __tx_ts_wait ; Loop to continue waiting ; diff --git a/ports/cortex_m4/ac5/inc/tx_port.h b/ports/cortex_m4/ac5/inc/tx_port.h index c220665b..f4099d25 100644 --- a/ports/cortex_m4/ac5/inc/tx_port.h +++ b/ports/cortex_m4/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -418,7 +421,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -454,7 +457,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC5 Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m4/ac5/readme_threadx.txt b/ports/cortex_m4/ac5/readme_threadx.txt index 5f207167..7b91d12a 100644 --- a/ports/cortex_m4/ac5/readme_threadx.txt +++ b/ports/cortex_m4/ac5/readme_threadx.txt @@ -199,6 +199,10 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Fix compilation error + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m4/ac6/inc/tx_port.h b/ports/cortex_m4/ac6/inc/tx_port.h index b6eb3929..d99bcbc8 100644 --- a/ports/cortex_m4/ac6/inc/tx_port.h +++ b/ports/cortex_m4/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -454,7 +457,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -467,7 +470,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -485,7 +488,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m4/ac6/readme_threadx.txt b/ports/cortex_m4/ac6/readme_threadx.txt index 7ae85c86..f09babe9 100644 --- a/ports/cortex_m4/ac6/readme_threadx.txt +++ b/ports/cortex_m4/ac6/readme_threadx.txt @@ -211,6 +211,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m4/ghs/inc/tx_port.h b/ports/cortex_m4/ghs/inc/tx_port.h index 3370092a..ce4c28ed 100644 --- a/ports/cortex_m4/ghs/inc/tx_port.h +++ b/ports/cortex_m4/ghs/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/GHS */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -324,7 +327,7 @@ typedef unsigned short USHORT; UINT _tx_thread_interrupt_disable(VOID); VOID _tx_thread_interrupt_restore(UINT previous_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); @@ -332,7 +335,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; /* Define ThreadX interrupt lockout and restore macros using asm macros. */ @@ -383,8 +386,8 @@ void tx_thread_fpu_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GHS Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GHS Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m4/ghs/readme_threadx.txt b/ports/cortex_m4/ghs/readme_threadx.txt index 4fa2dff2..86a49522 100644 --- a/ports/cortex_m4/ghs/readme_threadx.txt +++ b/ports/cortex_m4/ghs/readme_threadx.txt @@ -225,6 +225,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m4/gnu/inc/tx_port.h b/ports/cortex_m4/gnu/inc/tx_port.h index 604e27ba..6b65e04c 100644 --- a/ports/cortex_m4/gnu/inc/tx_port.h +++ b/ports/cortex_m4/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -50,6 +50,9 @@ /* 05-19-2020 William E. Lamie Initial Version 6.0 */ /* 09-30-2020 William E. Lamie Modified comment(s), */ /* resulting in version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -456,7 +459,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -469,7 +472,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -487,7 +490,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m4/gnu/readme_threadx.txt b/ports/cortex_m4/gnu/readme_threadx.txt index f3df3a68..383c72fd 100644 --- a/ports/cortex_m4/gnu/readme_threadx.txt +++ b/ports/cortex_m4/gnu/readme_threadx.txt @@ -208,6 +208,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m4/iar/inc/tx_port.h b/ports/cortex_m4/iar/inc/tx_port.h index 81656f62..11955598 100644 --- a/ports/cortex_m4/iar/inc/tx_port.h +++ b/ports/cortex_m4/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -477,7 +480,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m4/iar/readme_threadx.txt b/ports/cortex_m4/iar/readme_threadx.txt index 13fcc758..cd999e46 100644 --- a/ports/cortex_m4/iar/readme_threadx.txt +++ b/ports/cortex_m4/iar/readme_threadx.txt @@ -214,6 +214,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m4/keil/inc/tx_port.h b/ports/cortex_m4/keil/inc/tx_port.h index 85489c1a..e1c5ac2e 100644 --- a/ports/cortex_m4/keil/inc/tx_port.h +++ b/ports/cortex_m4/keil/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M4/Keil */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -418,7 +421,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -454,7 +457,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/Keil Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M4/Keil Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m4/keil/readme_threadx.txt b/ports/cortex_m4/keil/readme_threadx.txt index a35fe950..12848341 100644 --- a/ports/cortex_m4/keil/readme_threadx.txt +++ b/ports/cortex_m4/keil/readme_threadx.txt @@ -200,6 +200,10 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Fix compilation error + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m7/ac5/inc/tx_port.h b/ports/cortex_m7/ac5/inc/tx_port.h index e621a41a..21483048 100644 --- a/ports/cortex_m7/ac5/inc/tx_port.h +++ b/ports/cortex_m7/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -418,7 +421,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); @@ -454,7 +457,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC5 Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m7/ac5/readme_threadx.txt b/ports/cortex_m7/ac5/readme_threadx.txt index db1def58..24dd565c 100644 --- a/ports/cortex_m7/ac5/readme_threadx.txt +++ b/ports/cortex_m7/ac5/readme_threadx.txt @@ -199,6 +199,10 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + tx_thread_schedule.s Fix compilation error + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m7/ac6/inc/tx_port.h b/ports/cortex_m7/ac6/inc/tx_port.h index f73dc482..349eea9c 100644 --- a/ports/cortex_m7/ac6/inc/tx_port.h +++ b/ports/cortex_m7/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -451,7 +454,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -464,7 +467,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -482,7 +485,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m7/ac6/readme_threadx.txt b/ports/cortex_m7/ac6/readme_threadx.txt index 9fd4abc2..5519194e 100644 --- a/ports/cortex_m7/ac6/readme_threadx.txt +++ b/ports/cortex_m7/ac6/readme_threadx.txt @@ -202,6 +202,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m7/ghs/inc/tx_port.h b/ports/cortex_m7/ghs/inc/tx_port.h index acab31b7..82442c64 100644 --- a/ports/cortex_m7/ghs/inc/tx_port.h +++ b/ports/cortex_m7/ghs/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/GHS */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -324,7 +327,7 @@ typedef unsigned short USHORT; UINT _tx_thread_interrupt_disable(VOID); VOID _tx_thread_interrupt_restore(UINT previous_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); @@ -332,7 +335,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; /* Define ThreadX interrupt lockout and restore macros using asm macros. */ @@ -383,8 +386,8 @@ void tx_thread_fpu_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GHS Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GHS Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m7/ghs/readme_threadx.txt b/ports/cortex_m7/ghs/readme_threadx.txt index e90e0d9e..22466c4e 100644 --- a/ports/cortex_m7/ghs/readme_threadx.txt +++ b/ports/cortex_m7/ghs/readme_threadx.txt @@ -225,6 +225,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m7/gnu/inc/tx_port.h b/ports/cortex_m7/gnu/inc/tx_port.h index 6fdefd0b..cc552c1e 100644 --- a/ports/cortex_m7/gnu/inc/tx_port.h +++ b/ports/cortex_m7/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -50,6 +50,9 @@ /* 05-19-2020 William E. Lamie Initial Version 6.0 */ /* 09-30-2020 William E. Lamie Modified comment(s), */ /* resulting in version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -453,7 +456,7 @@ unsigned int interrupt_save; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = __disable_interrupts(); #define TX_RESTORE __restore_interrupts(interrupt_save); @@ -466,7 +469,7 @@ unsigned int interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -484,7 +487,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_m7/gnu/readme_threadx.txt b/ports/cortex_m7/gnu/readme_threadx.txt index 2afb4d21..7f5ace0c 100644 --- a/ports/cortex_m7/gnu/readme_threadx.txt +++ b/ports/cortex_m7/gnu/readme_threadx.txt @@ -199,6 +199,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_m7/iar/inc/tx_port.h b/ports/cortex_m7/iar/inc/tx_port.h index d465e382..c86f6c0f 100644 --- a/ports/cortex_m7/iar/inc/tx_port.h +++ b/ports/cortex_m7/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -483,7 +486,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m7/iar/readme_threadx.txt b/ports/cortex_m7/iar/readme_threadx.txt index 97a1c926..9d178cfa 100644 --- a/ports/cortex_m7/iar/readme_threadx.txt +++ b/ports/cortex_m7/iar/readme_threadx.txt @@ -206,6 +206,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 03-02-2021 The following files were changed/added for version 6.1.5: tx_thread_schedule.s Added low power feature diff --git a/ports/cortex_r4/ac5/inc/tx_port.h b/ports/cortex_r4/ac5/inc/tx_port.h index d73a6c82..24f67c58 100644 --- a/ports/cortex_r4/ac5/inc/tx_port.h +++ b/ports/cortex_r4/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R4/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -265,7 +268,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -324,7 +327,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r4/ac5/readme_threadx.txt b/ports/cortex_r4/ac5/readme_threadx.txt index 01b3e2da..d27aa166 100644 --- a/ports/cortex_r4/ac5/readme_threadx.txt +++ b/ports/cortex_r4/ac5/readme_threadx.txt @@ -539,6 +539,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-R4 using AC5 tools. diff --git a/ports/cortex_r4/ac6/inc/tx_port.h b/ports/cortex_r4/ac6/inc/tx_port.h index 991db05d..b2feb970 100644 --- a/ports/cortex_r4/ac6/inc/tx_port.h +++ b/ports/cortex_r4/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R4/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -268,7 +271,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -299,7 +302,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -327,7 +330,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r4/ac6/readme_threadx.txt b/ports/cortex_r4/ac6/readme_threadx.txt index ab6eebfa..b861033f 100644 --- a/ports/cortex_r4/ac6/readme_threadx.txt +++ b/ports/cortex_r4/ac6/readme_threadx.txt @@ -382,6 +382,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-R4 using ARM tools. diff --git a/ports/cortex_r4/gnu/inc/tx_port.h b/ports/cortex_r4/gnu/inc/tx_port.h index 8ae22b85..7e95871a 100644 --- a/ports/cortex_r4/gnu/inc/tx_port.h +++ b/ports/cortex_r4/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R4/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -306,7 +309,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r4/gnu/readme_threadx.txt b/ports/cortex_r4/gnu/readme_threadx.txt index 6bd41bcc..06712f8a 100644 --- a/ports/cortex_r4/gnu/readme_threadx.txt +++ b/ports/cortex_r4/gnu/readme_threadx.txt @@ -486,6 +486,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-R4 using GNU tools. diff --git a/ports/cortex_r4/green/inc/tx_port.h b/ports/cortex_r4/green/inc/tx_port.h index c066849d..446ef388 100644 --- a/ports/cortex_r4/green/inc/tx_port.h +++ b/ports/cortex_r4/green/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R4/Green Hills */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -296,7 +299,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_disable(void); void _tx_thread_interrupt_restore(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); @@ -304,7 +307,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350) @@ -381,8 +384,8 @@ asm void restore_ints(int a) /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/Green Hills Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/Green Hills Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r4/green/readme_threadx.txt b/ports/cortex_r4/green/readme_threadx.txt index 7b358c23..f0fe2220 100644 --- a/ports/cortex_r4/green/readme_threadx.txt +++ b/ports/cortex_r4/green/readme_threadx.txt @@ -500,6 +500,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 05/19/2020 Initial ThreadX version of Cortex-R4/Green Hills port. diff --git a/ports/cortex_r4/iar/inc/tx_port.h b/ports/cortex_r4/iar/inc/tx_port.h index 701b0308..bfa74d4d 100644 --- a/ports/cortex_r4/iar/inc/tx_port.h +++ b/ports/cortex_r4/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R4/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -319,9 +322,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif #define TX_DISABLE interrupt_save = __get_CPSR(); \ @@ -364,7 +367,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R4/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_r4/iar/readme_threadx.txt b/ports/cortex_r4/iar/readme_threadx.txt index 32832714..400eaa1f 100644 --- a/ports/cortex_r4/iar/readme_threadx.txt +++ b/ports/cortex_r4/iar/readme_threadx.txt @@ -416,6 +416,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version 6.1 for Cortex-R4 using IAR's ARM tools. diff --git a/ports/cortex_r5/ac5/inc/tx_port.h b/ports/cortex_r5/ac5/inc/tx_port.h index a6cf6036..d0257924 100644 --- a/ports/cortex_r5/ac5/inc/tx_port.h +++ b/ports/cortex_r5/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R5/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -265,7 +268,7 @@ typedef unsigned short USHORT; #ifndef __thumb -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save_disabled; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save_disabled; #ifdef TX_ENABLE_FIQ_SUPPORT @@ -296,7 +299,7 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); @@ -317,7 +320,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/AC5 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/AC5 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r5/ac5/readme_threadx.txt b/ports/cortex_r5/ac5/readme_threadx.txt index d6b8b6d7..9910f87e 100644 --- a/ports/cortex_r5/ac5/readme_threadx.txt +++ b/ports/cortex_r5/ac5/readme_threadx.txt @@ -519,6 +519,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-R5 using AC5 tools. diff --git a/ports/cortex_r5/ac6/inc/tx_port.h b/ports/cortex_r5/ac6/inc/tx_port.h index e27c542d..ba23733f 100644 --- a/ports/cortex_r5/ac6/inc/tx_port.h +++ b/ports/cortex_r5/ac6/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R5/AC6 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -306,7 +309,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/AC6 Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/AC6 Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r5/ac6/readme_threadx.txt b/ports/cortex_r5/ac6/readme_threadx.txt index bb3804c6..f2b1b0a4 100644 --- a/ports/cortex_r5/ac6/readme_threadx.txt +++ b/ports/cortex_r5/ac6/readme_threadx.txt @@ -315,6 +315,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-R5 using AC6 tools. diff --git a/ports/cortex_r5/gnu/inc/tx_port.h b/ports/cortex_r5/gnu/inc/tx_port.h index ec06dd37..204e623c 100644 --- a/ports/cortex_r5/gnu/inc/tx_port.h +++ b/ports/cortex_r5/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R5/GNU */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -272,14 +275,14 @@ unsigned int _tx_thread_interrupt_disable(void); unsigned int _tx_thread_interrupt_restore(UINT old_posture); -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); #define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save); #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save, tx_temp; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save, tx_temp; #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) ); @@ -306,7 +309,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/GNU Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/GNU Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r5/gnu/readme_threadx.txt b/ports/cortex_r5/gnu/readme_threadx.txt index 148bf630..a9a28305 100644 --- a/ports/cortex_r5/gnu/readme_threadx.txt +++ b/ports/cortex_r5/gnu/readme_threadx.txt @@ -486,6 +486,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX 6.1 version for Cortex-R5 using GNU tools. diff --git a/ports/cortex_r5/green/inc/tx_port.h b/ports/cortex_r5/green/inc/tx_port.h index c46ef3b8..54637fde 100644 --- a/ports/cortex_r5/green/inc/tx_port.h +++ b/ports/cortex_r5/green/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R5/Green Hills */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_disable(void); void _tx_thread_interrupt_restore(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); @@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350) @@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/Green Hills Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/Green Hills Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r5/green/readme_threadx.txt b/ports/cortex_r5/green/readme_threadx.txt index f2afb94d..62383547 100644 --- a/ports/cortex_r5/green/readme_threadx.txt +++ b/ports/cortex_r5/green/readme_threadx.txt @@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 05/19/2020 Initial ThreadX version of Cortex-R5/Green Hills port. diff --git a/ports/cortex_r5/iar/inc/tx_port.h b/ports/cortex_r5/iar/inc/tx_port.h index f2a990ed..50e6f472 100644 --- a/ports/cortex_r5/iar/inc/tx_port.h +++ b/ports/cortex_r5/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R5/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -319,9 +322,9 @@ __intrinsic void __set_CPSR( unsigned long ); #if (__VER__ < 8002000) -#define TX_INTERRUPT_SAVE_AREA unsigned long interrupt_save; +#define TX_INTERRUPT_SAVE_AREA ULONG interrupt_save; #else -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #endif #define TX_DISABLE interrupt_save = __get_CPSR(); \ @@ -364,7 +367,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/IAR Version 6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R5/IAR Version 6.1.6 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_r5/iar/readme_threadx.txt b/ports/cortex_r5/iar/readme_threadx.txt index e5bb364f..fd6174a7 100644 --- a/ports/cortex_r5/iar/readme_threadx.txt +++ b/ports/cortex_r5/iar/readme_threadx.txt @@ -416,6 +416,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 09-30-2020 Initial ThreadX version for Cortex-R5 using IAR's ARM tools. diff --git a/ports/cortex_r7/green/inc/tx_port.h b/ports/cortex_r7/green/inc/tx_port.h index 6ed7fd94..8802da2b 100644 --- a/ports/cortex_r7/green/inc/tx_port.h +++ b/ports/cortex_r7/green/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-R7/Green Hills */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -299,7 +302,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_disable(void); void _tx_thread_interrupt_restore(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); @@ -307,7 +310,7 @@ void _tx_thread_interrupt_restore(unsigned int new_po #else -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #if defined(__GHS_VERSION_NUMBER) && (__GHS_VERSION_NUMBER >= 350) @@ -391,8 +394,8 @@ void tx_thread_vfp_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R7/Green Hills Version 6.1 *"; +CHAR _tx_version_id[] = + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-R7/Green Hills Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_r7/green/readme_threadx.txt b/ports/cortex_r7/green/readme_threadx.txt index 4fd097d4..6f498f11 100644 --- a/ports/cortex_r7/green/readme_threadx.txt +++ b/ports/cortex_r7/green/readme_threadx.txt @@ -517,6 +517,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 05/19/2020 Initial ThreadX version of Cortex-R7/Green Hills port. diff --git a/ports/risc-v32/iar/inc/tx_port.h b/ports/risc-v32/iar/inc/tx_port.h index f2db9c14..670ebf57 100644 --- a/ports/risc-v32/iar/inc/tx_port.h +++ b/ports/risc-v32/iar/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h RISC-V32/IAR */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -47,7 +47,10 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -235,7 +238,7 @@ typedef unsigned short USHORT; unsigned int _tx_thread_interrupt_control(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register INT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); #define TX_RESTORE _tx_thread_interrupt_control(interrupt_save); @@ -263,7 +266,7 @@ unsigned int _tx_thread_interrupt_control(uns #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX RISC-V32/IAR Version G6.1 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX RISC-V32/IAR Version G6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/risc-v32/iar/readme_threadx.txt b/ports/risc-v32/iar/readme_threadx.txt index 5b915792..99504275 100644 --- a/ports/risc-v32/iar/readme_threadx.txt +++ b/ports/risc-v32/iar/readme_threadx.txt @@ -233,6 +233,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 08/09/2020 Initial ThreadX version for RISC-V using IAR Tools. diff --git a/ports/rxv2/ccrx/inc/tx_port.h b/ports/rxv2/ccrx/inc/tx_port.h index 8c443e84..332a7711 100644 --- a/ports/rxv2/ccrx/inc/tx_port.h +++ b/ports/rxv2/ccrx/inc/tx_port.h @@ -222,7 +222,7 @@ static void _tx_thread_interrupt_restore(UINT old_posture){ MVTC r2,PSW ; } -#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save; #define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable(); diff --git a/ports/rxv2/ccrx/readme_threadx.txt b/ports/rxv2/ccrx/readme_threadx.txt index c496fbb3..c1544d5b 100644 --- a/ports/rxv2/ccrx/readme_threadx.txt +++ b/ports/rxv2/ccrx/readme_threadx.txt @@ -161,6 +161,8 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition 12-31-2020 Initial ThreadX release for the RXv2 using CC-RXX tools, version 6.1.3 diff --git a/ports/rxv2/gnu/readme_threadx.txt b/ports/rxv2/gnu/readme_threadx.txt index 5baf5961..d548a556 100644 --- a/ports/rxv2/gnu/readme_threadx.txt +++ b/ports/rxv2/gnu/readme_threadx.txt @@ -157,6 +157,8 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition 12-31-2020 Initial ThreadX release for the RXv2 using GNURX tools, version 6.1.3 diff --git a/ports/rxv2/iar/readme_threadx.txt b/ports/rxv2/iar/readme_threadx.txt index 0c0afd29..b672d4ff 100644 --- a/ports/rxv2/iar/readme_threadx.txt +++ b/ports/rxv2/iar/readme_threadx.txt @@ -154,6 +154,9 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition + 12-31-2020 Initial ThreadX release for the RXv2using IAR tools, version 6.1.3 diff --git a/ports/xtensa/xcc/inc/tx_port.h b/ports/xtensa/xcc/inc/tx_port.h index 9438a7c8..d06f927e 100644 --- a/ports/xtensa/xcc/inc/tx_port.h +++ b/ports/xtensa/xcc/inc/tx_port.h @@ -35,7 +35,10 @@ /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */ +/* 11-09-2020 Cadence Design Systems Initial Version 6.1.2 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -436,7 +439,7 @@ extern void _xt_coproc_release(void * coproc_sa_base); extern unsigned int _tx_thread_interrupt_control(unsigned int new_posture); -#define TX_INTERRUPT_SAVE_AREA register unsigned int interrupt_save; +#define TX_INTERRUPT_SAVE_AREA register UINT interrupt_save; #ifdef TX_DISABLE_INLINE_MACROS #define TX_DISABLE interrupt_save = _tx_thread_interrupt_control(TX_INT_DISABLE); @@ -468,7 +471,7 @@ extern int xt_timer_intnum; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. * Azure RTOS Xtensa Version 6.1.3 *"; + "Copyright (c) Microsoft Corporation. * Azure RTOS Xtensa Version 6.1.6 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/xtensa/xcc/readme_threadx.txt b/ports/xtensa/xcc/readme_threadx.txt index 90fc92d7..29413318 100644 --- a/ports/xtensa/xcc/readme_threadx.txt +++ b/ports/xtensa/xcc/readme_threadx.txt @@ -771,241 +771,11 @@ For generic code revision information, please refer to the readme_threadx_generi file, which is included in your distribution. The following details the revision information associated with this specific port of ThreadX: -04/26/2019 ThreadX Xtensa version 5.12. This release adds support for the Xtensa XEA3 - exception architecture and the Xtensa NX processor family. The following - changes/enhancements are included: - Makefile Changes to support building for Xtensa - XEA3 configurations. - xtensa_vectors_xea3.S New file added, interrupt and exception - dispatch code for XEA3. +04-02-2021 Release 6.1.6 changes: + tx_port.h Updated macro definition - tx_api_asm.h Changes and additions to support the Xtensa - tx_port.h XEA3 exception architecture. - xtensa_api.h - xtensa_context.h - xtensa_rtos.h - xtensa_timer.h - tx_initialize_low_level.c - tx_thread_context_restore.S - tx_thread_context_save.S - tx_thread_interrupt_control.c - tx_thread_schedule.S - tx_thread_stack_build.S - tx_thread_system_return.S - tx_timer_interrupt.S - tx_xtensa_stack_error_handler.c - xtensa_context.S - xtensa_coproc_handler.S - xtensa_init.c - xtensa_intr.c - xtensa_intr_asm.S - xtensa_intr_wrapper.c - xtensa_vectors.S - -08/01/2017 ThreadX Xtensa version 5.11. This release includes the following changes - and enhancements/modifications: - - Makefile Build execution profile module only - if the module has been selected. - tx_api_asm.h Changed field offsets for Xtensa- - specific fields in TCB. - tx_clib_lock.c Added thread wrapper function to handle - C library setup and cleanup properly. - tx_port.h Redefined macros as required as part of - the redesigned C library thread safety support. - tx_xtensa_stack_error_handler.c Included required headers. - xtensa_intr_asm.S Placed interrupt stack explicitly in .data - section. - xtensa_intr.c Fixed return values for set exception handler - and set interrupt handler functions. - xtensa_overlay_os_hook.c Added conditions so that code is now compiled - only if overlay option is selected. - xtensa_timer.h Include TIE header files conditionally. - *.h Modified comment(s). - *.S Modified comment(s). - -03/22/2016 ThreadX Xtensa version 5.10. This release includes the following changes - and enhancements: separate user-configurable interrupt stack, support for - Xtensa C library (xclib) thread safety, minor changes to the support for - the Execution Profile kit, and minor changes to remove some compiler warnings. - This release includes the following modifications: - - tx_port.h Added support for XCLIB C library thread safety, - added support for separate interrupt stack, - added support Execution Profile Kit (EPK), and - updated version string. - tx_initialize_low_level.S Replaced by tx_initialize_low_level.c, added - support for XCLIB C library thread safety, - added support for separate interrupt stack and - moved setup of thread stack check callback in here - from demo program. - tx_thread_context_restore.S Added support for Execution Profile Kit (EPK). - tx_thread_schedule.S Added support for Execution Profile Kit (EPK), and - added support for XCLIB C library thread safety. - tx_thread_system_return.S Added support for Execution Profile Kit (EPK). - tx_api_asm.h Added support for XCLIB C library thread safety. - tx_clib_lock.c Added support for XCLIB C library thread safety. - xtensa_api.h Corrected issues with function declarations. - xtensa_context.h Corrected build errors when TX_NO_TIMER defined. - xtensa_intr_asm.S Added support for separate interrupt stack. - xtensa_overlay_os_hook.c Corrected compiler warnings. - xtensa_vectors.S Added support for Execution Profile Kit (EPK), and - added compiler warnings. - xtensa_timer.h Added timer related defines to simplify timer setup code. - Makefile Various misc updates, removed some obsolete targets. - tx_intr_demo.c Added support for XCLIB C library thread safety. - *.h Modified comment(s). - *.S Modified comment(s). - -06/01/2015 ThreadX Xtensa version 5.9. This release includes the following modifications: - - tx_port.h Changed default timer thread stack size logic, - updated coprocessor support, and updated - version string. - tx_initialize_low_level.S Modified timer setup. - tx_thread_schedule.S Added setup for timing test option. - tx_thread_stack_build.S Added virtual priority mask setup. - tx_thread_system_return.S Added support for coprocessor save. - xtensa_context.h Added additional interrupt support, including - coprocessor save/restore. - xtensa_context.S Added additional interrupt support, including - coprocessor save/restore. - xtensa_overlay_os_hook.c Added include of overlay.h. - xtensa_vectors.S Added new interrupt support and functionality. - xtensa_api.h Added new file for this release. - xtensa_intr.c Added new file for this release. - xtensa_intr_asm.S Added new file for this release. - *.h Modified comment(s). - *.S Modified comment(s). - -07/31/2014 ThreadX Xtensa version 5.8. This release includes the following modifications: - - tx_port.h Added in-line interrupt disable and - restore macros, and updated version string. - tx_thread_system_return.S Added context save optimization. - xtensa_context.h Added overlay support. - xtensa_context.S Added overlay support. - xtensa_overlay_os_hook.c Added new file for overlay support. - *.h Modified comment(s). - *.S Modified comment(s). - -10/01/2011 ThreadX Xtensa version 5.7. This release includes the following modifications: - - tx_port.h Updated version string. - tx_thread_context_restore.S Changed to 16-bit save of tx_thread_cp_state. - tx_thread_schedule.S Changed to 16-bit restore of tx_thread_cp_state. - tx_thread_system_return.S Changed to 16-bit save of tx_thread_cp_state. - xtensa_context.h Modified alignment constants and macros. - xtensa_context.S Removed initial alignment adjustment. - *.h Modified comment(s). - *.S Modified comment(s). - -07/15/2011 ThreadX Xtensa version 5.6. This release includes the following modifications: - - tx_port.h Modified control block and thread processing - extensions to be compatible with all cores, - and updated version string. - - tx_clib_lock.c Added code to not use priority inheritance when - running the regression testsuite. - tx_timer_interrupt.S Added code to optionally call user timer ISR. - xtensa_timer.h Adjusted timer for testsuite to pass under - simulation. - xtensa_vectors.S Fixed several issues in coprocessor context - switch code. - *.S Modified comment(s). - -01/28/2011 ThreadX Xtensa version 5.5. This release includes the following modifications: - - tx_port.h Changed version ID and added alignment padding. - tx_thread_stack_build.s Added code to clear solicited stack frame flag. - xtensa_context.h Added logic to support Xtensa processors with - load/store units wider than 128-bits - xtensa_context.s Added logic to support Xtensa processors with - load/store units wider than 128-bits - xtensa_vectors.s Added logic to support Xtensa processors with - load/store units wider than 128-bits - *.s Modified comment(s). - -05/01/2010 ThreadX Xtensa version 5.4. This release includes the following modifications: - - tx_port.h Changed version ID. - tx_thread_system_return.s Changed code to preserve current time-slice value. - *.s Modified comment(s). - -07/15/2009 ThreadX Xtensa version 5.3. It includes the following modifications: - - tx_port.h Added include of string.h, added GDBIO - constants, and modified version ID string. - tx_clib_lock.c Added include of stdlib.h. - tx_thread_context_save.S Added "XCHAL_CP_NUM > 0" conditional around - _tx_thread_coproc_state function definition. - tx_thread_schedule.S Removed #else conditional and replaced RET - macro with assembly code. - tx_thread_system_return.S Replaced ENTRY macro with assembly code. - xtensa_context.h Modified call frame offsets. - xtensa_timer.h Modified timer constants and added extern - for _xt_tick_diviso_init function. - xtensa_vectors.S Replaced exit macros. - tx*.h Modified comment(s). - tx*.c Modified comment(s). - tx*.S Modified comment(s). - -06/18/2008 ThreadX Xtensa version 5.2. It includes the following modifications: - - tx_port.h Added "extern" to the interrupt control - function prototype, and modified - version ID string. - tx_api_asm.h Fixed bug whereby tx_thread_cp_state - was off by 1 word and overlapped - tx_thread_name if TX_THREAD_SAFE_CLIB - was not defined. - xtensa_vectors.S Strengthened syncs for strict ISA - conformance. Aligned exit dispatchers. - tx*.h Modified comment(s). - tx*.c Modified comment(s). - tx*.S Modified comment(s). - -04/02/2007 ThreadX Xtensa version 5.1. This release adds minor enhancements - and supports evaluation boards via a new board independent "XTBSP" - API (allowing ThreadX to take advantage of any supported board) - and deprecates board-specific code for the obsolete XT2000. - It includes the following modifications: - - tx_port.h Co-proc check uses XCHAL_CP_NUM, - deprecated XT_XT2000 option, - included tx_user.h first, and - made TX_MAX_PRIORITIES visible - to assembler code. - tx_xtensa_stack_error_handler.c Accessed board's display via API - and deprecated XT_XT2000 option. - tx_initialize_low_level.S Co-proc check uses XCHAL_CP_NUM, - modified timer setup and - supported TX_NO_TIMER. - tx_thread_context_restore.S Co-proc check uses XCHAL_CP_NUM. - tx_thread_schedule.S Co-proc check uses XCHAL_CP_NUM. - tx_thread_system_return.S Co-proc check uses XCHAL_CP_NUM. - tx_timer_interrupt.S Use tick divisor computed via - API and support TX_NO_TIMER. - xtensa_context.h Co-proc check uses XCHAL_CP_NUM. - xtensa_context.S Co-proc check uses XCHAL_CP_NUM. - xtensa_init.c Added new initialization code to - set tick timer using board API. - xtensa_rtos.h Allowed tx_user.h macros to - affect Xtensa-generic macros and - supported TX_NO_TIMER. - xtensa_timer.h Updated timer configuration - logic and supported TX_NO_TIMER. - xtensa_vectors.S Co-proc check uses XCHAL_CP_NUM - and updated logic for long jumps - and supported TX_NO_TIMER. - tx*.h Modified comment(s). - tx*.c Modified comment(s). - tx*.S Modified comment(s). - -10/10/2006 Initial ThreadX version for Xtensa configurable processors - and Diamond pre-configured processors using Xtensa Tools. +12-31-2020 Initial Version 6.1.3 Copyright(c) 1996-2020 Microsoft Corporation |