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authorFrédéric Desbiens <[email protected]>2026-10-02 10:42:44 -0400
committerGitHub <[email protected]>2026-10-02 10:42:44 -0400
commit93387b0a60382a29579bbad5045c68328e3751df (patch)
tree42be790d602cb76f55090e5a7c418df7ea2b3428 /ports_arch/ARMv8-A/update.ps1
parent44d7c95c582d415c4ad84527180b29c93c3bf664 (diff)
parent28281cd5647d4671236ca08d19bd18ed15b2265a (diff)
Merge pull request #783 from eclipse-threadx/devv6.5.2.202603_rel
Merged changes ahead of the v6.5.2.202603 release
Diffstat (limited to 'ports_arch/ARMv8-A/update.ps1')
-rw-r--r--ports_arch/ARMv8-A/update.ps133
1 files changed, 27 insertions, 6 deletions
diff --git a/ports_arch/ARMv8-A/update.ps1 b/ports_arch/ARMv8-A/update.ps1
index 0663b603..98ba818d 100644
--- a/ports_arch/ARMv8-A/update.ps1
+++ b/ports_arch/ARMv8-A/update.ps1
@@ -77,7 +77,13 @@ Write-Verbose ("Copy regression test: $CopyRegressionTest")
Write-Verbose ("Patch files: $PatchFiles")
Write-Verbose ("LogDir: $LogDir")
-$cores = @("cortex_a35", "cortex_a53", "cortex_a55", "cortex_a57", "cortex_a65", "cortex_a65ae", "cortex_a72", "cortex_a73", "cortex_a75", "cortex_a76", "cortex_a76ae", "cortex_a77")
+$cores = @("cortex_a34", "cortex_a35", "cortex_a53", "cortex_a55", "cortex_a57", "cortex_a65", "cortex_a65ae", "cortex_a72", "cortex_a73", "cortex_a75", "cortex_a76", "cortex_a76ae", "cortex_a77")
+
+# Cortex-A78 ships as an SMP port only: ports_smp\cortex_a78_smp exists but
+# ports\cortex_a78 does not. Listing it separately keeps the generator from
+# creating a ThreadX port that the tree has never had.
+$cores_smp_only = @("cortex_a78")
+
$compilers = @("ac6", "gnu")
$patches = (
('example_build\sample_threadx\.cproject', (
@@ -88,17 +94,26 @@ $patches = (
(('value="cortex-a35"'), ('value="cortex-$($core_short_lower)"')),
(('Cortex-A35.AArch64.ARMv8.Neon.Crypto'), ('Cortex-$($core_short_upper).AArch64.ARMv8.Neon.Crypto'))
)),
+ # The base_a35x<n> entries are the config database taxonomy id, which is
+ # spelt in lower case in the launch files. They used to read base_A35x<n>,
+ # which -creplace never matched, leaving every port pointing at the A35
+ # platform. The Cortex-A35x<n> SMP entries are the activity name the SMP
+ # launch files use in place of "Debug Cortex-A35"; matching the " SMP"
+ # suffix keeps them from also rewriting the FVP model name.
('example_build\sample_threadx\sample_threadx.launch', (
('Debug Cortex-A35', 'Debug Cortex-$($core_short_upper)'),
('Base_A35x1', 'Base_$($core_short_upper)x1'),
- ('base_A35x1', 'base_$($core_short_lower)x1'),
+ ('base_a35x1', 'base_$($core_short_lower)x1'),
('FVP_Base_Cortex-A35x1', 'FVP_Base_Cortex-$($core_short_upper)x1'),
+ ('Cortex-A35x1 SMP', 'Cortex-$($core_short_upper)x1 SMP'),
('Base_A35x2', 'Base_$($core_short_upper)x2'),
- ('base_A35x2', 'base_$($core_short_lower)x2'),
+ ('base_a35x2', 'base_$($core_short_lower)x2'),
('FVP_Base_Cortex-A35x2', 'FVP_Base_Cortex-$($core_short_upper)x2'),
+ ('Cortex-A35x2 SMP', 'Cortex-$($core_short_upper)x2 SMP'),
('Base_A35x4', 'Base_$($core_short_upper)x4'),
- ('base_A35x4', 'base_$($core_short_lower)x4'),
- ('FVP_Base_Cortex-A35x4', 'FVP_Base_Cortex-$($core_short_upper)x4')
+ ('base_a35x4', 'base_$($core_short_lower)x4'),
+ ('FVP_Base_Cortex-A35x4', 'FVP_Base_Cortex-$($core_short_upper)x4'),
+ ('Cortex-A35x4 SMP', 'Cortex-$($core_short_upper)x4 SMP')
))
)
@@ -119,7 +134,13 @@ Function Copy-FilesVerbose {
}
ForEach ($PortSet in $PortSets) {
- ForEach ($core in $cores) {
+ If ($PortSet -eq "tx_smp") {
+ $PortSetCores = $cores + $cores_smp_only
+ } Else {
+ $PortSetCores = $cores
+ }
+
+ ForEach ($core in $PortSetCores) {
Switch ($PortSet) {
"tx" { $core_directory = "..\..\ports\" + $core }
"tx_smp" { $core_directory = "..\..\ports_smp\" + $core + "_smp" }