patch release 6.1.2v6.1.2_rel

1 files changed, 9 insertions, 16 deletions

diff --git a/ports_module/cortex-m4/ac5/inc/txm_module_port.h b/ports_module/cortex-m4/ac5/inc/txm_module_port.h
index c720ab37..ae5a90fb 100644
--- a/ports_module/cortex-m4/ac5/inc/txm_module_port.h
+++ b/ports_module/cortex-m4/ac5/inc/txm_module_port.h
@@ -26,7 +26,7 @@
 /*  APPLICATION INTERFACE DEFINITION                       RELEASE        */
 /*                                                                        */
 /*    txm_module_port.h                               Cortex-M4/MPU/AC5   */
-/*                                                           6.1          */
+/*                                                           6.1.2        */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Scott Larson, Microsoft Corporation                                 */
@@ -41,6 +41,9 @@
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  11-09-2020     Scott Larson             Modified comment(s),          */
+/*                                            increase kernel stack size, */
+/*                                            resulting in version 6.1.2  */
 /*                                                                        */
 /**************************************************************************/
 
@@ -98,19 +101,9 @@ The following extensions must also be defined in tx_port.h:
 
 /* Define the kernel stack size for a module thread.  */
 #ifndef TXM_MODULE_KERNEL_STACK_SIZE
-#define TXM_MODULE_KERNEL_STACK_SIZE            512
+#define TXM_MODULE_KERNEL_STACK_SIZE            768
 #endif
 
-/* For the following 3 access control settings, change TEX and C, B, S (bits 21 through 16 of MPU_RASR)
- * to reflect your system memory attributes (cache, shareable, memory type).  */
-/* Code region access control: privileged read-only, outer & inner write-back, normal memory, shareable.  */
-#define TXM_MODULE_MPU_CODE_ACCESS_CONTROL      0x06070000
-/* Data region access control: execute never, read/write, outer & inner write-back, normal memory, shareable.  */
-#define TXM_MODULE_MPU_DATA_ACCESS_CONTROL      0x13070000
-/* Shared region access control: execute never, read-only, outer & inner write-back, normal memory, shareable.  */
-#define TXM_MODULE_MPU_SHARED_ACCESS_CONTROL    0x12070000
-
-
 /* Define constants specific to the tools the module can be built with for this particular modules port.  */
 
 #define TXM_MODULE_IAR_COMPILER                 0x00000000
@@ -165,9 +158,9 @@ The following extensions must also be defined in tx_port.h:
 
 #define INLINE_DECLARE inline
 
-/* Define the number of MPU entries assigned to the code and data sections. On Cortex-M parts, there can only be 7 total
-   entries, since ThreadX uses one for access to the kernel dispatch function.  */
-
+/* Define the number of MPU entries assigned to the code and data sections.
+   On Cortex-M4 parts, there are 8 total entries. ThreadX uses one for access
+   to the kernel entry function, thus 7 remain for code and data protection.  */
 #define TXM_MODULE_MANAGER_CODE_MPU_ENTRIES     4
 #define TXM_MODULE_MANAGER_DATA_MPU_ENTRIES     3
 #define TXM_MODULE_MANAGER_SHARED_MPU_INDEX     8
@@ -333,6 +326,6 @@ ULONG _txm_module_manager_region_size_get(ULONG block_size);
 
 #define TXM_MODULE_MANAGER_VERSION_ID   \
 CHAR                            _txm_module_manager_version_id[] =  \
-                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Module Cortex-M4/MPU/AC5 Version 6.1 *";
+                                    "Copyright (c) Microsoft Corporation. All rights reserved.  *  ThreadX Module Cortex-M4/MPU/AC5 Version 6.1.2 *";
 
 #endif