diff options
| author | Frédéric Desbiens <[email protected]> | 2026-03-06 19:27:49 +0100 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-03-06 19:27:49 +0100 |
| commit | 3726d7906b4808bfec7855fc088e073199df9120 (patch) | |
| tree | 8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports_module/cortex_m23 | |
| parent | 4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff) | |
| parent | c3259a216026372e3833dd8996a68f77e8595fbd (diff) | |
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports_module/cortex_m23')
115 files changed, 831 insertions, 1383 deletions
diff --git a/ports_module/cortex_m23/ac6/example_build/ARMCM23_TZ_config.txt b/ports_module/cortex_m23/ac6/example_build/ARMCM23_TZ_config.txt index 259a3e72..f07f042c 100644 --- a/ports_module/cortex_m23/ac6/example_build/ARMCM23_TZ_config.txt +++ b/ports_module/cortex_m23/ac6/example_build/ARMCM23_TZ_config.txt @@ -2,7 +2,7 @@ # instance.parameter=value #(type, mode) default = 'def value' : description : [min..max] #---------------------------------------------------------------------------------------------- cpu0.semihosting-enable=0 # (bool , init-time) default = '1' : Enable semihosting SVC traps. Applications that do not use semihosting must set this parameter to false. -idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : +idau.NUM_IDAU_REGION=0x0 # (int , init-time) default = '0xA' : cpu0.SECEXT=1 # (bool , init-time) default = '1' : Whether the ARMv8-M Security Extensions are included cpu0.SAU=0x8 # (int , init-time) default = '0x4' : Number of SAU regions (0 => no SAU) : [0x0..0x8] diff --git a/ports_module/cortex_m23/ac6/example_build/RTE/_ThreadX_Library_Project/RTE_Components.h b/ports_module/cortex_m23/ac6/example_build/RTE/_ThreadX_Library_Project/RTE_Components.h index 476361d7..66e03dff 100644 --- a/ports_module/cortex_m23/ac6/example_build/RTE/_ThreadX_Library_Project/RTE_Components.h +++ b/ports_module/cortex_m23/ac6/example_build/RTE/_ThreadX_Library_Project/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'ThreadX_Library' - * Target: 'ThreadX_Library_Project' + * Project: 'ThreadX_Library' + * Target: 'ThreadX_Library_Project' */ #ifndef RTE_COMPONENTS_H @@ -12,7 +12,7 @@ /* - * Define the Device Header File: + * Define the Device Header File: */ #define CMSIS_device_header "ARMCM23_TZ.h" diff --git a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/partition_ARMCM23.h b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/partition_ARMCM23.h index 2572a044..26bc6b93 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/partition_ARMCM23.h +++ b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/partition_ARMCM23.h @@ -326,7 +326,7 @@ // <0=>Secure // <1=>Non-Secure // <i> Value for SCB->ICSR register bit STTNS -// <i> only for single SysTick implementation +// <i> only for single SysTick implementation */ #define SCB_ICSR_STTNS_VAL 0 diff --git a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/system_ARMCM23.c b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/system_ARMCM23.c index cf78a4ed..a79cb61d 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/system_ARMCM23.c +++ b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/Device/ARMCM23_TZ/system_ARMCM23.c @@ -77,7 +77,7 @@ void SystemInit (void) #endif SystemCoreClock = SYSTEM_CLOCK; - + *(uint32_t *)0xE000ED24 = 0x000F0000; /* S: enable secure, usage, bus, mem faults */ *(uint32_t *)0xE002ED24 = 0x000F0000; /* NS: enable secure, usage, bus, mem faults */ } diff --git a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h index a37b412e..40fc81c1 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h +++ b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'demo_secure_zone' - * Target: 'FVP Simulation Model' + * Project: 'demo_secure_zone' + * Target: 'FVP Simulation Model' */ #ifndef RTE_COMPONENTS_H @@ -12,7 +12,7 @@ /* - * Define the Device Header File: + * Define the Device Header File: */ #define CMSIS_device_header "ARMCM23_TZ.h" diff --git a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/interface.c b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/interface.c index 4e6e8eee..af6533c3 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/interface.c +++ b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/interface.c @@ -31,19 +31,19 @@ typedef funcptr funcptr_NS __attribute__((cmse_nonsecure_call)); /* Non-secure callable (entry) function */ -int func1(int x) __attribute__((cmse_nonsecure_entry)) { - return x+3; +int func1(int x) __attribute__((cmse_nonsecure_entry)) { + return x+3; } /* Non-secure callable (entry) function, calling a non-secure callback function */ int func2(funcptr callback, int x) __attribute__((cmse_nonsecure_entry)) { funcptr_NS callback_NS; // non-secure callback function pointer int y; - + /* return function pointer with cleared LSB */ callback_NS = (funcptr_NS)cmse_nsfptr_create(callback); - + y = callback_NS (x+1); - + return (y+2); } diff --git a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_ns.c b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_ns.c index a65b6880..04d857ff 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_ns.c +++ b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_ns.c @@ -63,7 +63,7 @@ void ThreadA (void *argument) { static int callbackB (int val) { uint32_t flags; - + flags = osThreadFlagsWait (1U, osFlagsWaitAny, osWaitForever); if (flags == 1U) { return (val+1); diff --git a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_s.c b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_s.c index 9ff73190..25da24c8 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_s.c +++ b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/main_s.c @@ -24,36 +24,36 @@ * Title: Code template for secure main function * *---------------------------------------------------------------------------*/ - + /* Use CMSE intrinsics */ #include <arm_cmse.h> #include <stdlib.h> #include "RTE_Components.h" #include CMSIS_device_header - + /* TZ_START_NS: Start address of non-secure application */ #ifndef TZ_START_NS #define TZ_START_NS (0x00040000U) #endif - + /* typedef for non-secure callback functions */ typedef void (*funcptr_void) (void) __attribute__((cmse_nonsecure_call)); - + /* Secure main() */ int main(void) { funcptr_void NonSecure_ResetHandler; - + /* Add user setup code for secure part here*/ - + /* Set non-secure main stack (MSP_NS) */ __TZ_set_MSP_NS(*((uint32_t *)(TZ_START_NS))); - + /* Get non-secure reset handler */ NonSecure_ResetHandler = (funcptr_void)(*((uint32_t *)((TZ_START_NS) + 4U))); - + /* Start non-secure state software application */ NonSecure_ResetHandler(); - + /* Non-secure software does not return, this code is not executed */ while (1) { __NOP(); diff --git a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/tz_context.c b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/tz_context.c index f3152890..ca7f0c56 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/tz_context.c +++ b/ports_module/cortex_m23/ac6/example_build/demo_secure_zone/tz_context.c @@ -24,7 +24,7 @@ * Title: Context Management for ARMv8-M TrustZone - Sample implementation * *---------------------------------------------------------------------------*/ - + #include "RTE_Components.h" #include CMSIS_device_header #include "tz_context.h" diff --git a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.c b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.c index e4871014..d0f6b08b 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.c +++ b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.c @@ -24,17 +24,17 @@ * * ----------------------------------------------------------------------------- */ - + #include "cmsis_compiler.h" #include "rtx_os.h" - + // OS Idle Thread __WEAK __NO_RETURN void osRtxIdleThread (void *argument) { (void)argument; for (;;) {} } - + // OS Error Callback function __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) { (void)object_id; diff --git a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.h b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.h index 3021efbc..49fc392e 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.h +++ b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/CMSIS/RTX_Config.h @@ -24,52 +24,52 @@ * * ----------------------------------------------------------------------------- */ - + #ifndef RTX_CONFIG_H_ #define RTX_CONFIG_H_ - + #ifdef _RTE_ #include "RTE_Components.h" #ifdef RTE_RTX_CONFIG_H #include RTE_RTX_CONFIG_H #endif #endif - + //-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- - + // <h>System Configuration // ======================= - + // <o>Global Dynamic Memory size [bytes] <0-1073741824:8> // <i> Defines the combined global dynamic memory size. // <i> Default: 4096 #ifndef OS_DYNAMIC_MEM_SIZE #define OS_DYNAMIC_MEM_SIZE 4096 #endif - + // <o>Kernel Tick Frequency [Hz] <1-1000000> // <i> Defines base time unit for delays and timeouts. // <i> Default: 1000 (1ms tick) #ifndef OS_TICK_FREQ #define OS_TICK_FREQ 1000 #endif - + // <e>Round-Robin Thread switching // <i> Enables Round-Robin Thread switching. #ifndef OS_ROBIN_ENABLE #define OS_ROBIN_ENABLE 1 #endif - + // <o>Round-Robin Timeout <1-1000> // <i> Defines how many ticks a thread will execute before a thread switch. // <i> Default: 5 #ifndef OS_ROBIN_TIMEOUT #define OS_ROBIN_TIMEOUT 5 #endif - + // </e> - -// <o>ISR FIFO Queue + +// <o>ISR FIFO Queue // <4=> 4 entries <8=> 8 entries <12=> 12 entries <16=> 16 entries // <24=> 24 entries <32=> 32 entries <48=> 48 entries <64=> 64 entries // <96=> 96 entries <128=> 128 entries <196=> 196 entries <256=> 256 entries @@ -78,38 +78,38 @@ #ifndef OS_ISR_FIFO_QUEUE #define OS_ISR_FIFO_QUEUE 16 #endif - + // <q>Object Memory usage counters // <i> Enables object memory usage counters (requires RTX source variant). #ifndef OS_OBJ_MEM_USAGE #define OS_OBJ_MEM_USAGE 0 #endif - + // </h> - + // <h>Thread Configuration // ======================= - + // <e>Object specific Memory allocation // <i> Enables object specific memory allocation. #ifndef OS_THREAD_OBJ_MEM #define OS_THREAD_OBJ_MEM 0 #endif - + // <o>Number of user Threads <1-1000> // <i> Defines maximum number of user threads that can be active at the same time. // <i> Applies to user threads with system provided memory for control blocks. #ifndef OS_THREAD_NUM #define OS_THREAD_NUM 1 #endif - + // <o>Number of user Threads with default Stack size <0-1000> // <i> Defines maximum number of user threads with default stack size. // <i> Applies to user threads with zero stack size specified. #ifndef OS_THREAD_DEF_STACK_NUM #define OS_THREAD_DEF_STACK_NUM 0 #endif - + // <o>Total Stack size [bytes] for user Threads with user-provided Stack size <0-1073741824:8> // <i> Defines the combined stack size for user threads with user-provided stack size. // <i> Applies to user threads with user-provided stack size and system provided memory for stack. @@ -117,23 +117,23 @@ #ifndef OS_THREAD_USER_STACK_SIZE #define OS_THREAD_USER_STACK_SIZE 0 #endif - + // </e> - + // <o>Default Thread Stack size [bytes] <96-1073741824:8> // <i> Defines stack size for threads with zero stack size specified. // <i> Default: 256 #ifndef OS_STACK_SIZE #define OS_STACK_SIZE 256 #endif - + // <o>Idle Thread Stack size [bytes] <72-1073741824:8> // <i> Defines stack size for Idle thread. // <i> Default: 256 #ifndef OS_IDLE_THREAD_STACK_SIZE #define OS_IDLE_THREAD_STACK_SIZE 256 #endif - + // <o>Idle Thread TrustZone Module Identifier // <i> Defines TrustZone Thread Context Management Identifier. // <i> Applies only to cores with TrustZone technology. @@ -141,49 +141,49 @@ #ifndef OS_IDLE_THREAD_TZ_MOD_ID #define OS_IDLE_THREAD_TZ_MOD_ID 0 #endif - + // <q>Stack overrun checking // <i> Enables stack overrun check at thread switch. // <i> Enabling this option increases slightly the execution time of a thread switch. #ifndef OS_STACK_CHECK #define OS_STACK_CHECK 1 #endif - + // <q>Stack usage watermark // <i> Initializes thread stack with watermark pattern for analyzing stack usage. // <i> Enabling this option increases significantly the execution time of thread creation. #ifndef OS_STACK_WATERMARK #define OS_STACK_WATERMARK 0 #endif - -// <o>Processor mode for Thread execution -// <0=> Unprivileged mode + +// <o>Processor mode for Thread execution +// <0=> Unprivileged mode // <1=> Privileged mode // <i> Default: Privileged mode #ifndef OS_PRIVILEGE_MODE #define OS_PRIVILEGE_MODE 1 #endif - + // </h> - + // <h>Timer Configuration // ====================== - + // <e>Object specific Memory allocation // <i> Enables object specific memory allocation. #ifndef OS_TIMER_OBJ_MEM #define OS_TIMER_OBJ_MEM 0 #endif - + // <o>Number of Timer objects <1-1000> // <i> Defines maximum number of objects that can be active at the same time. // <i> Applies to objects with system provided memory for control blocks. #ifndef OS_TIMER_NUM #define OS_TIMER_NUM 1 #endif - + // </e> - + // <o>Timer Thread Priority // <8=> Low // <16=> Below Normal <24=> Normal <32=> Above Normal @@ -194,7 +194,7 @@ #ifndef OS_TIMER_THREAD_PRIO #define OS_TIMER_THREAD_PRIO 40 #endif - + // <o>Timer Thread Stack size [bytes] <0-1073741824:8> // <i> Defines stack size for Timer thread. // <i> May be set to 0 when timers are not used. @@ -202,7 +202,7 @@ #ifndef OS_TIMER_THREAD_STACK_SIZE #define OS_TIMER_THREAD_STACK_SIZE 256 #endif - + // <o>Timer Thread TrustZone Module Identifier // <i> Defines TrustZone Thread Context Management Identifier. // <i> Applies only to cores with TrustZone technology. @@ -210,7 +210,7 @@ #ifndef OS_TIMER_THREAD_TZ_MOD_ID #define OS_TIMER_THREAD_TZ_MOD_ID 0 #endif - + // <o>Timer Callback Queue entries <0-256> // <i> Number of concurrent active timer callback functions. // <i> May be set to 0 when timers are not used. @@ -218,85 +218,85 @@ #ifndef OS_TIMER_CB_QUEUE #define OS_TIMER_CB_QUEUE 4 #endif - + // </h> - + // <h>Event Flags Configuration // ============================ - + // <e>Object specific Memory allocation // <i> Enables object specific memory allocation. #ifndef OS_EVFLAGS_OBJ_MEM #define OS_EVFLAGS_OBJ_MEM 0 #endif - + // <o>Number of Event Flags objects <1-1000> // <i> Defines maximum number of objects that can be active at the same time. // <i> Applies to objects with system provided memory for control blocks. #ifndef OS_EVFLAGS_NUM #define OS_EVFLAGS_NUM 1 #endif - + // </e> - + // </h> - + // <h>Mutex Configuration // ====================== - + // <e>Object specific Memory allocation // <i> Enables object specific memory allocation. #ifndef OS_MUTEX_OBJ_MEM #define OS_MUTEX_OBJ_MEM 0 #endif - + // <o>Number of Mutex objects <1-1000> // <i> Defines maximum number of objects that can be active at the same time. // <i> Applies to objects with system provided memory for control blocks. #ifndef OS_MUTEX_NUM #define OS_MUTEX_NUM 1 #endif - + // </e> - + // </h> - + // <h>Semaphore Configuration // ========================== - + // <e>Object specific Memory allocation // <i> Enables object specific memory allocation. #ifndef OS_SEMAPHORE_OBJ_MEM #define OS_SEMAPHORE_OBJ_MEM 0 #endif - + // <o>Number of Semaphore objects <1-1000> // <i> Defines maximum number of objects that can be active at the same time. // <i> Applies to objects with system provided memory for control blocks. #ifndef OS_SEMAPHORE_NUM #define OS_SEMAPHORE_NUM 1 #endif - + // </e> - + // </h> - + // <h>Memory Pool Configuration // ============================ - + // <e>Object specific Memory allocation // <i> Enables object specific memory allocation. #ifndef OS_MEMPOOL_OBJ_MEM #define OS_MEMPOOL_OBJ_MEM 0 #endif - + // <o>Number of Memory Pool objects <1-1000> // <i> Defines maximum number of objects that can be active at the same time. // <i> Applies to objects with system provided memory for control blocks. #ifndef OS_MEMPOOL_NUM #define OS_MEMPOOL_NUM 1 #endif - + // <o>Data Storage Memory size [bytes] <0-1073741824:8> // <i> Defines the combined data storage memory size. // <i> Applies to objects with system provided memory for data storage. @@ -304,27 +304,27 @@ #ifndef OS_MEMPOOL_DATA_SIZE #define OS_MEMPOOL_DATA_SIZE 0 #endif - + // </e> - + // </h> - + // <h>Message Queue Configuration // ============================== - + // <e>Object specific Memory allocation // <i> Enables object specific memory allocation. #ifndef OS_MSGQUEUE_OBJ_MEM #define OS_MSGQUEUE_OBJ_MEM 0 #endif - + // <o>Number of Message Queue objects <1-1000> // <i> Defines maximum number of objects that can be active at the same time. // <i> Applies to objects with system provided memory for control blocks. #ifndef OS_MSGQUEUE_NUM #define OS_MSGQUEUE_NUM 1 #endif - + // <o>Data Storage Memory size [bytes] <0-1073741824:8> // <i> Defines the combined data storage memory size. // <i> Applies to objects with system provided memory for data storage. @@ -332,26 +332,26 @@ #ifndef OS_MSGQUEUE_DATA_SIZE #define OS_MSGQUEUE_DATA_SIZE 0 #endif - + // </e> - + // </h> - + // <h>Event Recorder Configuration // =============================== - + // <e>Global Initialization // <i> Initialize Event Recorder during 'osKernelInitialize'. #ifndef OS_EVR_INIT #define OS_EVR_INIT 0 #endif - + // <q>Start recording // <i> Start event recording after initialization. #ifndef OS_EVR_START #define OS_EVR_START 1 #endif - + // <h>Global Event Filter Setup // <i> Initial recording level applied to all components. // <o.0>Error events @@ -362,11 +362,11 @@ #ifndef OS_EVR_LEVEL #define OS_EVR_LEVEL 0x00U #endif - + // <h>RTOS Event Filter Setup // <i> Recording levels for RTX components. // <i> Only applicable if events for the respective component are generated. - + // <h>Memory Management // <i> Recording level for Memory Management events. // <o.0>Error events @@ -374,10 +374,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_MEMORY_LEVEL +#ifndef OS_EVR_MEMORY_LEVEL #define OS_EVR_MEMORY_LEVEL 0x01U #endif - + // <h>Kernel // <i> Recording level for Kernel events. // <o.0>Error events @@ -385,10 +385,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_KERNEL_LEVEL +#ifndef OS_EVR_KERNEL_LEVEL #define OS_EVR_KERNEL_LEVEL 0x01U #endif - + // <h>Thread // <i> Recording level for Thread events. // <o.0>Error events @@ -396,10 +396,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_THREAD_LEVEL +#ifndef OS_EVR_THREAD_LEVEL #define OS_EVR_THREAD_LEVEL 0x05U #endif - + // <h>Generic Wait // <i> Recording level for Generic Wait events. // <o.0>Error events @@ -407,10 +407,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_WAIT_LEVEL +#ifndef OS_EVR_WAIT_LEVEL #define OS_EVR_WAIT_LEVEL 0x01U #endif - + // <h>Thread Flags // <i> Recording level for Thread Flags events. // <o.0>Error events @@ -418,10 +418,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_THFLAGS_LEVEL +#ifndef OS_EVR_THFLAGS_LEVEL #define OS_EVR_THFLAGS_LEVEL 0x01U #endif - + // <h>Event Flags // <i> Recording level for Event Flags events. // <o.0>Error events @@ -429,10 +429,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_EVFLAGS_LEVEL +#ifndef OS_EVR_EVFLAGS_LEVEL #define OS_EVR_EVFLAGS_LEVEL 0x01U #endif - + // <h>Timer // <i> Recording level for Timer events. // <o.0>Error events @@ -440,10 +440,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_TIMER_LEVEL +#ifndef OS_EVR_TIMER_LEVEL #define OS_EVR_TIMER_LEVEL 0x01U #endif - + // <h>Mutex // <i> Recording level for Mutex events. // <o.0>Error events @@ -451,10 +451,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_MUTEX_LEVEL +#ifndef OS_EVR_MUTEX_LEVEL #define OS_EVR_MUTEX_LEVEL 0x01U #endif - + // <h>Semaphore // <i> Recording level for Semaphore events. // <o.0>Error events @@ -462,10 +462,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_SEMAPHORE_LEVEL +#ifndef OS_EVR_SEMAPHORE_LEVEL #define OS_EVR_SEMAPHORE_LEVEL 0x01U #endif - + // <h>Memory Pool // <i> Recording level for Memory Pool events. // <o.0>Error events @@ -473,10 +473,10 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_MEMPOOL_LEVEL +#ifndef OS_EVR_MEMPOOL_LEVEL #define OS_EVR_MEMPOOL_LEVEL 0x01U #endif - + // <h>Message Queue // <i> Recording level for Message Queue events. // <o.0>Error events @@ -484,87 +484,87 @@ // <o.2>Operation events // <o.3>Detailed operation events // </h> -#ifndef OS_EVR_MSGQUEUE_LEVEL +#ifndef OS_EVR_MSGQUEUE_LEVEL #define OS_EVR_MSGQUEUE_LEVEL 0x01U #endif - + // </h> - + // </e> - + // <h>RTOS Event Generation // <i> Enables event generation for RTX components (requires RTX source variant). - + // <q>Memory Management // <i> Enables Memory Management event generation. #ifndef OS_EVR_MEMORY #define OS_EVR_MEMORY 1 #endif - + // <q>Kernel // <i> Enables Kernel event generation. #ifndef OS_EVR_KERNEL #define OS_EVR_KERNEL 1 #endif - + // <q>Thread // <i> Enables Thread event generation. #ifndef OS_EVR_THREAD #define OS_EVR_THREAD 1 #endif - + // <q>Generic Wait // <i> Enables Generic Wait event generation. #ifndef OS_EVR_WAIT #define OS_EVR_WAIT 1 #endif - + // <q>Thread Flags // <i> Enables Thread Flags event generation. #ifndef OS_EVR_THFLAGS #define OS_EVR_THFLAGS 1 #endif - + // <q>Event Flags // <i> Enables Event Flags event generation. #ifndef OS_EVR_EVFLAGS #define OS_EVR_EVFLAGS 1 #endif - + // <q>Timer // <i> Enables Timer event generation. #ifndef OS_EVR_TIMER #define OS_EVR_TIMER 1 #endif - + // <q>Mutex // <i> Enables Mutex event generation. #ifndef OS_EVR_MUTEX #define OS_EVR_MUTEX 1 #endif - + // <q>Semaphore // <i> Enables Semaphore event generation. #ifndef OS_EVR_SEMAPHORE #define OS_EVR_SEMAPHORE 1 #endif - + // <q>Memory Pool // <i> Enables Memory Pool event generation. #ifndef OS_EVR_MEMPOOL #define OS_EVR_MEMPOOL 1 #endif - + // <q>Message Queue // <i> Enables Message Queue event generation. #ifndef OS_EVR_MSGQUEUE #define OS_EVR_MSGQUEUE 1 #endif - + // </h> - + // </h> - + // Number of Threads which use standard C/C++ library libspace // (when thread specific memory allocation is not used). #if (OS_THREAD_OBJ_MEM == 0) @@ -572,7 +572,7 @@ #else #define OS_THREAD_LIBSPACE_NUM OS_THREAD_NUM #endif - + //------------- <<< end of configuration section >>> --------------------------- - + #endif // RTX_CONFIG_H_ diff --git a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM23_TZ/ARMCM23_ac6.sct b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM23_TZ/ARMCM23_ac6.sct index 2b6482c7..219b6869 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM23_TZ/ARMCM23_ac6.sct +++ b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/Device/ARMCM23_TZ/ARMCM23_ac6.sct @@ -70,7 +70,7 @@ LR_ROM __RO_BASE __RO_SIZE { ; load region size_region RW_RAM __RW_BASE __RW_SIZE { ; RW data .ANY (+RW +ZI) } - + SHARED_MEM SHARED_MEM_BASE SHARED_MEM_SIZE { sample_threadx_module_manager.o (sharedmem) } diff --git a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h index 1cde6a79..35f9ceae 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h +++ b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_FVP_Simulation_Model/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'demo_threadx_non-secure_zone' - * Target: 'FVP Simulation Model' + * Project: 'demo_threadx_non-secure_zone' + * Target: 'FVP Simulation Model' */ #ifndef RTE_COMPONENTS_H @@ -12,7 +12,7 @@ /* - * Define the Device Header File: + * Define the Device Header File: */ #define CMSIS_device_header "ARMCM23_TZ.h" diff --git a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_ThreadX_Library_Project/RTE_Components.h b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_ThreadX_Library_Project/RTE_Components.h index 1eb74752..262dc09b 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_ThreadX_Library_Project/RTE_Components.h +++ b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/RTE/_ThreadX_Library_Project/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'ThreadX_Library' - * Target: 'ThreadX_Library_Project' + * Project: 'ThreadX_Library' + * Target: 'ThreadX_Library_Project' */ #ifndef RTE_COMPONENTS_H @@ -12,7 +12,7 @@ /* - * Define the Device Header File: + * Define the Device Header File: */ #define CMSIS_device_header "ARMCM33_DSP_FP_TZ.h" diff --git a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/sample_threadx_module_manager.c b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/sample_threadx_module_manager.c index 57fcc32f..50a40460 100644 --- a/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/sample_threadx_module_manager.c +++ b/ports_module/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/sample_threadx_module_manager.c @@ -72,8 +72,8 @@ void tx_application_define(void *first_unused_memory) CHAR *pointer = (CHAR*)first_unused_memory; - tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); pointer = pointer + DEMO_STACK_SIZE; } @@ -87,9 +87,9 @@ void module_manager_entry(ULONG thread_input) { (void)thread_input; - + tx_thread_secure_stack_allocate(&module_manager, 256); - + /* Initialize the module manager. */ txm_module_manager_initialize((void *) module_data_area, MODULE_DATA_SIZE); @@ -97,22 +97,22 @@ void module_manager_entry(ULONG thread_input) /* Register a fault handler. */ txm_module_manager_memory_fault_notify(module_fault_handler); - + /* Load the module that is already there, in this example it is placed there by the multiple image download. */ txm_module_manager_in_place_load(&my_module, "my module", (void *) MODULE_CODE); - + /* Enable a read/write shared memory region. */ txm_module_manager_external_memory_enable(&my_module, (void *) shared_memory, SHARED_MEMORY_SIZE, TXM_MODULE_ATTRIBUTE_READ_WRITE); - + /* Start the module. */ txm_module_manager_start(&my_module); /* Sleep for a while.... */ tx_thread_sleep(1000); - + /* Stop the module. */ txm_module_manager_stop(&my_module); - + /* Unload the module. */ txm_module_manager_unload(&my_module); @@ -121,11 +121,11 @@ void module_manager_entry(ULONG thread_input) /* Start the module again. */ txm_module_manager_start(&my_module); - + /* Now just spin... */ while(1) { - + tx_thread_sleep(100); } } diff --git a/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/RTE/_FVP_Simulation_Model/RTE_Components.h b/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/RTE/_FVP_Simulation_Model/RTE_Components.h index 4470aa37..1d498227 100644 --- a/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/RTE/_FVP_Simulation_Model/RTE_Components.h +++ b/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/RTE/_FVP_Simulation_Model/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'sample_threadx_module' - * Target: 'FVP Simulation Model' + * Project: 'sample_threadx_module' + * Target: 'FVP Simulation Model' */ #ifndef RTE_COMPONENTS_H @@ -12,7 +12,7 @@ /* - * Define the Device Header File: + * Define the Device Header File: */ #define CMSIS_device_header "ARMCM23_TZ.h" diff --git a/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/sample_threadx_module.c b/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/sample_threadx_module.c index bc55de5c..cbf252e4 100644 --- a/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/sample_threadx_module.c +++ b/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/sample_threadx_module.c @@ -1,5 +1,5 @@ -/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes - examples of eight threads of different priorities, using a message queue, semaphore, mutex, +/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes + examples of eight threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ /* Specify that this is a module! */ @@ -27,7 +27,7 @@ #define EXTERNAL_MEMORY (0x20040000) -/* Define the pool space in the bss section of the module. ULONG is used to +/* Define the pool space in the bss section of the module. ULONG is used to get the word alignment. */ ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4]; @@ -108,7 +108,7 @@ void demo_module_start(ULONG id) CHAR *pointer; /* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within - their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting + their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting the control block(s). */ txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD)); txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD)); @@ -124,7 +124,7 @@ CHAR *pointer; txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP)); txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL)); txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL)); - + /* Create a byte memory pool from which to allocate the thread stacks. */ tx_byte_pool_create(byte_pool_0, "module byte pool 0", demo_module_pool_space, DEMO_BYTE_POOL_SIZE); @@ -136,42 +136,42 @@ CHAR *pointer; tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create the main thread. */ - tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ - tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 2. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 3. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ - tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -179,23 +179,23 @@ CHAR *pointer; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ - tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ - tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -239,21 +239,21 @@ void thread_0_entry(ULONG thread_input) { UINT status; - + tx_thread_secure_stack_allocate(thread_0, 256); thread_0_counter = func1(thread_0_counter); tx_thread_secure_stack_free(thread_0); - + /* This thread simply sits in while-forever-sleep loop. */ while(1) { /* Increment the thread counter. */ thread_0_counter++; - + /* Sleep for 10 ticks. */ tx_thread_sleep(10); - + /* Set event flag 0 to wakeup thread 5. */ status = tx_event_flags_set(event_flags_0, 0x1, TX_OR); @@ -302,18 +302,18 @@ UINT status; /* Test external memory sharing. */ // *(ULONG *)EXTERNAL_MEMORY = 0xABABABAB; // *(ULONG *)0x20040004 = 0x01010101; - + /* Increment the thread counter. */ thread_2_counter++; /* Retrieve a message from the queue. */ status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -372,7 +372,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -425,7 +425,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(mutex_0); diff --git a/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/txm_module_preamble.S b/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/txm_module_preamble.S index f6530c9f..302efdf2 100644 --- a/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/txm_module_preamble.S +++ b/ports_module/cortex_m23/ac6/example_build/sample_threadx_module/txm_module_preamble.S @@ -2,7 +2,7 @@ .align 4 .syntax unified .section RESET - + // Define public symbols .global __txm_module_preamble diff --git a/ports_module/cortex_m23/ac6/example_build/tx_initialize_low_level.S b/ports_module/cortex_m23/ac6/example_build/tx_initialize_low_level.S index 98e29203..00d7b325 100644 --- a/ports_module/cortex_m23/ac6/example_build/tx_initialize_low_level.S +++ b/ports_module/cortex_m23/ac6/example_build/tx_initialize_low_level.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -62,12 +63,6 @@ HEAP_SIZE = 0x00000000 /* */ /* _tx_initialize_kernel_enter ThreadX entry function */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_initialize_low_level(VOID) // { @@ -86,19 +81,19 @@ _tx_initialize_low_level: /* Set base of available memory to end of non-initialised RAM area. */ LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer LDR r1, =Image$$ARM_LIB_STACK$$ZI$$Limit // Build first free address - ADDS r1, r1, #4 // + ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer /* Setup Vector Table Offset Register. */ LDR r0, =0xE000ED08 // Build address of NVIC registers LDR r1, =__Vectors // Pickup address of vector table - STR r1, [r0] // Set vector table address + STR r1, [r0] // Set vector table address /* Enable the cycle count register. */ // LDR r0, =0xE0001000 // Build address of DWT register // LDR r1, [r0] // Pickup the current value // ORR r1, r1, #1 // Set the CYCCNTENA bit -// STR r1, [r0] // Enable the cycle count register +// STR r1, [r0] // Enable the cycle count register /* Set system stack pointer from vector value. */ LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer @@ -116,21 +111,21 @@ _tx_initialize_low_level: /* Configure handler priorities. */ LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD18 // - ADD r0, r0, r2 // + LDR r2, =0xD18 // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 4-7 Priority Registers LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD1C // - ADD r0, r0, r2 // + LDR r2, =0xD1C // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 8-11 Priority Registers // Note: SVC must be lowest priority, which is 0xFF LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD20 // - ADD r0, r0, r2 // + LDR r2, =0xD20 // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 12-15 Priority Registers // Note: PnSV must be lowest priority, which is 0xFF @@ -162,7 +157,7 @@ __tx_IntHandler: // VOID InterruptHandler (VOID) // { PUSH {r0,lr} // Save LR (and dummy r0 to maintain stack alignment) - + /* Do interrupt handler work here */ /* .... */ @@ -201,7 +196,7 @@ HardFault_Handler: // A stack overflow will trigger a hardfault. // There is no CFSR in M23, so we will not try to // determine if the fault is caused by a stack overflow - // or some other condition. + // or some other condition. B HardFault_Handler .end diff --git a/ports_module/cortex_m23/ac6/example_build/txm/RTE/_ThreadX_Module_Library/RTE_Components.h b/ports_module/cortex_m23/ac6/example_build/txm/RTE/_ThreadX_Module_Library/RTE_Components.h index 74656ec0..0c7e0eba 100644 --- a/ports_module/cortex_m23/ac6/example_build/txm/RTE/_ThreadX_Module_Library/RTE_Components.h +++ b/ports_module/cortex_m23/ac6/example_build/txm/RTE/_ThreadX_Module_Library/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'txm' - * Target: 'ThreadX Module Library' + * Project: 'txm' + * Target: 'ThreadX Module Library' */ #ifndef RTE_COMPONENTS_H @@ -12,7 +12,7 @@ /* - * Define the Device Header File: + * Define the Device Header File: */ #define CMSIS_device_header "ARMCM23_TZ.h" diff --git a/ports_module/cortex_m23/ac6/inc/tx_port.h b/ports_module/cortex_m23/ac6/inc/tx_port.h index 5686cdd3..30f56817 100644 --- a/ports_module/cortex_m23/ac6/inc/tx_port.h +++ b/ports_module/cortex_m23/ac6/inc/tx_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -42,19 +43,6 @@ /* own special types that can be mapped to actual data types by this */ /* file to guarantee consistency in the interface and functionality. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 04-25-2022 Scott Larson Modified comments and added */ -/* volatile to registers, */ -/* resulting in version 6.1.11 */ -/* 07-29-2022 Scott Larson Modified comments and changed */ -/* secure stack initialization */ -/* macro to port-specific, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ #ifndef TX_PORT_H @@ -63,7 +51,7 @@ /* Determine if the optional ThreadX user define file should be used. */ #ifdef TX_INCLUDE_USER_DEFINE_FILE -/* Yes, include the user defines in tx_user.h. The defines in this file may +/* Yes, include the user defines in tx_user.h. The defines in this file may alternately be defined on the command line. */ #include "tx_user.h" @@ -107,24 +95,24 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #error "Do not define TX_ENABLE_STACK_CHECKING" #endif -/* If user does not want to terminate thread on stack overflow, +/* If user does not want to terminate thread on stack overflow, #define the TX_THREAD_NO_TERMINATE_STACK_ERROR symbol. The thread will be rescheduled and continue to cause the exception. It is suggested user code handle this by registering a notification with the tx_thread_stack_error_notify function. */ /*#define TX_THREAD_NO_TERMINATE_STACK_ERROR */ -/* Define the system API mappings based on the error checking - selected by the user. Note: this section is only applicable to +/* Define the system API mappings based on the error checking + selected by the user. Note: this section is only applicable to application source code, hence the conditional that turns off this stuff when the include file is processed by the ThreadX source. */ #ifndef TX_SOURCE_CODE -/* Determine if error checking is desired. If so, map API functions +/* Determine if error checking is desired. If so, map API functions to the appropriate error checking front-ends. Otherwise, map API - functions to the core functions that actually perform the work. + functions to the core functions that actually perform the work. Note: error checking is enabled by default. */ #ifdef TX_DISABLE_ERROR_CHECKING @@ -380,12 +368,12 @@ static void _set_control(unsigned int _control) _tx_vfp_state = _tx_vfp_state & ~((ULONG) 0x4); \ _tx_misra_control_set(_tx_vfp_state); \ } - + #endif /* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR. If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating - this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush + this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush the lazy FPU save, then restore the CONTROL.FPCA state. */ #ifndef TX_MISRA_ENABLE @@ -527,9 +515,9 @@ extern void _tx_thread_secure_stack_initialize(void); #endif -/* Define ThreadX interrupt lockout and restore macros for protection on - access of critical kernel information. The restore interrupt macro must - restore the interrupt posture of the running thread prior to the value +/* Define ThreadX interrupt lockout and restore macros for protection on + access of critical kernel information. The restore interrupt macro must + restore the interrupt posture of the running thread prior to the value present prior to the disable macro. In most cases, the save area macro is used to define a local function save area for the disable and restore macros. */ @@ -576,7 +564,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Cortex-M23/AC6 Version 6.4.2 *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/AC6 Version 6.5.0.202601 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports_module/cortex_m23/ac6/inc/tx_secure_interface.h b/ports_module/cortex_m23/ac6/inc/tx_secure_interface.h index 39b5d5fd..5ac37fbf 100644 --- a/ports_module/cortex_m23/ac6/inc/tx_secure_interface.h +++ b/ports_module/cortex_m23/ac6/inc/tx_secure_interface.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -37,12 +38,6 @@ /* It is assumed that tx_api.h and tx_port.h have already been */ /* included. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ #ifndef TX_SECURE_INTERFACE_H diff --git a/ports_module/cortex_m23/ac6/inc/txm_module_port.h b/ports_module/cortex_m23/ac6/inc/txm_module_port.h index 1e26542c..9f38a588 100644 --- a/ports_module/cortex_m23/ac6/inc/txm_module_port.h +++ b/ports_module/cortex_m23/ac6/inc/txm_module_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -35,15 +36,6 @@ /* This file defines the basic module constants, interface structures, */ /* and function prototypes. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 01-31-2022 Scott Larson Modified comments and made */ -/* heap user-configurable, */ -/* resulting in version 6.1.10 */ -/* */ /**************************************************************************/ #ifndef TXM_MODULE_PORT_H @@ -356,6 +348,6 @@ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instanc #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-M23/AC6 Version 6.4.2 *"; + "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-M23/AC6 Version 6.5.0.202601 *"; #endif diff --git a/ports_module/cortex_m23/ac6/module_lib/src/txm_module_initialize.S b/ports_module/cortex_m23/ac6/module_lib/src/txm_module_initialize.S index f0e6c764..82f6357d 100644 --- a/ports_module/cortex_m23/ac6/module_lib/src/txm_module_initialize.S +++ b/ports_module/cortex_m23/ac6/module_lib/src/txm_module_initialize.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -57,16 +58,6 @@ /* */ /* _txm_module_thread_shell_entry Start module thread */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 01-31-2022 Scott Larson Modified comments, fixed */ -/* scatterload, and made */ -/* heap user configurable, */ -/* resulting in version 6.1.10 */ -/* */ /**************************************************************************/ // VOID _txm_module_initialize(VOID) .global _txm_module_initialize @@ -107,7 +98,7 @@ __rt_entry: LDM r0,{r0-r1} BL __rt_lib_init // Call ARM func to initialize library POP {r0-r1} // Restore dregs and LR - MOV r12, r0 + MOV r12, r0 MOV lr, r1 POP {r0-r7} MOV r8, r0 diff --git a/ports_module/cortex_m23/ac6/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_m23/ac6/module_lib/src/txm_module_thread_shell_entry.c index 5603e5fc..0be91d63 100644 --- a/ports_module/cortex_m23/ac6/module_lib/src/txm_module_thread_shell_entry.c +++ b/ports_module/cortex_m23/ac6/module_lib/src/txm_module_thread_shell_entry.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -89,16 +90,6 @@ extern VOID _txm_module_initialize(VOID *heap_base, VOID *heap_top); /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 01-31-2022 Scott Larson Modified comments, fixed */ -/* scatterload, and made */ -/* heap user configurable, */ -/* resulting in version 6.1.10 */ -/* */ /**************************************************************************/ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info) { @@ -113,14 +104,14 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN { /* Initialize the C environment. */ _txm_module_initialize(&txm_heap[0], &txm_heap[TXM_MODULE_HEAP_SIZE-1]); - + /* Save the entry info pointer, for later use. */ _txm_module_entry_info = thread_info; - + /* Save the kernel function dispatch address. This is used to make all resident calls from the module. */ _txm_module_kernel_call_dispatcher = thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher; - + /* Ensure that we have a valid pointer. */ while (!_txm_module_kernel_call_dispatcher) { @@ -128,7 +119,7 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN An error here typically indicates the resident portion of _tx_thread_schedule is not supporting the trap to obtain the function pointer. */ } - + /* Resume the module's callback thread, already created in the manager. */ _txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread); } diff --git a/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_allocate.c b/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_allocate.c index 05a922d4..95c101de 100644 --- a/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_allocate.c +++ b/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_allocate.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* */ /* Module application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { diff --git a/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_free.c b/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_free.c index 61c852b5..47c718a0 100644 --- a/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_free.c +++ b/ports_module/cortex_m23/ac6/module_lib/src/txm_thread_secure_stack_free.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -54,12 +55,6 @@ /* */ /* Module application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) { diff --git a/ports_module/cortex_m23/ac6/module_manager/inc/txm_module_manager_dispatch_port.h b/ports_module/cortex_m23/ac6/module_manager/inc/txm_module_manager_dispatch_port.h index 8bbcd5b3..0575c748 100644 --- a/ports_module/cortex_m23/ac6/module_manager/inc/txm_module_manager_dispatch_port.h +++ b/ports_module/cortex_m23/ac6/module_manager/inc/txm_module_manager_dispatch_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_restore.S index 2b724e21..fac7b4bc 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* ISRs Interrupt Service Routines */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_restore(VOID) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_save.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_save.S index ba7ea70c..e1b624bd 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_context_save.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_save(VOID) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_control.S index 9adce6f9..950717cd 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_control.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,12 +52,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_control(UINT new_posture) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_disable.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_disable.S index dceff9bc..6a8dafd0 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_disable.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_disable.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,12 +52,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_disable(VOID) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_restore.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_restore.S index fd52f19e..9092edc1 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_restore.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_interrupt_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,12 +52,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_interrupt_restore(UINT previous_posture) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_schedule.S index 896204dc..8e4df0c3 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_schedule.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -57,19 +58,6 @@ /* _tx_initialize_kernel_enter ThreadX entry function */ /* _tx_thread_system_return Return to system from thread */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 04-25-2022 Scott Larson Optimized MPU configuration, */ -/* resulting in version 6.1.11 */ -/* 07-29-2022 Scott Larson Removed the code path to skip */ -/* MPU reloading, */ -/* resulting in version 6.1.12 */ -/* 10-31-2022 Scott Larson Added low power support, */ -/* resulting in version 6.2.0 */ -/* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) // { @@ -174,7 +162,7 @@ BusFault_Handler: STR r0, [r2, #88] // Save xPSR MRS r0, CONTROL // Pickup current CONTROL register - MOVW r1, #0x1 // + MOVW r1, #0x1 // BICS r0, r0, r1 // Clear the UNPRIV bit MSR CONTROL, r0 // Setup new CONTROL register @@ -416,7 +404,7 @@ _tx_enable_mpu: MOVS r1, #5 // Build enable value with background region enabled STR r1, [r0] // Enable MPU MOV r1, r8 // Get copied thread ptr - + skip_mpu_setup: // Restore the thread context and PSP @@ -528,7 +516,7 @@ _tx_entry_continue: _tx_skip_kernel_stack_enter: MRS r0, CONTROL // Pickup current CONTROL register - MOVW r1, #0x1 // + MOVW r1, #0x1 // BICS r0, r0, r1 // Clear the UNPRIV bit MSR CONTROL, r0 // Setup new CONTROL register BX lr // Return to thread @@ -609,7 +597,7 @@ _tx_alloc_continue: STR r0, [r1] // Store function return value MOV lr, r2 BX lr - + _tx_svc_secure_free: LDR r2, =_tx_free_return // Load address of where we should have come from CMP r1, r2 // Did we come from _tx_thread_secure_stack_free? diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack.c b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack.c index baae59d8..0073bd47 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -102,21 +103,6 @@ static INT tx_head_free_index = 0U; /* */ /* _tx_initialize_kernel_enter */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* 10-16-2020 Scott Larson Modified comment(s), */ -/* resulting in version 6.1.1 */ -/* 06-02-2021 Scott Larson Modified comment(s), and */ -/* changed name, execute in */ -/* handler mode, */ -/* resulting in version 6.1.7 */ -/* 07-29-2022 Scott Larson Modified comments, updated */ -/* secure stack allocation, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_initialize(void) diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_allocate.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_allocate.S index 4560e059..8fd91971 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_allocate.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_allocate.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_free.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_free.S index 7bec56b3..03476dd0 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_free.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_free.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -50,12 +51,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_secure_stack_free(TX_THREAD *thread_ptr) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_initialize.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_initialize.S index 2bb69e1b..3c5fdde6 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_initialize.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_secure_stack_initialize.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -50,16 +51,6 @@ /* */ /* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 06-02-2021 Scott Larson Initial Version 6.1.7 */ -/* 07-29-2022 Scott Larson Modified comments and changed */ -/* secure stack initialization */ -/* macro to port-specific, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_stack_build.S index 302e4ad1..b8b83e12 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) // { @@ -95,7 +90,7 @@ _tx_thread_stack_build: Stack Bottom: (higher memory address) */ LDR r2, [r0, #16] // Pickup end of stack area - MOVW r3, #0x7 // + MOVW r3, #0x7 // BICS r2, r2, r3 // Align frame for 8-byte alignment SUBS r2, r2, #68 // Subtract frame size #ifdef TX_SINGLE_MODE_SECURE diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_system_return.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_system_return.S index c27056bb..22244f01 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_system_return.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_thread_system_return.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* ThreadX components */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_system_return(VOID) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex_m23/ac6/module_manager/src/tx_timer_interrupt.S index 1b0dd93b..b8bef35a 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/tx_timer_interrupt.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -54,12 +55,6 @@ /* */ /* interrupt vector */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_timer_interrupt(VOID) // { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_allocate.c b/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_allocate.c index 6c394cae..9bade139 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_allocate.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_allocate.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -63,12 +64,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { @@ -76,10 +71,10 @@ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_siz return(TX_FEATURE_NOT_ENABLED); #else UINT status; - + /* Default status to success. */ status = TX_SUCCESS; - + /* Check for an invalid thread pointer. */ if (thread_ptr == TX_NULL) { @@ -93,7 +88,7 @@ UINT status; /* Thread pointer is invalid, return appropriate error code. */ status = TX_THREAD_ERROR; } - + /* Check for interrupt call. */ if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0)) { @@ -104,7 +99,7 @@ UINT status; status = TX_CALLER_ERROR; } } - + /* Determine if everything is okay. */ if (status == TX_SUCCESS) { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_free.c b/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_free.c index a2f81e77..75a26945 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_free.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txe_thread_secure_stack_free.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -61,12 +62,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) { @@ -74,10 +69,10 @@ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) return(TX_FEATURE_NOT_ENABLED); #else UINT status; - + /* Default status to success. */ status = TX_SUCCESS; - + /* Check for an invalid thread pointer. */ if (thread_ptr == TX_NULL) { @@ -93,7 +88,7 @@ UINT status; /* Thread pointer is invalid, return appropriate error code. */ status = TX_THREAD_ERROR; } - + /* Check for interrupt call. */ if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0)) { @@ -104,7 +99,7 @@ UINT status; status = TX_CALLER_ERROR; } } - + /* Determine if everything is okay. */ if (status == TX_SUCCESS) { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_alignment_adjust.c b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_alignment_adjust.c index c520f155..e1534699 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_alignment_adjust.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_alignment_adjust.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -60,12 +61,6 @@ /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, ULONG *code_size, @@ -77,7 +72,7 @@ VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, /* Round code and data size UP to TXM_MODULE_MPU_ALIGNMENT bytes. */ *code_size = (*code_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1); *data_size = (*data_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1); - + /* Alignment for code and data is TXM_MODULE_MPU_ALIGNMENT bytes. */ *code_alignment = TXM_MODULE_MPU_ALIGNMENT; *data_alignment = TXM_MODULE_MPU_ALIGNMENT; diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_external_memory_enable.c b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_external_memory_enable.c index 004d5fe1..1c7c1b47 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_external_memory_enable.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_external_memory_enable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -63,12 +64,6 @@ /* */ /* Application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance, VOID *start_address, @@ -105,7 +100,7 @@ ULONG shared_index; /* Invalid module pointer. */ return(TX_PTR_ERROR); } - + /* Determine if the module instance is in the loaded state. */ if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED) { @@ -115,49 +110,49 @@ ULONG shared_index; /* Return error if the module is not ready. */ return(TX_START_ERROR); } - + /* Determine if there are shared memory entries available. */ if(module_instance -> txm_module_instance_shared_memory_count >= TXM_MODULE_MPU_SHARED_ENTRIES) { /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* No more entries available. */ return(TX_NO_MEMORY); } - + /* Start address must adhere to Cortex-M23 MPU alignment. */ address = (ULONG) start_address; if(address != (address & ~(TXM_MODULE_MPU_ALIGNMENT - 1))) { /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* Return alignment error. */ return(TXM_MODULE_ALIGNMENT_ERROR); } - + /* At this point, we have a valid address. Set up MPU registers. */ - + /* Pick up index into shared memory entries. */ shared_index = TXM_MODULE_MPU_SHARED_INDEX + module_instance -> txm_module_instance_shared_memory_count; - + /* Set base address register with start address, sanitized attributes and execute never. */ module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_base_address = address | (attributes & TXM_MODULE_ATTRIBUTE_MASK) | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER; - + /* Set the limit address (data start + length-1), attribute index, and enable bit. */ module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_limit_address = (address + length-1) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE; - + /* Keep track of shared memory address and length in module instance. */ module_instance -> txm_module_instance_shared_memory_address[module_instance -> txm_module_instance_shared_memory_count] = address; module_instance -> txm_module_instance_shared_memory_length[module_instance -> txm_module_instance_shared_memory_count] = length; - + /* Increment counter. */ module_instance -> txm_module_instance_shared_memory_count++; - + /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* Return success. */ return(TX_SUCCESS); } diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c index c7107a60..c31c70fc 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -71,12 +72,6 @@ TXM_MODULE_MANAGER_FAULT_INFO /* */ /* Fault handler */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_memory_fault_handler(VOID) { @@ -89,7 +84,7 @@ TX_THREAD *thread_ptr; /* Initialize the module instance pointer to NULL. */ module_instance_ptr = TX_NULL; - + /* Is there a thread? */ if (thread_ptr) { @@ -99,7 +94,7 @@ TX_THREAD *thread_ptr; /* Terminate the current thread. */ _tx_thread_terminate(_tx_thread_current_ptr); } - + /* Determine if there is a user memory fault notification callback. */ if (_txm_module_manager_fault_notify) { diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c index 6831e0df..3223b566 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -66,18 +67,12 @@ extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *)) { /* Setup notification function. */ _txm_module_manager_fault_notify = notify_function; - + /* Return success. */ return(TX_SUCCESS); } diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_mm_register_setup.c index 3adcf647..55abbe5e 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_mm_register_setup.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_mm_register_setup.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _txm_module_manager_thread_create */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance) { @@ -91,27 +86,27 @@ ULONG callback_stack_size; /* Set base address register to module data address, which should be at least 32-byte aligned. Mask address to proper range, inner shareable, read write, execute never. */ module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_base_address = ((ULONG) module_instance -> txm_module_instance_data_start & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_WRITE | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER; - + /* Adjust the size of the module elements to be aligned to the default alignment. We do this so that when we partition the allocated memory, we can simply place these regions right beside each other without having to align their pointers. Note this only works when they all have the same alignment. */ - + data_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_data_size; start_stop_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_start_stop_stack_size; callback_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_callback_stack_size; - + data_size = ((data_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; start_stop_stack_size = ((start_stop_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; callback_stack_size = ((callback_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; /* Update the data size to include thread stacks. */ data_size = data_size + start_stop_stack_size + callback_stack_size; - + /* Set the limit address (data start + data size-1), attribute index, and enable bit. */ module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_limit_address = (((ULONG) module_instance -> txm_module_instance_data_start + data_size - 1) & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE; /* End of module data protection. */ - + /* Remaining MPU entries are disabled for now and can be used for shared memory. */ } @@ -168,7 +163,7 @@ ALIGN_TYPE shared_memory_address_end; { return(TX_FALSE); } - + /* Check if the object is inside the module data. */ if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) && ((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1))) diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_port_dispatch.c b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_port_dispatch.c index d2c0862e..07a2e9fc 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_port_dispatch.c +++ b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_port_dispatch.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -60,12 +61,6 @@ /* */ /* _txm_module_manager_kernel_dispatch */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2) { @@ -88,7 +83,7 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; ); break; } - + case TXM_THREAD_SECURE_STACK_FREE_CALL: { if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION) @@ -102,13 +97,13 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; ); break; } - + default: { /* Unhandled kernel request, return an error! */ break; } } - + return(return_value); } diff --git a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_thread_stack_build.S index 3533a3f5..ef874245 100644 --- a/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_thread_stack_build.S +++ b/ports_module/cortex_m23/ac6/module_manager/src/txm_module_manager_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ // VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) // { @@ -93,7 +88,7 @@ _txm_module_manager_thread_stack_build: Stack Bottom: (higher memory address) */ LDR r2, [r0, #16] // Pickup end of stack area - MOVW r3, #0x7 // + MOVW r3, #0x7 // BICS r2, r2, r3 // Align frame for 8-byte alignment SUBS r2, r2, #68 // Subtract frame size #ifdef TX_SINGLE_MODE_SECURE diff --git a/ports_module/cortex_m23/gnu/example_build/sample_threadx_module.c b/ports_module/cortex_m23/gnu/example_build/sample_threadx_module.c index 52557312..b74d7a35 100644 --- a/ports_module/cortex_m23/gnu/example_build/sample_threadx_module.c +++ b/ports_module/cortex_m23/gnu/example_build/sample_threadx_module.c @@ -1,5 +1,5 @@ -/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes - examples of eight threads of different priorities, using a message queue, semaphore, mutex, +/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes + examples of eight threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ /* Specify that this is a module! */ @@ -20,7 +20,7 @@ #define DEMO_QUEUE_SIZE 100 -/* Define the pool space in the bss section of the module. ULONG is used to +/* Define the pool space in the bss section of the module. ULONG is used to get the word alignment. */ ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4]; @@ -101,7 +101,7 @@ void demo_module_start(ULONG id) CHAR *pointer; /* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within - their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting + their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting the control block(s). */ txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD)); txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD)); @@ -117,7 +117,7 @@ CHAR *pointer; txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP)); txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL)); txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL)); - + /* Create a byte memory pool from which to allocate the thread stacks. */ tx_byte_pool_create(byte_pool_0, "module byte pool 0", (UCHAR*)demo_module_pool_space, DEMO_BYTE_POOL_SIZE); @@ -129,42 +129,42 @@ CHAR *pointer; tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create the main thread. */ - tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ - tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 2. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 3. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ - tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -172,23 +172,23 @@ CHAR *pointer; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ - tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ - tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -233,7 +233,7 @@ void thread_0_entry(ULONG thread_input) UINT status; - + /* This thread simply sits in while-forever-sleep loop. */ while(1) { @@ -243,7 +243,7 @@ UINT status; /* Sleep for 10 ticks. */ tx_thread_sleep(10); - + /* Set event flag 0 to wakeup thread 5. */ status = tx_event_flags_set(event_flags_0, 0x1, TX_OR); @@ -291,19 +291,19 @@ UINT status; { /* Test memory handler. */ *(ULONG *)0x20010000 = 0xCDCDCDCD; - - + + /* Increment the thread counter. */ thread_2_counter++; /* Retrieve a message from the queue. */ status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -362,7 +362,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -415,7 +415,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(mutex_0); diff --git a/ports_module/cortex_m23/gnu/example_build/txm_module_preamble.S b/ports_module/cortex_m23/gnu/example_build/txm_module_preamble.S index a9413251..5f663569 100644 --- a/ports_module/cortex_m23/gnu/example_build/txm_module_preamble.S +++ b/ports_module/cortex_m23/gnu/example_build/txm_module_preamble.S @@ -1,6 +1,7 @@ .text .align 4 .syntax unified + .section .preamble, "ax" /* Define public symbols. */ .global __txm_module_preamble @@ -32,7 +33,7 @@ __txm_module_preamble: // 1 -> User mode execution .dc.l _txm_module_thread_shell_entry - . - 0 // Module Shell Entry Point .dc.l demo_module_start - . - 0 // Module Start Thread Entry Point - .dc.l 0 // Module Stop Thread Entry Point + .dc.l 0 // Module Stop Thread Entry Point .dc.l 1 // Module Start/Stop Thread Priority .dc.l 1024 // Module Start/Stop Thread Stack Size .dc.l _txm_module_callback_request_thread_entry - . - 0 // Module Callback Thread Entry diff --git a/ports_module/cortex_m23/gnu/inc/tx_port.h b/ports_module/cortex_m23/gnu/inc/tx_port.h index 6f122445..0f2de686 100644 --- a/ports_module/cortex_m23/gnu/inc/tx_port.h +++ b/ports_module/cortex_m23/gnu/inc/tx_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -42,29 +43,6 @@ /* own special types that can be mapped to actual data types by this */ /* file to guarantee consistency in the interface and functionality. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* 04-02-2021 Scott Larson Modified comment(s), */ -/* remove unneeded headers, */ -/* use builtins, added */ -/* ULONG64_DEFINED,updated */ -/* macro definition, */ -/* resulting in version 6.1.6 */ -/* 06-02-2021 Scott Larson Modified comment(s), */ -/* added symbol to enable */ -/* stack error handler, */ -/* resulting in version 6.1.7 */ -/* 04-25-2022 Scott Larson Modified comments and added */ -/* volatile to registers, */ -/* resulting in version 6.1.11 */ -/* 07-29-2022 Scott Larson Modified comments and changed */ -/* secure stack initialization */ -/* macro to port-specific, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ #ifndef TX_PORT_H @@ -73,7 +51,7 @@ /* Determine if the optional ThreadX user define file should be used. */ #ifdef TX_INCLUDE_USER_DEFINE_FILE -/* Yes, include the user defines in tx_user.h. The defines in this file may +/* Yes, include the user defines in tx_user.h. The defines in this file may alternately be defined on the command line. */ #include "tx_user.h" @@ -116,24 +94,24 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #error "Do not define TX_ENABLE_STACK_CHECKING" #endif -/* If user does not want to terminate thread on stack overflow, +/* If user does not want to terminate thread on stack overflow, #define the TX_THREAD_NO_TERMINATE_STACK_ERROR symbol. The thread will be rescheduled and continue to cause the exception. It is suggested user code handle this by registering a notification with the tx_thread_stack_error_notify function. */ /*#define TX_THREAD_NO_TERMINATE_STACK_ERROR */ -/* Define the system API mappings based on the error checking - selected by the user. Note: this section is only applicable to +/* Define the system API mappings based on the error checking + selected by the user. Note: this section is only applicable to application source code, hence the conditional that turns off this stuff when the include file is processed by the ThreadX source. */ #ifndef TX_SOURCE_CODE -/* Determine if error checking is desired. If so, map API functions +/* Determine if error checking is desired. If so, map API functions to the appropriate error checking front-ends. Otherwise, map API - functions to the core functions that actually perform the work. + functions to the core functions that actually perform the work. Note: error checking is enabled by default. */ #ifdef TX_DISABLE_ERROR_CHECKING @@ -405,9 +383,9 @@ extern void _tx_thread_secure_stack_initialize(void); #endif -/* Define ThreadX interrupt lockout and restore macros for protection on - access of critical kernel information. The restore interrupt macro must - restore the interrupt posture of the running thread prior to the value +/* Define ThreadX interrupt lockout and restore macros for protection on + access of critical kernel information. The restore interrupt macro must + restore the interrupt posture of the running thread prior to the value present prior to the disable macro. In most cases, the save area macro is used to define a local function save area for the disable and restore macros. */ @@ -487,7 +465,7 @@ unsigned int interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Cortex-M23/GNU Version 6.4.2 *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/GNU Version 6.5.0.202601 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports_module/cortex_m23/gnu/inc/tx_secure_interface.h b/ports_module/cortex_m23/gnu/inc/tx_secure_interface.h index 66eb089d..63f683c1 100644 --- a/ports_module/cortex_m23/gnu/inc/tx_secure_interface.h +++ b/ports_module/cortex_m23/gnu/inc/tx_secure_interface.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -37,12 +38,6 @@ /* It is assumed that tx_api.h and tx_port.h have already been */ /* included. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ #ifndef TX_SECURE_INTERFACE_H diff --git a/ports_module/cortex_m23/gnu/inc/txm_module_port.h b/ports_module/cortex_m23/gnu/inc/txm_module_port.h index 1ace4fdf..04e72d0c 100644 --- a/ports_module/cortex_m23/gnu/inc/txm_module_port.h +++ b/ports_module/cortex_m23/gnu/inc/txm_module_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -35,12 +36,6 @@ /* This file defines the basic module constants, interface structures, */ /* and function prototypes. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ #ifndef TXM_MODULE_PORT_H @@ -346,6 +341,6 @@ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instanc #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-M23/GNU Version 6.4.2 *"; + "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-M23/GNU Version 6.5.0.202601 *"; #endif diff --git a/ports_module/cortex_m23/gnu/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_m23/gnu/module_lib/src/txm_module_thread_shell_entry.c index 0d180985..b4e75378 100644 --- a/ports_module/cortex_m23/gnu/module_lib/src/txm_module_thread_shell_entry.c +++ b/ports_module/cortex_m23/gnu/module_lib/src/txm_module_thread_shell_entry.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -86,12 +87,6 @@ extern VOID _gcc_setup(TXM_MODULE_INSTANCE *); /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info) { @@ -107,14 +102,14 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN { /* Initialize the GNU C environment. */ _gcc_setup(thread_info -> txm_module_thread_entry_info_code_base_address); - + /* Save the entry info pointer, for later use. */ _txm_module_entry_info = thread_info; - + /* Save the kernel function dispatch address. This is used to make all resident calls from the module. */ _txm_module_kernel_call_dispatcher = thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher; - + /* Ensure that we have a valid pointer. */ while (!_txm_module_kernel_call_dispatcher) { @@ -122,7 +117,7 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN An error here typically indicates the resident portion of _tx_thread_schedule is not supporting the trap to obtain the function pointer. */ } - + /* Resume the module's callback thread, already created in the manager. */ _txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread); } diff --git a/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_allocate.c b/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_allocate.c index 05a922d4..95c101de 100644 --- a/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_allocate.c +++ b/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_allocate.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* */ /* Module application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { diff --git a/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_free.c b/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_free.c index 61c852b5..47c718a0 100644 --- a/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_free.c +++ b/ports_module/cortex_m23/gnu/module_lib/src/txm_thread_secure_stack_free.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -54,12 +55,6 @@ /* */ /* Module application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) { diff --git a/ports_module/cortex_m23/gnu/module_manager/inc/txm_module_manager_dispatch_port.h b/ports_module/cortex_m23/gnu/module_manager/inc/txm_module_manager_dispatch_port.h index 8bbcd5b3..0575c748 100644 --- a/ports_module/cortex_m23/gnu/module_manager/inc/txm_module_manager_dispatch_port.h +++ b/ports_module/cortex_m23/gnu/module_manager/inc/txm_module_manager_dispatch_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_initialize_low_level.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_initialize_low_level.S index 4b4d3b62..d38525bf 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_initialize_low_level.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_initialize_low_level.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -63,12 +64,6 @@ HEAP_SIZE = 0x00000000 /* */ /* _tx_initialize_kernel_enter ThreadX entry function */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_initialize_low_level(VOID) // { @@ -87,20 +82,20 @@ _tx_initialize_low_level: /* Set base of available memory to end of non-initialised RAM area. */ LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer LDR r1, =Image$$ARM_LIB_STACK$$ZI$$Limit // Build first free address - ADDS r1, r1, #4 // + ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer /* Setup Vector Table Offset Register. */ LDR r0, =0xE000ED08 // Build address of NVIC registers LDR r1, =__Vectors // Pickup address of vector table - STR r1, [r0] // Set vector table address + STR r1, [r0] // Set vector table address // /* Enable the cycle count register. */ // // LDR r0, =0xE0001000 // Build address of DWT register // LDR r1, [r0] // Pickup the current value // ORR r1, r1, #1 // Set the CYCCNTENA bit -// STR r1, [r0] // Enable the cycle count register +// STR r1, [r0] // Enable the cycle count register /* Set system stack pointer from vector value. */ LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer @@ -118,21 +113,21 @@ _tx_initialize_low_level: /* Configure handler priorities. */ LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD18 // - ADD r0, r0, r2 // + LDR r2, =0xD18 // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 4-7 Priority Registers LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD1C // - ADD r0, r0, r2 // + LDR r2, =0xD1C // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 8-11 Priority Registers // Note: SVC must be lowest priority, which is 0xFF LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD20 // - ADD r0, r0, r2 // + LDR r2, =0xD20 // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 12-15 Priority Registers // Note: PnSV must be lowest priority, which is 0xFF @@ -164,7 +159,7 @@ __tx_IntHandler: // VOID InterruptHandler (VOID) // { PUSH {r0,lr} // Save LR (and dummy r0 to maintain stack alignment) - + /* Do interrupt handler work here */ /* .... */ @@ -203,7 +198,7 @@ HardFault_Handler: // A stack overflow will trigger a hardfault. // There is no CFSR in M23, so we will not try to // determine if the fault is caused by a stack overflow - // or some other condition. + // or some other condition. B HardFault_Handler .end diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_restore.S index f0de20a2..2f9d7165 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* ISRs Interrupt Service Routines */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_restore(VOID) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_save.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_save.S index c7dce4ea..f51cff71 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_context_save.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_save(VOID) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_control.S index 7fcfa9f4..8bfbbd09 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_control.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,12 +52,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_control(UINT new_posture) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_disable.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_disable.S index addb7915..62b1a017 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_disable.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_disable.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,12 +52,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_disable(VOID) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_restore.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_restore.S index 24174940..7ac71319 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_restore.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_interrupt_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,12 +52,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_interrupt_restore(UINT previous_posture) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_schedule.S index dbeecb88..eea9818d 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_schedule.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,19 +54,6 @@ /* _tx_initialize_kernel_enter ThreadX entry function */ /* _tx_thread_system_return Return to system from thread */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 04-25-2022 Scott Larson Optimized MPU configuration, */ -/* resulting in version 6.1.11 */ -/* 07-29-2022 Scott Larson Removed the code path to skip */ -/* MPU reloading, */ -/* resulting in version 6.1.12 */ -/* 10-31-2022 Scott Larson Added low power support, */ -/* resulting in version 6.2.0 */ -/* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) // { @@ -170,7 +158,7 @@ BusFault_Handler: STR r0, [r2, #88] // Save xPSR MRS r0, CONTROL // Pickup current CONTROL register - MOVW r1, #0x1 // + MOVW r1, #0x1 // BICS r0, r0, r1 // Clear the UNPRIV bit MSR CONTROL, r0 // Setup new CONTROL register @@ -412,7 +400,7 @@ _tx_enable_mpu: MOVS r1, #5 // Build enable value with background region enabled STR r1, [r0] // Enable MPU MOV r1, r8 // Get copied thread ptr - + skip_mpu_setup: // Restore the thread context and PSP @@ -524,7 +512,7 @@ _tx_entry_continue: _tx_skip_kernel_stack_enter: MRS r0, CONTROL // Pickup current CONTROL register - MOVW r1, #0x1 // + MOVW r1, #0x1 // BICS r0, r0, r1 // Clear the UNPRIV bit MSR CONTROL, r0 // Setup new CONTROL register BX lr // Return to thread @@ -605,7 +593,7 @@ _tx_alloc_continue: STR r0, [r1] // Store function return value MOV lr, r2 BX lr - + _tx_svc_secure_free: LDR r2, =_tx_free_return // Load address of where we should have come from CMP r1, r2 // Did we come from _tx_thread_secure_stack_free? diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack.c b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack.c index 4f757f90..44376c27 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -98,21 +99,6 @@ static INT tx_head_free_index = 0U; /* */ /* _tx_initialize_kernel_enter */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* 10-16-2020 Scott Larson Modified comment(s), */ -/* resulting in version 6.1.1 */ -/* 06-02-2021 Scott Larson Modified comment(s), changed */ -/* name, execute in handler */ -/* mode, disable optimization, */ -/* resulting in version 6.1.7 */ -/* 07-29-2022 Scott Larson Modified comments, updated */ -/* secure stack allocation, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry, optimize(0))) UINT _tx_thread_secure_mode_stack_initialize(void) diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_allocate.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_allocate.S index 1e322ad4..a569e07e 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_allocate.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_allocate.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_free.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_free.S index 4b51958c..9a1e28c3 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_free.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_free.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -50,12 +51,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_secure_stack_free(TX_THREAD *thread_ptr) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_initialize.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_initialize.S index 6cec7c52..ae66a5c5 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_initialize.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_secure_stack_initialize.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -50,16 +51,6 @@ /* */ /* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 06-02-2021 Scott Larson Initial Version 6.1.7 */ -/* 07-29-2022 Scott Larson Modified comments and changed */ -/* secure stack initialization */ -/* macro to port-specific, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_stack_build.S index b53609b0..0430d672 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) // { @@ -95,7 +90,7 @@ _tx_thread_stack_build: Stack Bottom: (higher memory address) */ LDR r2, [r0, #16] // Pickup end of stack area - MOVW r3, #0x7 // + MOVW r3, #0x7 // BICS r2, r2, r3 // Align frame for 8-byte alignment SUBS r2, r2, #68 // Subtract frame size #ifdef TX_SINGLE_MODE_SECURE diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_system_return.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_system_return.S index 85d38e4d..a09ad30d 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_system_return.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_thread_system_return.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* ThreadX components */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_system_return(VOID) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex_m23/gnu/module_manager/src/tx_timer_interrupt.S index e1eef248..3bc77594 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/tx_timer_interrupt.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -54,12 +55,6 @@ /* */ /* interrupt vector */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_timer_interrupt(VOID) // { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_allocate.c b/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_allocate.c index 6c394cae..9bade139 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_allocate.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_allocate.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -63,12 +64,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { @@ -76,10 +71,10 @@ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_siz return(TX_FEATURE_NOT_ENABLED); #else UINT status; - + /* Default status to success. */ status = TX_SUCCESS; - + /* Check for an invalid thread pointer. */ if (thread_ptr == TX_NULL) { @@ -93,7 +88,7 @@ UINT status; /* Thread pointer is invalid, return appropriate error code. */ status = TX_THREAD_ERROR; } - + /* Check for interrupt call. */ if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0)) { @@ -104,7 +99,7 @@ UINT status; status = TX_CALLER_ERROR; } } - + /* Determine if everything is okay. */ if (status == TX_SUCCESS) { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_free.c b/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_free.c index a2f81e77..75a26945 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_free.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txe_thread_secure_stack_free.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -61,12 +62,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) { @@ -74,10 +69,10 @@ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) return(TX_FEATURE_NOT_ENABLED); #else UINT status; - + /* Default status to success. */ status = TX_SUCCESS; - + /* Check for an invalid thread pointer. */ if (thread_ptr == TX_NULL) { @@ -93,7 +88,7 @@ UINT status; /* Thread pointer is invalid, return appropriate error code. */ status = TX_THREAD_ERROR; } - + /* Check for interrupt call. */ if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0)) { @@ -104,7 +99,7 @@ UINT status; status = TX_CALLER_ERROR; } } - + /* Determine if everything is okay. */ if (status == TX_SUCCESS) { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_alignment_adjust.c b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_alignment_adjust.c index c520f155..e1534699 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_alignment_adjust.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_alignment_adjust.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -60,12 +61,6 @@ /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, ULONG *code_size, @@ -77,7 +72,7 @@ VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, /* Round code and data size UP to TXM_MODULE_MPU_ALIGNMENT bytes. */ *code_size = (*code_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1); *data_size = (*data_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1); - + /* Alignment for code and data is TXM_MODULE_MPU_ALIGNMENT bytes. */ *code_alignment = TXM_MODULE_MPU_ALIGNMENT; *data_alignment = TXM_MODULE_MPU_ALIGNMENT; diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_external_memory_enable.c b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_external_memory_enable.c index 004d5fe1..1c7c1b47 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_external_memory_enable.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_external_memory_enable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -63,12 +64,6 @@ /* */ /* Application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance, VOID *start_address, @@ -105,7 +100,7 @@ ULONG shared_index; /* Invalid module pointer. */ return(TX_PTR_ERROR); } - + /* Determine if the module instance is in the loaded state. */ if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED) { @@ -115,49 +110,49 @@ ULONG shared_index; /* Return error if the module is not ready. */ return(TX_START_ERROR); } - + /* Determine if there are shared memory entries available. */ if(module_instance -> txm_module_instance_shared_memory_count >= TXM_MODULE_MPU_SHARED_ENTRIES) { /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* No more entries available. */ return(TX_NO_MEMORY); } - + /* Start address must adhere to Cortex-M23 MPU alignment. */ address = (ULONG) start_address; if(address != (address & ~(TXM_MODULE_MPU_ALIGNMENT - 1))) { /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* Return alignment error. */ return(TXM_MODULE_ALIGNMENT_ERROR); } - + /* At this point, we have a valid address. Set up MPU registers. */ - + /* Pick up index into shared memory entries. */ shared_index = TXM_MODULE_MPU_SHARED_INDEX + module_instance -> txm_module_instance_shared_memory_count; - + /* Set base address register with start address, sanitized attributes and execute never. */ module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_base_address = address | (attributes & TXM_MODULE_ATTRIBUTE_MASK) | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER; - + /* Set the limit address (data start + length-1), attribute index, and enable bit. */ module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_limit_address = (address + length-1) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE; - + /* Keep track of shared memory address and length in module instance. */ module_instance -> txm_module_instance_shared_memory_address[module_instance -> txm_module_instance_shared_memory_count] = address; module_instance -> txm_module_instance_shared_memory_length[module_instance -> txm_module_instance_shared_memory_count] = length; - + /* Increment counter. */ module_instance -> txm_module_instance_shared_memory_count++; - + /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* Return success. */ return(TX_SUCCESS); } diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_handler.c b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_handler.c index c7107a60..c31c70fc 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_handler.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_handler.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -71,12 +72,6 @@ TXM_MODULE_MANAGER_FAULT_INFO /* */ /* Fault handler */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_memory_fault_handler(VOID) { @@ -89,7 +84,7 @@ TX_THREAD *thread_ptr; /* Initialize the module instance pointer to NULL. */ module_instance_ptr = TX_NULL; - + /* Is there a thread? */ if (thread_ptr) { @@ -99,7 +94,7 @@ TX_THREAD *thread_ptr; /* Terminate the current thread. */ _tx_thread_terminate(_tx_thread_current_ptr); } - + /* Determine if there is a user memory fault notification callback. */ if (_txm_module_manager_fault_notify) { diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_notify.c b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_notify.c index 6831e0df..3223b566 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_notify.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_memory_fault_notify.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -66,18 +67,12 @@ extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *)) { /* Setup notification function. */ _txm_module_manager_fault_notify = notify_function; - + /* Return success. */ return(TX_SUCCESS); } diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_mm_register_setup.c index 3adcf647..55abbe5e 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_mm_register_setup.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_mm_register_setup.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _txm_module_manager_thread_create */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance) { @@ -91,27 +86,27 @@ ULONG callback_stack_size; /* Set base address register to module data address, which should be at least 32-byte aligned. Mask address to proper range, inner shareable, read write, execute never. */ module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_base_address = ((ULONG) module_instance -> txm_module_instance_data_start & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_WRITE | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER; - + /* Adjust the size of the module elements to be aligned to the default alignment. We do this so that when we partition the allocated memory, we can simply place these regions right beside each other without having to align their pointers. Note this only works when they all have the same alignment. */ - + data_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_data_size; start_stop_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_start_stop_stack_size; callback_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_callback_stack_size; - + data_size = ((data_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; start_stop_stack_size = ((start_stop_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; callback_stack_size = ((callback_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; /* Update the data size to include thread stacks. */ data_size = data_size + start_stop_stack_size + callback_stack_size; - + /* Set the limit address (data start + data size-1), attribute index, and enable bit. */ module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_limit_address = (((ULONG) module_instance -> txm_module_instance_data_start + data_size - 1) & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE; /* End of module data protection. */ - + /* Remaining MPU entries are disabled for now and can be used for shared memory. */ } @@ -168,7 +163,7 @@ ALIGN_TYPE shared_memory_address_end; { return(TX_FALSE); } - + /* Check if the object is inside the module data. */ if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) && ((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1))) diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_port_dispatch.c b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_port_dispatch.c index d2c0862e..07a2e9fc 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_port_dispatch.c +++ b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_port_dispatch.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -60,12 +61,6 @@ /* */ /* _txm_module_manager_kernel_dispatch */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2) { @@ -88,7 +83,7 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; ); break; } - + case TXM_THREAD_SECURE_STACK_FREE_CALL: { if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION) @@ -102,13 +97,13 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; ); break; } - + default: { /* Unhandled kernel request, return an error! */ break; } } - + return(return_value); } diff --git a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_thread_stack_build.S index aa72b0be..99bfa470 100644 --- a/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_thread_stack_build.S +++ b/ports_module/cortex_m23/gnu/module_manager/src/txm_module_manager_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ // VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) // { @@ -93,7 +88,7 @@ _txm_module_manager_thread_stack_build: Stack Bottom: (higher memory address) */ LDR r2, [r0, #16] // Pickup end of stack area - MOVW r3, #0x7 // + MOVW r3, #0x7 // BICS r2, r2, r3 // Align frame for 8-byte alignment SUBS r2, r2, #68 // Subtract frame size #ifdef TX_SINGLE_MODE_SECURE diff --git a/ports_module/cortex_m23/iar/example_build/sample_threadx_module.c b/ports_module/cortex_m23/iar/example_build/sample_threadx_module.c index 939433cd..e9605af8 100644 --- a/ports_module/cortex_m23/iar/example_build/sample_threadx_module.c +++ b/ports_module/cortex_m23/iar/example_build/sample_threadx_module.c @@ -1,5 +1,5 @@ -/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes - examples of eight threads of different priorities, using a message queue, semaphore, mutex, +/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes + examples of eight threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ /* Specify that this is a module! */ @@ -20,7 +20,7 @@ #define DEMO_QUEUE_SIZE 100 -/* Define the pool space in the bss section of the module. ULONG is used to +/* Define the pool space in the bss section of the module. ULONG is used to get the word alignment. */ ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4]; @@ -101,7 +101,7 @@ void demo_module_start(ULONG id) CHAR *pointer; /* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within - their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting + their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting the control block(s). */ txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD)); txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD)); @@ -117,7 +117,7 @@ CHAR *pointer; txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP)); txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL)); txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL)); - + /* Create a byte memory pool from which to allocate the thread stacks. */ tx_byte_pool_create(byte_pool_0, "module byte pool 0", (UCHAR*)demo_module_pool_space, DEMO_BYTE_POOL_SIZE); @@ -129,42 +129,42 @@ CHAR *pointer; tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create the main thread. */ - tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ - tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 2. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 3. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ - tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -172,23 +172,23 @@ CHAR *pointer; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ - tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ - tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -233,7 +233,7 @@ void thread_0_entry(ULONG thread_input) UINT status; - + /* This thread simply sits in while-forever-sleep loop. */ while(1) { @@ -243,7 +243,7 @@ UINT status; /* Sleep for 10 ticks. */ tx_thread_sleep(10); - + /* Set event flag 0 to wakeup thread 5. */ status = tx_event_flags_set(event_flags_0, 0x1, TX_OR); @@ -291,19 +291,19 @@ UINT status; { /* Test memory handler. */ *(ULONG *)0x64005000 = 0xCDCDCDCD; - - + + /* Increment the thread counter. */ thread_2_counter++; /* Retrieve a message from the queue. */ status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -362,7 +362,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -415,7 +415,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(mutex_0); diff --git a/ports_module/cortex_m23/iar/example_build/sample_threadx_module.icf b/ports_module/cortex_m23/iar/example_build/sample_threadx_module.icf index 8cfe4766..167c26fb 100644 --- a/ports_module/cortex_m23/iar/example_build/sample_threadx_module.icf +++ b/ports_module/cortex_m23/iar/example_build/sample_threadx_module.icf @@ -35,11 +35,11 @@ do not initialize { section .noinit }; //place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; -define movable block ROPI with alignment = 4, fixed order -{ +define movable block ROPI with alignment = 4, fixed order +{ ro object txm_module_preamble.o, - ro, - ro data + ro, + ro data }; define movable block RWPI with alignment = 8, fixed order, static base diff --git a/ports_module/cortex_m23/iar/example_build/sample_threadx_module_manager.c b/ports_module/cortex_m23/iar/example_build/sample_threadx_module_manager.c index 28299f6c..59aee1b9 100644 --- a/ports_module/cortex_m23/iar/example_build/sample_threadx_module_manager.c +++ b/ports_module/cortex_m23/iar/example_build/sample_threadx_module_manager.c @@ -53,8 +53,8 @@ void tx_application_define(void *first_unused_memory) CHAR *pointer = (CHAR*)first_unused_memory; - tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); pointer = pointer + DEMO_STACK_SIZE; } @@ -74,22 +74,22 @@ void module_manager_entry(ULONG thread_input) /* Register a fault handler. */ txm_module_manager_memory_fault_notify(module_fault_handler); - + /* Load the module that is already there, in this example it is placed there by the multiple image download. */ txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0x080F0000); - + /* Enable 128 byte read/write shared memory region at 0x64005000. */ txm_module_manager_external_memory_enable(&my_module, (void *) 0x64005000, 128, TXM_MODULE_ATTRIBUTE_READ_WRITE); - + /* Start the module. */ txm_module_manager_start(&my_module); /* Sleep for a while.... */ tx_thread_sleep(1000); - + /* Stop the module. */ txm_module_manager_stop(&my_module); - + /* Unload the module. */ txm_module_manager_unload(&my_module); @@ -98,7 +98,7 @@ void module_manager_entry(ULONG thread_input) /* Start the module again. */ txm_module_manager_start(&my_module); - + /* Now just spin... */ while(1) { diff --git a/ports_module/cortex_m23/iar/example_build/tx_initialize_low_level.s b/ports_module/cortex_m23/iar/example_build/tx_initialize_low_level.s index 69bd7e29..fb6a109f 100644 --- a/ports_module/cortex_m23/iar/example_build/tx_initialize_low_level.s +++ b/ports_module/cortex_m23/iar/example_build/tx_initialize_low_level.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -70,13 +71,6 @@ __tx_free_memory_start /* CALLED BY */ /* */ /* _tx_initialize_kernel_enter ThreadX entry function */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_initialize_low_level(VOID) // { @@ -100,7 +94,7 @@ _tx_initialize_low_level: // LDR r0, =0xE0001000 // Build address of DWT register // LDR r1, [r0] // Pickup the current value // ORR r1, r1, #1 // Set the CYCCNTENA bit -// STR r1, [r0] // Enable the cycle count register +// STR r1, [r0] // Enable the cycle count register /* Set system stack pointer from vector value. */ LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer @@ -118,21 +112,21 @@ _tx_initialize_low_level: /* Configure handler priorities. */ LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD18 // - ADD r0, r0, r2 // + LDR r2, =0xD18 // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 4-7 Priority Registers LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD1C // - ADD r0, r0, r2 // + LDR r2, =0xD1C // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 8-11 Priority Registers // Note: SVC must be lowest priority, which is 0xFF LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r2, =0xD20 // - ADD r0, r0, r2 // + LDR r2, =0xD20 // + ADD r0, r0, r2 // STR r1, [r0] // Setup System Handlers 12-15 Priority Registers // Note: PnSV must be lowest priority, which is 0xFF @@ -191,7 +185,7 @@ HardFault_Handler: // A stack overflow will trigger a hardfault. // There is no CFSR in M23, so we will not try to // determine if the fault is caused by a stack overflow - // or some other condition. + // or some other condition. B HardFault_Handler diff --git a/ports_module/cortex_m23/iar/inc/tx_port.h b/ports_module/cortex_m23/iar/inc/tx_port.h index 14d287ef..9f8547da 100644 --- a/ports_module/cortex_m23/iar/inc/tx_port.h +++ b/ports_module/cortex_m23/iar/inc/tx_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -42,19 +43,6 @@ /* own special types that can be mapped to actual data types by this */ /* file to guarantee consistency in the interface and functionality. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 04-25-2022 Scott Larson Modified comments and added */ -/* volatile to registers, */ -/* resulting in version 6.1.11 */ -/* 07-29-2022 Scott Larson Modified comments and changed */ -/* secure stack initialization */ -/* macro to port-specific, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ #ifndef TX_PORT_H @@ -118,24 +106,24 @@ UINT _tx_thread_secure_stack_free(struct TX_THREAD_STRUCT *tx_thread); #error "Do not define TX_ENABLE_STACK_CHECKING" #endif -/* If user does not want to terminate thread on stack overflow, +/* If user does not want to terminate thread on stack overflow, #define the TX_THREAD_NO_TERMINATE_STACK_ERROR symbol. The thread will be rescheduled and continue to cause the exception. It is suggested user code handle this by registering a notification with the tx_thread_stack_error_notify function. */ /*#define TX_THREAD_NO_TERMINATE_STACK_ERROR */ -/* Define the system API mappings based on the error checking - selected by the user. Note: this section is only applicable to +/* Define the system API mappings based on the error checking + selected by the user. Note: this section is only applicable to application source code, hence the conditional that turns off this stuff when the include file is processed by the ThreadX source. */ #ifndef TX_SOURCE_CODE -/* Determine if error checking is desired. If so, map API functions +/* Determine if error checking is desired. If so, map API functions to the appropriate error checking front-ends. Otherwise, map API - functions to the core functions that actually perform the work. + functions to the core functions that actually perform the work. Note: error checking is enabled by default. */ #ifdef TX_DISABLE_ERROR_CHECKING @@ -452,7 +440,7 @@ __attribute__( ( always_inline ) ) static inline void __set_CONTROL(ULONG contro /* A thread can be terminated by another thread, so we first check if it's self-terminating and not in an ISR. If so, deactivate the FPU via CONTROL.FPCA. Otherwise we are in an interrupt or another thread is terminating - this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush + this one, so if the FPCCR.LSPACT bit is set, we need to save the CONTROL.FPCA state, touch the FPU to flush the lazy FPU save, then restore the CONTROL.FPCA state. */ #ifndef TX_MISRA_ENABLE @@ -610,7 +598,7 @@ extern void _tx_thread_secure_stack_initialize(void); #define TX_LOWEST_SET_BIT_CALCULATE(m, b) (b) = (UINT) __CLZ(__RBIT((m))); #elif defined(__GNUC__) /* GCC and AC6 Compiler */ #define TX_LOWEST_SET_BIT_CALCULATE(m, b) __asm__ volatile (" RBIT %0,%1 ": "=r" (m) : "r" (m) ); \ - __asm__ volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) ); + __asm__ volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) ); #endif /* Define the interrupt disable/restore macros for each compiler. */ @@ -707,7 +695,7 @@ VOID _tx_thread_interrupt_restore(UIN #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Cortex-M23/IAR Version 6.4.2 *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/IAR Version 6.5.0.202601 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports_module/cortex_m23/iar/inc/tx_secure_interface.h b/ports_module/cortex_m23/iar/inc/tx_secure_interface.h index 13cb4b44..ac4a99d4 100644 --- a/ports_module/cortex_m23/iar/inc/tx_secure_interface.h +++ b/ports_module/cortex_m23/iar/inc/tx_secure_interface.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -37,12 +38,6 @@ /* It is assumed that tx_api.h and tx_port.h have already been */ /* included. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ #ifndef TX_SECURE_INTERFACE_H diff --git a/ports_module/cortex_m23/iar/inc/txm_module_port.h b/ports_module/cortex_m23/iar/inc/txm_module_port.h index 2b5e7b3d..d394aaaf 100644 --- a/ports_module/cortex_m23/iar/inc/txm_module_port.h +++ b/ports_module/cortex_m23/iar/inc/txm_module_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -35,12 +36,6 @@ /* This file defines the basic module constants, interface structures, */ /* and function prototypes. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ #ifndef TXM_MODULE_PORT_H @@ -349,6 +344,6 @@ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instanc #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-M23/IAR Version 6.4.2 *"; + "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-M23/IAR Version 6.5.0.202601 *"; #endif diff --git a/ports_module/cortex_m23/iar/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_m23/iar/module_lib/src/txm_module_thread_shell_entry.c index e0c84d32..1bcfe689 100644 --- a/ports_module/cortex_m23/iar/module_lib/src/txm_module_thread_shell_entry.c +++ b/ports_module/cortex_m23/iar/module_lib/src/txm_module_thread_shell_entry.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -86,12 +87,6 @@ extern VOID __iar_data_init3(VOID); /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info) { @@ -107,14 +102,14 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN { /* Initialize the IAR C environment. */ __iar_data_init3(); - + /* Save the entry info pointer, for later use. */ _txm_module_entry_info = thread_info; - + /* Save the kernel function dispatch address. This is used to make all resident calls from the module. */ _txm_module_kernel_call_dispatcher = thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher; - + /* Ensure that we have a valid pointer. */ while (!_txm_module_kernel_call_dispatcher) { @@ -122,7 +117,7 @@ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN An error here typically indicates the resident portion of _tx_thread_schedule is not supporting the trap to obtain the function pointer. */ } - + /* Resume the module's callback thread, already created in the manager. */ _txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread); } diff --git a/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_allocate.c b/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_allocate.c index 05a922d4..95c101de 100644 --- a/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_allocate.c +++ b/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_allocate.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* */ /* Module application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { diff --git a/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_free.c b/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_free.c index 61c852b5..47c718a0 100644 --- a/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_free.c +++ b/ports_module/cortex_m23/iar/module_lib/src/txm_thread_secure_stack_free.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -54,12 +55,6 @@ /* */ /* Module application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) { diff --git a/ports_module/cortex_m23/iar/module_manager/inc/txm_module_manager_dispatch_port.h b/ports_module/cortex_m23/iar/module_manager/inc/txm_module_manager_dispatch_port.h index 8bbcd5b3..0575c748 100644 --- a/ports_module/cortex_m23/iar/module_manager/inc/txm_module_manager_dispatch_port.h +++ b/ports_module/cortex_m23/iar/module_manager/inc/txm_module_manager_dispatch_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_restore.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_restore.s index 83ab38c9..11f3d018 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_restore.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_restore.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,13 +52,6 @@ /* CALLED BY */ /* */ /* ISRs Interrupt Service Routines */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_restore(VOID) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_save.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_save.s index 8ea8a775..bb6b9d51 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_save.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_context_save.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,13 +52,6 @@ /* CALLED BY */ /* */ /* ISRs */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_save(VOID) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_control.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_control.s index 1e5e1973..5a74b366 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_control.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_control.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,13 +52,6 @@ /* CALLED BY */ /* */ /* Application Code */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_control(UINT new_posture) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_disable.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_disable.s index 375c9926..6b95841a 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_disable.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_disable.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,13 +52,6 @@ /* CALLED BY */ /* */ /* Application Code */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_disable(VOID) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_restore.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_restore.s index 3768cfb3..c5a40257 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_restore.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_interrupt_restore.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -51,13 +52,6 @@ /* CALLED BY */ /* */ /* Application Code */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_interrupt_restore(UINT previous_posture) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_schedule.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_schedule.s index 5c7aafaa..f7f933e0 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_schedule.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_schedule.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -68,20 +69,6 @@ /* */ /* _tx_initialize_kernel_enter ThreadX entry function */ /* _tx_thread_system_return Return to system from thread */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* 04-25-2022 Scott Larson Optimized MPU configuration, */ -/* resulting in version 6.1.11 */ -/* 07-29-2022 Scott Larson Removed the code path to skip */ -/* MPU reloading, */ -/* resulting in version 6.1.12 */ -/* 10-31-2022 Scott Larson Added low power support, */ -/* resulting in version 6.2.0 */ -/* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) // { @@ -178,7 +165,7 @@ BusFault_Handler: STR r0, [r2, #88] // Save xPSR MRS r0, CONTROL // Pickup current CONTROL register - MOVW r1, #0x1 // + MOVW r1, #0x1 // BICS r0, r0, r1 // Clear the UNPRIV bit MSR CONTROL, r0 // Setup new CONTROL register @@ -413,7 +400,7 @@ _tx_enable_mpu: MOVS r1, #5 // Build enable value with background region enabled STR r1, [r0] // Enable MPU MOV r1, r8 // Get copied thread ptr - + skip_mpu_setup: // Restore the thread context and PSP @@ -519,7 +506,7 @@ _tx_entry_continue: _tx_skip_kernel_stack_enter: MRS r0, CONTROL // Pickup current CONTROL register - MOVW r1, #0x1 // + MOVW r1, #0x1 // BICS r0, r0, r1 // Clear the UNPRIV bit MSR CONTROL, r0 // Setup new CONTROL register BX lr // Return to thread @@ -600,7 +587,7 @@ _tx_alloc_continue: STR r0, [r1] // Store function return value MOV lr, r2 BX lr - + _tx_svc_secure_free: LDR r2, =_tx_free_return-1 // Load address of where we should have come from CMP r1, r2 // Did we come from _tx_thread_secure_stack_free? diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack.c b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack.c index 099097fb..9ce9ccc3 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack.c +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -102,21 +103,6 @@ static INT tx_head_free_index = 0U; /* */ /* _tx_initialize_kernel_enter */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* 10-16-2020 Scott Larson Modified comment(s), */ -/* resulting in version 6.1.1 */ -/* 06-02-2021 Scott Larson Modified comment(s), changed */ -/* name, execute in handler */ -/* mode, disable optimization, */ -/* resulting in version 6.1.7 */ -/* 07-29-2022 Scott Larson Modified comments, updated */ -/* secure stack allocation, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ __attribute__((cmse_nonsecure_entry)) UINT _tx_thread_secure_mode_stack_initialize(void) diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_allocate.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_allocate.s index bc935c8b..7c7dfacf 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_allocate.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_allocate.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,13 +53,6 @@ /* CALLED BY */ /* */ /* Application Code */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_free.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_free.s index e99f7bf3..0701c03c 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_free.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_free.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -50,13 +51,6 @@ /* CALLED BY */ /* */ /* Application Code */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // UINT _tx_thread_secure_stack_free(TX_THREAD *thread_ptr) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_initialize.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_initialize.s index 95f0c250..325a62bf 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_initialize.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_secure_stack_initialize.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -50,17 +51,6 @@ /* CALLED BY */ /* */ /* TX_PORT_SPECIFIC_PRE_INITIALIZATION */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 06-02-2021 Scott Larson Initial Version 6.1.7 */ -/* 07-29-2022 Scott Larson Modified comments and changed */ -/* secure stack initialization */ -/* macro to port-specific, */ -/* resulting in version 6.1.12 */ -/* */ /**************************************************************************/ // VOID _tx_thread_secure_stack_initialize(VOID) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_stack_build.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_stack_build.s index bbb60ae6..71d25cec 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_stack_build.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_stack_build.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,13 +54,6 @@ /* CALLED BY */ /* */ /* _tx_thread_create Create thread service */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) // { @@ -90,7 +84,7 @@ _tx_thread_stack_build: Stack Bottom: (higher memory address) */ LDR r2, [r0, #16] // Pickup end of stack area - MOVW r3, #0x7 // + MOVW r3, #0x7 // BICS r2, r2, r3 // Align frame for 8-byte alignment SUBS r2, r2, #68 // Subtract frame size #ifdef TX_SINGLE_MODE_SECURE diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_system_return.s b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_system_return.s index f574ed35..91ef52c7 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_thread_system_return.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_thread_system_return.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,13 +54,6 @@ /* CALLED BY */ /* */ /* ThreadX components */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_thread_system_return(VOID) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/tx_timer_interrupt.s b/ports_module/cortex_m23/iar/module_manager/src/tx_timer_interrupt.s index 9dd72463..eadef8bf 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/tx_timer_interrupt.s +++ b/ports_module/cortex_m23/iar/module_manager/src/tx_timer_interrupt.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -67,13 +68,6 @@ /* CALLED BY */ /* */ /* interrupt vector */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ // VOID _tx_timer_interrupt(VOID) // { diff --git a/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_allocate.c b/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_allocate.c index 6c394cae..9bade139 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_allocate.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_allocate.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -63,12 +64,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_size) { @@ -76,10 +71,10 @@ UINT _txe_thread_secure_stack_allocate(TX_THREAD *thread_ptr, ULONG stack_siz return(TX_FEATURE_NOT_ENABLED); #else UINT status; - + /* Default status to success. */ status = TX_SUCCESS; - + /* Check for an invalid thread pointer. */ if (thread_ptr == TX_NULL) { @@ -93,7 +88,7 @@ UINT status; /* Thread pointer is invalid, return appropriate error code. */ status = TX_THREAD_ERROR; } - + /* Check for interrupt call. */ if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0)) { @@ -104,7 +99,7 @@ UINT status; status = TX_CALLER_ERROR; } } - + /* Determine if everything is okay. */ if (status == TX_SUCCESS) { diff --git a/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_free.c b/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_free.c index a2f81e77..75a26945 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_free.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txe_thread_secure_stack_free.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -61,12 +62,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) { @@ -74,10 +69,10 @@ UINT _txe_thread_secure_stack_free(TX_THREAD *thread_ptr) return(TX_FEATURE_NOT_ENABLED); #else UINT status; - + /* Default status to success. */ status = TX_SUCCESS; - + /* Check for an invalid thread pointer. */ if (thread_ptr == TX_NULL) { @@ -93,7 +88,7 @@ UINT status; /* Thread pointer is invalid, return appropriate error code. */ status = TX_THREAD_ERROR; } - + /* Check for interrupt call. */ if (TX_THREAD_GET_SYSTEM_STATE() != ((ULONG) 0)) { @@ -104,7 +99,7 @@ UINT status; status = TX_CALLER_ERROR; } } - + /* Determine if everything is okay. */ if (status == TX_SUCCESS) { diff --git a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_alignment_adjust.c b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_alignment_adjust.c index c520f155..e1534699 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_alignment_adjust.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_alignment_adjust.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -60,12 +61,6 @@ /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, ULONG *code_size, @@ -77,7 +72,7 @@ VOID _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, /* Round code and data size UP to TXM_MODULE_MPU_ALIGNMENT bytes. */ *code_size = (*code_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1); *data_size = (*data_size + TXM_MODULE_MPU_ALIGNMENT - 1) & ~(TXM_MODULE_MPU_ALIGNMENT - 1); - + /* Alignment for code and data is TXM_MODULE_MPU_ALIGNMENT bytes. */ *code_alignment = TXM_MODULE_MPU_ALIGNMENT; *data_alignment = TXM_MODULE_MPU_ALIGNMENT; diff --git a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_external_memory_enable.c b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_external_memory_enable.c index 004d5fe1..1c7c1b47 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_external_memory_enable.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_external_memory_enable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -63,12 +64,6 @@ /* */ /* Application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance, VOID *start_address, @@ -105,7 +100,7 @@ ULONG shared_index; /* Invalid module pointer. */ return(TX_PTR_ERROR); } - + /* Determine if the module instance is in the loaded state. */ if (module_instance -> txm_module_instance_state != TXM_MODULE_LOADED) { @@ -115,49 +110,49 @@ ULONG shared_index; /* Return error if the module is not ready. */ return(TX_START_ERROR); } - + /* Determine if there are shared memory entries available. */ if(module_instance -> txm_module_instance_shared_memory_count >= TXM_MODULE_MPU_SHARED_ENTRIES) { /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* No more entries available. */ return(TX_NO_MEMORY); } - + /* Start address must adhere to Cortex-M23 MPU alignment. */ address = (ULONG) start_address; if(address != (address & ~(TXM_MODULE_MPU_ALIGNMENT - 1))) { /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* Return alignment error. */ return(TXM_MODULE_ALIGNMENT_ERROR); } - + /* At this point, we have a valid address. Set up MPU registers. */ - + /* Pick up index into shared memory entries. */ shared_index = TXM_MODULE_MPU_SHARED_INDEX + module_instance -> txm_module_instance_shared_memory_count; - + /* Set base address register with start address, sanitized attributes and execute never. */ module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_base_address = address | (attributes & TXM_MODULE_ATTRIBUTE_MASK) | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER; - + /* Set the limit address (data start + length-1), attribute index, and enable bit. */ module_instance -> txm_module_instance_mpu_registers[shared_index].txm_module_mpu_region_limit_address = (address + length-1) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE; - + /* Keep track of shared memory address and length in module instance. */ module_instance -> txm_module_instance_shared_memory_address[module_instance -> txm_module_instance_shared_memory_count] = address; module_instance -> txm_module_instance_shared_memory_length[module_instance -> txm_module_instance_shared_memory_count] = length; - + /* Increment counter. */ module_instance -> txm_module_instance_shared_memory_count++; - + /* Release the protection mutex. */ _tx_mutex_put(&_txm_module_manager_mutex); - + /* Return success. */ return(TX_SUCCESS); } diff --git a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_handler.c b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_handler.c index c7107a60..c31c70fc 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_handler.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_handler.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -71,12 +72,6 @@ TXM_MODULE_MANAGER_FAULT_INFO /* */ /* Fault handler */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_memory_fault_handler(VOID) { @@ -89,7 +84,7 @@ TX_THREAD *thread_ptr; /* Initialize the module instance pointer to NULL. */ module_instance_ptr = TX_NULL; - + /* Is there a thread? */ if (thread_ptr) { @@ -99,7 +94,7 @@ TX_THREAD *thread_ptr; /* Terminate the current thread. */ _tx_thread_terminate(_tx_thread_current_ptr); } - + /* Determine if there is a user memory fault notification callback. */ if (_txm_module_manager_fault_notify) { diff --git a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_notify.c b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_notify.c index 6831e0df..3223b566 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_notify.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_memory_fault_notify.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -66,18 +67,12 @@ extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *)) { /* Setup notification function. */ _txm_module_manager_fault_notify = notify_function; - + /* Return success. */ return(TX_SUCCESS); } diff --git a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_mm_register_setup.c index 3adcf647..55abbe5e 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_mm_register_setup.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_mm_register_setup.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _txm_module_manager_thread_create */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance) { @@ -91,27 +86,27 @@ ULONG callback_stack_size; /* Set base address register to module data address, which should be at least 32-byte aligned. Mask address to proper range, inner shareable, read write, execute never. */ module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_base_address = ((ULONG) module_instance -> txm_module_instance_data_start & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INNER_SHAREABLE | TXM_MODULE_ATTRIBUTE_READ_WRITE | TXM_MODULE_ATTRIBUTE_EXECUTE_NEVER; - + /* Adjust the size of the module elements to be aligned to the default alignment. We do this so that when we partition the allocated memory, we can simply place these regions right beside each other without having to align their pointers. Note this only works when they all have the same alignment. */ - + data_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_data_size; start_stop_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_start_stop_stack_size; callback_stack_size = module_instance -> txm_module_instance_preamble_ptr -> txm_module_preamble_callback_stack_size; - + data_size = ((data_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; start_stop_stack_size = ((start_stop_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; callback_stack_size = ((callback_stack_size + TXM_MODULE_DATA_ALIGNMENT - 1)/TXM_MODULE_DATA_ALIGNMENT) * TXM_MODULE_DATA_ALIGNMENT; /* Update the data size to include thread stacks. */ data_size = data_size + start_stop_stack_size + callback_stack_size; - + /* Set the limit address (data start + data size-1), attribute index, and enable bit. */ module_instance -> txm_module_instance_mpu_registers[TXM_MODULE_MPU_DATA_INDEX].txm_module_mpu_region_limit_address = (((ULONG) module_instance -> txm_module_instance_data_start + data_size - 1) & 0xFFFFFFE0) | TXM_MODULE_ATTRIBUTE_INDEX | TXM_MODULE_ATTRIBUTE_REGION_ENABLE; /* End of module data protection. */ - + /* Remaining MPU entries are disabled for now and can be used for shared memory. */ } @@ -168,7 +163,7 @@ ALIGN_TYPE shared_memory_address_end; { return(TX_FALSE); } - + /* Check if the object is inside the module data. */ if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) && ((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1))) diff --git a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_port_dispatch.c b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_port_dispatch.c index d2c0862e..07a2e9fc 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_port_dispatch.c +++ b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_port_dispatch.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -60,12 +61,6 @@ /* */ /* _txm_module_manager_kernel_dispatch */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2) { @@ -88,7 +83,7 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; ); break; } - + case TXM_THREAD_SECURE_STACK_FREE_CALL: { if (module_instance -> txm_module_instance_property_flags & TXM_MODULE_MEMORY_PROTECTION) @@ -102,13 +97,13 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; ); break; } - + default: { /* Unhandled kernel request, return an error! */ break; } } - + return(return_value); } diff --git a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_thread_stack_build.s b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_thread_stack_build.s index ed95928c..a60e86df 100644 --- a/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_thread_stack_build.s +++ b/ports_module/cortex_m23/iar/module_manager/src/txm_module_manager_thread_stack_build.s @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,13 +54,6 @@ /* CALLED BY */ /* */ /* _tx_thread_create Create thread service */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 04-02-2021 Scott Larson Initial Version 6.1.6 */ -/* */ /**************************************************************************/ // VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) // { @@ -91,7 +85,7 @@ _txm_module_manager_thread_stack_build: Stack Bottom: (higher memory address) */ LDR r2, [r0, #16] // Pickup end of stack area - MOVW r3, #0x7 // + MOVW r3, #0x7 // BICS r2, r2, r3 // Align frame for 8-byte alignment SUBS r2, r2, #68 // Subtract frame size #ifdef TX_SINGLE_MODE_SECURE |