Release 6.1.8v6.1.8_rel

14 files changed, 137 insertions, 90 deletions

diff --git a/ports_module/cortex_m4/ac6/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_m4/ac6/module_lib/src/txm_module_thread_shell_entry.c
index 0f99ad4a..1c51577d 100644
--- a/ports_module/cortex_m4/ac6/module_lib/src/txm_module_thread_shell_entry.c
+++ b/ports_module/cortex_m4/ac6/module_lib/src/txm_module_thread_shell_entry.c
@@ -89,7 +89,7 @@ extern VOID _txm_module_initialize(VOID);
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
@@ -106,14 +106,14 @@ VOID  _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_EN
     {
         /* Initialize the ARM C environment.  */
         _txm_module_initialize();
-
+        
         /* Save the entry info pointer, for later use.  */
         _txm_module_entry_info =  thread_info;
-
+        
         /* Save the kernel function dispatch address. This is used to make all resident calls from
            the module.  */
         _txm_module_kernel_call_dispatcher =  thread_info -> txm_module_thread_entry_info_kernel_call_dispatcher;
-
+        
         /* Ensure that we have a valid pointer.  */
         while (!_txm_module_kernel_call_dispatcher)
         {
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_restore.S
index 7420808c..17a79b0f 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_restore.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_restore.S
@@ -20,6 +20,10 @@
 /**************************************************************************/
 /**************************************************************************/
 
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    .global  _tx_execution_isr_exit
+#endif
+
     .text
     .align 4
     .syntax unified
@@ -27,11 +31,11 @@
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
-/*    _tx_thread_context_restore                        Cortex-M4/AC6     */
-/*                                                           6.1.2        */
+/*    _tx_thread_context_restore                       Cortex-Mx/AC6      */
+/*                                                           6.1.8        */
 /*  AUTHOR                                                                */
 /*                                                                        */
-/*    William E. Lamie, Microsoft Corporation                             */
+/*    Scott Larson, Microsoft Corporation                                 */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -48,7 +52,7 @@
 /*                                                                        */
 /*  CALLS                                                                 */
 /*                                                                        */
-/*    None                                                                */
+/*    [_tx_execution_isr_exit]              Execution profiling ISR exit  */
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
@@ -58,9 +62,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  11-09-2020     Scott Larson             Modified comment(s),          */
-/*                                            resulting in version 6.1.2  */
+/*  08-02-2021      Scott Larson            Initial Version 6.1.8         */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_context_restore(VOID)
@@ -68,6 +70,13 @@
     .global  _tx_thread_context_restore
     .thumb_func
 _tx_thread_context_restore:
-    /* Not needed for this port - just return!  */
+
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    /* Call the ISR exit function to indicate an ISR is complete.  */
+    PUSH    {r0, lr}                                // Save return address
+    BL      _tx_execution_isr_exit                  // Call the ISR exit function
+    POP     {r0, lr}                                // Recover return address
+#endif
+
     BX      lr
 // }
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_save.S b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_save.S
index 79938754..511ca82e 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_save.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_context_save.S
@@ -23,15 +23,18 @@
     .text
     .align 4
     .syntax unified
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    .global  _tx_execution_isr_enter
+#endif
 /**************************************************************************/
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
-/*    _tx_thread_context_save                           Cortex-M4/AC6     */
-/*                                                           6.1.2        */
+/*    _tx_thread_context_save                          Cortex-Mx/AC6      */
+/*                                                           6.1.8        */
 /*  AUTHOR                                                                */
 /*                                                                        */
-/*    William E. Lamie, Microsoft Corporation                             */
+/*    Scott Larson, Microsoft Corporation                                 */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -48,7 +51,7 @@
 /*                                                                        */
 /*  CALLS                                                                 */
 /*                                                                        */
-/*    None                                                                */
+/*    [_tx_execution_isr_enter]             Execution profiling ISR enter */
 /*                                                                        */
 /*  CALLED BY                                                             */
 /*                                                                        */
@@ -58,9 +61,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  11-09-2020     Scott Larson             Modified comment(s),          */
-/*                                            resulting in version 6.1.2  */
+/*  08-02-2021      Scott Larson            Initial Version 6.1.8         */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_context_save(VOID)
@@ -68,6 +69,15 @@
     .global  _tx_thread_context_save
     .thumb_func
 _tx_thread_context_save:
-    /* Not needed for this port - just return!  */
+
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    /* Call the ISR enter function to indicate an ISR is starting.  */
+    PUSH    {r0, lr}                                // Save return address
+    BL      _tx_execution_isr_enter                 // Call the ISR enter function
+    POP     {r0, lr}                                // Recover return address
+#endif
+
+    /* Context is already saved - just return.  */
+
     BX      lr
 // }
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_interrupt_control.S
index 10d5f0b2..07d2a131 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_interrupt_control.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_interrupt_control.S
@@ -27,11 +27,11 @@
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
-/*    _tx_thread_interrupt_control                      Cortex-M4/AC6     */
-/*                                                           6.1.2        */
+/*    _tx_thread_interrupt_control                     Cortex-Mx/AC6      */
+/*                                                           6.1.8        */
 /*  AUTHOR                                                                */
 /*                                                                        */
-/*    William E. Lamie, Microsoft Corporation                             */
+/*    Scott Larson, Microsoft Corporation                                 */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -58,9 +58,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  11-09-2020     Scott Larson             Modified comment(s),          */
-/*                                            resulting in version 6.1.2  */
+/*  08-02-2021      Scott Larson            Initial Version 6.1.8         */
 /*                                                                        */
 /**************************************************************************/
 // UINT   _tx_thread_interrupt_control(UINT new_posture)
@@ -68,9 +66,14 @@
     .global  _tx_thread_interrupt_control
     .thumb_func
 _tx_thread_interrupt_control:
+#ifdef TX_PORT_USE_BASEPRI
+    MRS     r1, BASEPRI                         // Pickup current interrupt posture
+    MSR     BASEPRI, r0                         // Apply the new interrupt posture
+    MOV     r0, r1                              // Transfer old to return register
+#else
     MRS     r1, PRIMASK                         // Pickup current interrupt lockout
     MSR     PRIMASK, r0                         // Apply the new interrupt lockout
     MOV     r0, r1                              // Transfer old to return register
+#endif
     BX      lr                                  // Return to caller
-
 // }
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_schedule.S
index 84f6ed47..ff2cd85a 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_schedule.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_schedule.S
@@ -20,17 +20,20 @@
 /**************************************************************************/
 /**************************************************************************/
 
-    .global  _tx_thread_current_ptr
-    .global  _tx_thread_execute_ptr
-    .global  _tx_timer_time_slice
-    .global  _tx_thread_preempt_disable
-    .global  _txm_module_manager_memory_fault_handler
-    .global  _txm_module_manager_memory_fault_info
-#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
-    .global  _tx_execution_thread_enter
-    .global  _tx_execution_thread_exit
+    .global _tx_thread_current_ptr
+    .global _tx_thread_execute_ptr
+    .global _tx_timer_time_slice
+    .global _tx_thread_preempt_disable
+    .global _txm_module_manager_memory_fault_handler
+    .global _txm_module_manager_memory_fault_info
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
+    .global _tx_execution_thread_enter
+    .global _tx_execution_thread_exit
+#endif
+#ifdef TX_LOW_POWER
+    .global tx_low_power_enter
+    .global tx_low_power_exit
 #endif
-
     .text
     .align 4
     .syntax unified
@@ -90,7 +93,7 @@ _tx_thread_schedule:
 
     /* This function should only ever be called on Cortex-M
        from the first schedule request. Subsequent scheduling occurs
-       from the PendSV handling routines below. */
+       from the PendSV handling routine below. */
 
     /* Clear the preempt-disable flag to enable rescheduling after initialization on Cortex-M targets.  */
 
@@ -98,9 +101,8 @@ _tx_thread_schedule:
     LDR     r2, =_tx_thread_preempt_disable         // Build address of preempt disable flag
     STR     r0, [r2, #0]                            // Clear preempt disable flag
 
-    /* Clear CONTROL.FPCA bit so FPU registers aren't unnecessarily stacked.  */
-
 #ifdef __ARM_FP
+    /* Clear CONTROL.FPCA bit so VFP registers aren't unnecessarily stacked.  */
     MRS     r0, CONTROL                             // Pickup current CONTROL register
     BIC     r0, r0, #4                              // Clear the FPCA bit
     MSR     CONTROL, r0                             // Setup new CONTROL register
@@ -113,7 +115,6 @@ _tx_thread_schedule:
     STR     r1, [r0]                                //
 
     /* Enable interrupts */
-
     CPSIE   i
 
     /* Enter the scheduler for the first time.  */
@@ -132,7 +133,6 @@ __tx_wait_here:
 
 
     /* Memory Exception Handler.  */
-
     .global  MemManage_Handler
     .global  BusFault_Handler
     .global  UsageFault_Handler
@@ -210,7 +210,7 @@ UsageFault_Handler:
 
     BL      _txm_module_manager_memory_fault_handler    // Call memory manager fault handler
 
-#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
     /* Call the thread exit function to indicate the thread is no longer executing.  */
     CPSID   i                                       // Disable interrupts
     BL      _tx_execution_thread_exit               // Call the thread exit function
@@ -245,7 +245,7 @@ __tx_PendSVHandler:
 
 __tx_ts_handler:
 
-#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
     /* Call the thread exit function to indicate the thread is no longer executing.  */
     CPSID   i                                       // Disable interrupts
     PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
@@ -345,7 +345,7 @@ __tx_ts_restore:
 
     STR     r5, [r4]                                // Setup global time-slice
 
-#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
     /* Call the thread entry function to indicate the thread is executing.  */
     PUSH    {r0, r1}                                // Save r0 and r1
     BL      _tx_execution_thread_enter              // Call the thread execution enter function
@@ -444,6 +444,7 @@ __tx_SVCallHandler:
     STR     r0, [r2, #16]                           // Set stack end
     STR     r3, [r2, #20]                           // Set stack size
 #endif
+
     MRS     r3, PSP                                 // Pickup thread stack pointer
     TST     lr, #0x10                               // Test for extended module stack
     ITT     EQ
@@ -496,6 +497,29 @@ _tx_thread_user_return:
     STR     r1, [r2, #16]                           // Set stack end
     STR     r3, [r2, #20]                           // Set stack size
 #endif
+
+#ifdef __ARM_FP
+    /* If lazy stacking is pending, check if it can be cleared.
+       if(LSPACT && tx_thread_module_stack_start < FPCAR && FPCAR < tx_thread_module_stack_end)
+       then clear LSPACT. */
+    LDR     r3, =0xE000EF34                         // Address of FPCCR
+    LDR     r3, [r3]                                // Load FPCCR
+    TST     r3, #1                                  // Check if LSPACT is set
+    BEQ     _tx_no_lazy_clear                       // if clear, move on
+    LDR     r1, =0xE000EF38                         // Address of FPCAR
+    LDR     r1, [r1]                                // Load FPCAR
+    LDR     r0, [r2, #0xA4]                         // Load kernel stack start
+    CMP     r1, r0                                  // If FPCAR < start, move on
+    BLO     _tx_no_lazy_clear
+    LDR     r0, [r2, #0xA8]                         // Load kernel stack end
+    CMP     r0, r1                                  // If end < FPCAR, move on
+    BLO     _tx_no_lazy_clear
+    BIC     r3, #1                                  // Clear LSPACT
+    LDR     r1, =0xE000EF34                         // Address of FPCCR
+    STR     r3, [r1]                                // Save updated FPCCR
+_tx_no_lazy_clear:
+#endif
+
     LDR     r0, [r2, #0xB0]                         // Load the module thread stack pointer
     MRS     r3, PSP                                 // Pickup kernel stack pointer
     TST     r0, #1                                  // Is module stack extended?
@@ -530,7 +554,7 @@ _tx_skip_kernel_stack_exit:
    /* Kernel entry function from user mode.  */
 
     .global  _txm_module_manager_kernel_dispatch
-    .align 5
+    .align  5
     .syntax unified
 // VOID   _txm_module_manager_user_mode_entry(VOID)
 // {
@@ -558,12 +582,14 @@ _txm_module_user_mode_exit:
 // }
 
 #ifdef __ARM_FP
-    .global  tx_thread_fpu_disable
-    .thumb_func
-tx_thread_fpu_disable:
+
     .global  tx_thread_fpu_enable
     .thumb_func
 tx_thread_fpu_enable:
+    .global  tx_thread_fpu_disable
+    .thumb_func
+tx_thread_fpu_disable:
+
     /* Automatic VPF logic is supported, this function is present only for
        backward compatibility purposes and therefore simply returns.  */
 
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_stack_build.S
index ca5be793..d50f9243 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_stack_build.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_stack_build.S
@@ -27,11 +27,11 @@
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
-/*    _tx_thread_stack_build                            Cortex-M4/AC6     */
-/*                                                           6.1.2        */
+/*    _tx_thread_stack_build                           Cortex-Mx/AC6      */
+/*                                                           6.1.8        */
 /*  AUTHOR                                                                */
 /*                                                                        */
-/*    William E. Lamie, Microsoft Corporation                             */
+/*    Scott Larson, Microsoft Corporation                                 */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -60,9 +60,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  11-09-2020     Scott Larson             Modified comment(s),          */
-/*                                            resulting in version 6.1.2  */
+/*  08-02-2021      Scott Larson            Initial Version 6.1.8         */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
@@ -71,7 +69,6 @@
     .thumb_func
 _tx_thread_stack_build:
 
-
     /* Build a fake interrupt frame.  The form of the fake interrupt stack
        on the Cortex-M should look like the following after it is built:
 
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_system_return.S b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_system_return.S
index 48f8bfd6..6560db62 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_system_return.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/tx_thread_system_return.S
@@ -20,7 +20,6 @@
 /**************************************************************************/
 /**************************************************************************/
 
-
     .text 32
     .align 4
     .syntax unified
@@ -28,11 +27,11 @@
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
-/*    _tx_thread_system_return                          Cortex-M4/AC6     */
-/*                                                           6.1          */
+/*    _tx_thread_system_return                         Cortex-Mx/AC6      */
+/*                                                           6.1.8        */
 /*  AUTHOR                                                                */
 /*                                                                        */
-/*    William E. Lamie, Microsoft Corporation                             */
+/*    Scott Larson, Microsoft Corporation                                 */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -61,7 +60,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  08-02-2021      Scott Larson            Initial Version 6.1.8         */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_system_return(VOID)
@@ -79,10 +78,16 @@ _tx_thread_system_return:
     MRS     r0, IPSR                                // Pickup IPSR
     CMP     r0, #0                                  // Is it a thread returning?
     BNE     _isr_context                            // If ISR, skip interrupt enable
+#ifdef TX_PORT_USE_BASEPRI
+    MRS     r1, BASEPRI                             // Thread context returning, pickup BASEPRI
+    MOV     r0, #0
+    MSR     BASEPRI, r0                             // Enable interrupts
+    MSR     BASEPRI, r1                             // Restore original interrupt posture
+#else
     MRS     r1, PRIMASK                             // Thread context returning, pickup PRIMASK
     CPSIE   i                                       // Enable interrupts
     MSR     PRIMASK, r1                             // Restore original interrupt posture
+#endif
 _isr_context:
     BX      lr                                      // Return to caller
-
 // }
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex_m4/ac6/module_manager/src/tx_timer_interrupt.S
index 8ef8f9fd..46f54da0 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/tx_timer_interrupt.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/tx_timer_interrupt.S
@@ -20,15 +20,15 @@
 /**************************************************************************/
 /**************************************************************************/
 
-    .global      _tx_timer_time_slice
-    .global      _tx_timer_system_clock
-    .global      _tx_timer_current_ptr
-    .global      _tx_timer_list_start
-    .global      _tx_timer_list_end
-    .global      _tx_timer_expired_time_slice
-    .global      _tx_timer_expired
-    .global      _tx_thread_time_slice
-    .global      _tx_timer_expiration_process
+    .global _tx_timer_time_slice
+    .global _tx_timer_system_clock
+    .global _tx_timer_current_ptr
+    .global _tx_timer_list_start
+    .global _tx_timer_list_end
+    .global _tx_timer_expired_time_slice
+    .global _tx_timer_expired
+    .global _tx_thread_time_slice
+    .global _tx_timer_expiration_process
 
     .text
     .align 4
@@ -37,11 +37,11 @@
 /*                                                                        */
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
-/*    _tx_timer_interrupt                               Cortex-M4/AC6     */
-/*                                                           6.1.2        */
+/*    _tx_timer_interrupt                              Cortex-Mx/AC6      */
+/*                                                           6.1.8        */
 /*  AUTHOR                                                                */
 /*                                                                        */
-/*    William E. Lamie, Microsoft Corporation                             */
+/*    Scott Larson, Microsoft Corporation                                 */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -71,9 +71,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
-/*  11-09-2020     Scott Larson             Modified comment(s),          */
-/*                                            resulting in version 6.1.2  */
+/*  08-02-2021     Scott Larson             Initial Version 6.1.8         */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_timer_interrupt(VOID)
@@ -249,5 +247,4 @@ __tx_timer_nothing_expired:
 
     DSB                                             // Complete all memory access
     BX      lr                                      // Return to caller
-
 // }
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c
index 10319892..09676039 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c
+++ b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c
@@ -61,7 +61,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_power_of_two_block_size(ULONG size)
@@ -128,7 +128,7 @@ ULONG  _txm_power_of_two_block_size(ULONG size)
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c
index d0f2240b..a8b7c14f 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c
+++ b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c
@@ -70,7 +70,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 UINT  _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c
index 58c4a1be..6468b4cb 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c
+++ b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c
@@ -76,7 +76,7 @@ TXM_MODULE_MANAGER_FAULT_INFO
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_memory_fault_handler(VOID)
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c
index 649b1ad2..f8689bb9 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c
+++ b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c
@@ -71,7 +71,7 @@ extern VOID    (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 UINT  _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
index 8861ab56..78427ab2 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
+++ b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
@@ -61,7 +61,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_module_manager_region_size_get(ULONG block_size)
@@ -184,7 +184,7 @@ ULONG   return_value;
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length)
@@ -261,7 +261,7 @@ UINT    srd_bit_index;
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
diff --git a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S
index 4d8f8fc0..7812baf3 100644
--- a/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S
+++ b/ports_module/cortex_m4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S
@@ -60,8 +60,8 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
-/*  11-09-2020     Scott Larson             Modified comment(s),          */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*  11-09-2020      Scott Larson            Modified comment(s),          */
 /*                                            resulting in version 6.1.2  */
 /*                                                                        */
 /**************************************************************************/
@@ -75,7 +75,7 @@ _txm_module_manager_thread_stack_build:
        on the Cortex-M should look like the following after it is built:
 
        Stack Top:
-                    LR          Interrupted LR (LR at time of PENDSV)
+                    lr          Interrupted lr (lr at time of PENDSV)
                     r4          Initial value for r4
                     r5          Initial value for r5
                     r6          Initial value for r6
@@ -112,7 +112,7 @@ _txm_module_manager_thread_stack_build:
     STR     r3, [r2, #28]                       // Store initial r10
     STR     r3, [r2, #32]                       // Store initial r11
 
-    /* Hardware stack follows.  */
+    /* Hardware stack follows. */
 
     STR     r0, [r2, #36]                       // Store initial r0, which is the thread control block