Release 6.1.8v6.1.8_rel

28 files changed, 512 insertions, 35 deletions

diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx/tx_initialize_low_level.S b/ports_module/cortex_r4/ac6/example_build/sample_threadx/tx_initialize_low_level.S
new file mode 100644
index 00000000..96230fa2
--- /dev/null
+++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx/tx_initialize_low_level.S
@@ -0,0 +1,477 @@
+/**************************************************************************/
+/*                                                                        */
+/*       Copyright (c) Microsoft Corporation. All rights reserved.        */
+/*                                                                        */
+/*       This software is licensed under the Microsoft Software License   */
+/*       Terms for Microsoft Azure RTOS. Full text of the license can be  */
+/*       found in the LICENSE file at https://aka.ms/AzureRTOS_EULA       */
+/*       and in the root directory of this software.                      */
+/*                                                                        */
+/**************************************************************************/
+
+
+/**************************************************************************/
+/**************************************************************************/
+/**                                                                       */
+/** ThreadX Component                                                     */
+/**                                                                       */
+/**   Initialize                                                          */
+/**                                                                       */
+/**************************************************************************/
+/**************************************************************************/
+
+
+/* #define TX_SOURCE_CODE  */
+
+
+/* Include necessary system files.  */
+
+/*
+#include "tx_api.h"
+#include "tx_initialize.h"
+#include "tx_thread.h"
+#include "tx_timer.h"
+*/
+
+#define THUMB_MASK      0x20                    // Thumb bit (5) of CPSR/SPSR
+#define ABT_MODE        0x17                    // ABT mode
+#define SYS_MODE        0x1F                    // SYS mode
+
+#define GICI_BASE       0xAE000000
+#define ICCIAR_OFFSET   0x0000000C
+#define ICCEOIR_OFFSET  0x00000010
+
+
+    .global      _tx_thread_system_stack_ptr
+    .global      _tx_initialize_unused_memory
+    .global      _tx_thread_context_save
+    .global      _tx_thread_context_restore
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    .global      _tx_thread_fiq_context_save
+    .global      _tx_thread_fiq_context_restore
+#endif
+#ifdef TX_ENABLE_IRQ_NESTING
+    .global      _tx_thread_irq_nesting_start
+    .global      _tx_thread_irq_nesting_end
+#endif
+#ifdef TX_ENABLE_FIQ_NESTING
+    .global      _tx_thread_fiq_nesting_start
+    .global      _tx_thread_fiq_nesting_end
+#endif
+    .global      _tx_timer_interrupt
+    .global      __main
+    .global      _tx_version_id
+    .global      _tx_build_options
+
+#ifdef TX_THUMB_MODE
+    .thumb
+#else
+    .arm
+#endif
+    .text
+    .eabi_attribute Tag_ABI_align_preserved, 1
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    _tx_initialize_low_level                          Cortex-R4/ARM     */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function is responsible for any low-level processor            */
+/*    initialization, including setting up interrupt vectors, setting     */
+/*    up a periodic timer interrupt source, saving the system stack       */
+/*    pointer for use in ISR processing later, and finding the first      */
+/*    available RAM memory address for tx_application_define.             */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    _tx_initialize_kernel_enter           ThreadX entry function        */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+/* VOID   _tx_initialize_low_level(VOID)
+{ */
+    .global _tx_initialize_low_level
+    .type   _tx_initialize_low_level, "function"
+_tx_initialize_low_level:
+
+     /* Save the system stack pointer.  */
+     /* _tx_thread_system_stack_ptr = (VOID_PTR) (sp); */
+
+    LDR     r0, =Image$$SVC_STACK$$ZI$$Limit
+    LDR     r1, =_tx_thread_system_stack_ptr    // Pickup address of system stack ptr
+    STR     r0, [r1]                            // Pickup system stack
+
+     /* Save the first available memory address.  */
+     /* _tx_initialize_unused_memory =  (VOID_PTR) Image$$ZI$$Limit   + HEAP + [SYS_STACK] + FIQ_STACK + IRQ_STACK; */
+
+    LDR     r0, =Image$$DATA$$ZI$$Limit
+    LDR     r2, =_tx_initialize_unused_memory   // Pickup unused memory ptr address
+    STR     r0, [r2, #0]                        // Save first free memory address
+
+    /* Return to caller.  */
+    BX      lr                                  // Return to caller
+/* } */
+
+    /* Define shells for each of the interrupt vectors.  */
+
+    .global __tx_undefined
+    .type   __tx_undefined, "function"
+__tx_undefined:
+    B       __tx_undefined                      // Undefined handler
+
+/*** Prefetch and abort handlers are used below for MPU fault handling
+    .global __tx_prefetch_handler
+    .type   __tx_prefetch_handler, "function"
+__tx_prefetch_handler:
+    B       __tx_prefetch_handler               // Prefetch exception handler
+
+    .global __tx_abort_handler
+    .type   __tx_abort_handler, "function"
+__tx_abort_handler:
+    B       __tx_abort_handler                  // Abort exception handler
+*/
+
+    .global __tx_reserved_handler
+    .type   __tx_reserved_handler, "function"
+__tx_reserved_handler:
+    B       __tx_reserved_handler               // Reserved exception handler
+
+
+    .global __tx_irq_handler
+    .type   __tx_irq_handler, "function"
+    .global __tx_irq_processing_return
+    .type   __tx_irq_processing_return, "function"
+__tx_irq_handler:
+
+    /* Jump to context save to save system context.  */
+    B       _tx_thread_context_save
+__tx_irq_processing_return:
+
+    /* Acknowledge the interrupt.  */
+    LDR     r1, =GICI_BASE                      // Load the base of the GIC
+    LDR     r0, [r1, #ICCIAR_OFFSET]            // Read ICCIAR (GIC CPU Interface register)
+    DSB                                         // Ensure that interrupt acknowledge completes before re-enabling interrupts
+    PUSH    {r0, r1}                            // Save the IRQ ID and the GIC base address on the stack
+
+    /* Clear the timer interrupt.  */
+    LDR     r0, =0xB0110000                     // Load the base address of the timer
+    MOV     r1, #1                              // Setup value to write to the interrupt clear register - can be anything.
+    STR     r1, [r0, #0x0C]                     // Clear the interrupt. 0x0C is the offset to the interrupt clear register.
+
+    /* At this point execution is still in the IRQ mode.  The CPSR, point of
+       interrupt, and all C scratch registers are available for use.  In
+       addition, IRQ interrupts may be re-enabled - with certain restrictions -
+       if nested IRQ interrupts are desired.  Interrupts may be re-enabled over
+       small code sequences where lr is saved before enabling interrupts and
+       restored after interrupts are again disabled.  */
+
+
+    BL      _tx_timer_interrupt                 // Timer interrupt handler
+_tx_not_timer_interrupt:
+
+    /* Interrupt nesting is allowed after calling _tx_thread_irq_nesting_start
+       from IRQ mode with interrupts disabled.  This routine switches to the
+       system mode and returns with IRQ interrupts enabled. */
+
+       /* NOTE:  It is very important to ensure all IRQ interrupts are cleared
+          prior to enabling nested IRQ interrupts.  */
+#ifdef TX_ENABLE_IRQ_NESTING
+    BL      _tx_thread_irq_nesting_start
+#endif
+
+
+    /* Application IRQ handlers can be called here!  */
+
+    /* If interrupt nesting was started earlier, the end of interrupt nesting
+       service must be called before returning to _tx_thread_context_restore.
+       This routine returns in processing in IRQ mode with interrupts disabled.  */
+#ifdef TX_ENABLE_IRQ_NESTING
+    BL      _tx_thread_irq_nesting_end
+#endif
+
+    POP     {r0, r1}                            // Restore the IRQ ID and GIC base address
+    STR     r0, [r1, #ICCEOIR_OFFSET]           // Write the IRQ ID to the End Of Interrupt register to clear the active bit
+
+    /* Jump to context restore to restore system context.  */
+    B       _tx_thread_context_restore
+
+
+    /* This is an example of a vectored IRQ handler.  */
+
+    .global __tx_example_vectored_irq_handler
+    .type   __tx_example_vectored_irq_handler, "function"
+__tx_example_vectored_irq_handler:
+
+
+    /* Save initial context and call context save to prepare for
+       vectored ISR execution. */
+
+/*
+    STMDB   sp!, {r0-r3}                        // Save some scratch registers
+    MRS     r0, SPSR                            // Pickup saved SPSR
+    SUB     lr, lr, #4                          // Adjust point of interrupt
+    STMDB   sp!, {r0, r10, r12, lr}             // Store other scratch registers
+    BL      _tx_thread_vectored_context_save    // Vectored context save
+*/
+
+    /* At this point execution is still in the IRQ mode.  The CPSR, point of
+       interrupt, and all C scratch registers are available for use.  In
+       addition, IRQ interrupts may be re-enabled - with certain restrictions -
+       if nested IRQ interrupts are desired.  Interrupts may be re-enabled over
+       small code sequences where lr is saved before enabling interrupts and
+       restored after interrupts are again disabled.  */
+
+
+    /* Interrupt nesting is allowed after calling _tx_thread_irq_nesting_start
+       from IRQ mode with interrupts disabled.  This routine switches to the
+       system mode and returns with IRQ interrupts enabled. */
+
+       /* NOTE:  It is very important to ensure all IRQ interrupts are cleared
+          prior to enabling nested IRQ interrupts.  */
+/*
+#ifdef TX_ENABLE_IRQ_NESTING
+    BL      _tx_thread_irq_nesting_start
+#endif
+*/
+
+    /* Application IRQ handlers can be called here!  */
+
+    /* If interrupt nesting was started earlier, the end of interrupt nesting
+       service must be called before returning to _tx_thread_context_restore.
+       This routine returns in processing in IRQ mode with interrupts disabled.  */
+/*
+#ifdef TX_ENABLE_IRQ_NESTING
+    BL      _tx_thread_irq_nesting_end
+#endif
+*/
+
+    /* Jump to context restore to restore system context.  */
+/*
+    B       _tx_thread_context_restore
+*/
+
+
+#ifdef TX_ENABLE_FIQ_SUPPORT
+    .global __tx_fiq_handler
+    .type   __tx_fiq_handler, "function"
+__tx_fiq_handler:
+
+    /* Jump to fiq context save to save system context.  */
+    B       _tx_thread_fiq_context_save
+
+    .global __tx_fiq_processing_return
+    .type   __tx_fiq_processing_return, "function"
+__tx_fiq_processing_return:
+
+    /* At this point execution is still in the FIQ mode.  The CPSR, point of
+       interrupt, and all C scratch registers are available for use.  */
+
+    /* Interrupt nesting is allowed after calling _tx_thread_fiq_nesting_start
+       from FIQ mode with interrupts disabled.  This routine switches to the
+       system mode and returns with FIQ interrupts enabled. */
+
+       /* NOTE:  It is very important to ensure all FIQ interrupts are cleared
+          prior to enabling nested FIQ interrupts.  */
+#ifdef TX_ENABLE_FIQ_NESTING
+    BL      _tx_thread_fiq_nesting_start
+#endif
+
+    /* Application FIQ handlers can be called here!  */
+
+    /* If interrupt nesting was started earlier, the end of interrupt nesting
+       service must be called before returning to _tx_thread_fiq_context_restore.  */
+#ifdef TX_ENABLE_FIQ_NESTING
+    BL      _tx_thread_fiq_nesting_end
+#endif
+
+    /* Jump to fiq context restore to restore system context.  */
+    B       _tx_thread_fiq_context_restore
+
+
+#else
+    .global __tx_fiq_handler
+    .type   __tx_fiq_handler, "function"
+__tx_fiq_handler:
+    B       __tx_fiq_handler                    // FIQ interrupt handler
+#endif
+
+/**************************************************************************/
+/*                                                                        */
+/*  FUNCTION                                               RELEASE        */
+/*                                                                        */
+/*    __tx_prefetch_handler & __tx_abort_handler      Cortex-R4/MPU/ARM   */
+/*                                                           6.1          */
+/*  AUTHOR                                                                */
+/*                                                                        */
+/*    Scott Larson, Microsoft Corporation                                 */
+/*                                                                        */
+/*  DESCRIPTION                                                           */
+/*                                                                        */
+/*    This function handles MPU exceptions and fills the                  */
+/*    _txm_module_manager_memory_fault_info struct.                       */
+/*                                                                        */
+/*  INPUT                                                                 */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  OUTPUT                                                                */
+/*                                                                        */
+/*    None                                                                */
+/*                                                                        */
+/*  CALLS                                                                 */
+/*                                                                        */
+/*    _txm_module_manager_memory_fault_handler                            */
+/*    _tx_execution_thread_exit                                           */
+/*    _tx_thread_schedule                                                 */
+/*                                                                        */
+/*  CALLED BY                                                             */
+/*                                                                        */
+/*    MMU exceptions                                                      */
+/*                                                                        */
+/*  RELEASE HISTORY                                                       */
+/*                                                                        */
+/*    DATE              NAME                      DESCRIPTION             */
+/*                                                                        */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
+/*                                                                        */
+/**************************************************************************/
+
+/********************************************************************
+  MMU Exception Handling
+********************************************************************/
+    .global  _tx_thread_system_state
+    .global  _txm_module_manager_memory_fault_info
+    .global  _tx_thread_current_ptr
+    .global  _txm_module_manager_memory_fault_handler
+    .global  _tx_thread_schedule
+
+    #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    .global  _tx_execution_thread_exit
+    #endif
+
+
+    .arm	/* Exception handler in ARM mode.  */
+    .align 	3
+    .global	__tx_prefetch_handler
+    .global __tx_abort_handler
+	.type   __tx_prefetch_handler, "function"
+    .type   __tx_abort_handler, "function"
+
+__tx_prefetch_handler:
+__tx_abort_handler:
+    STMDB   sp!, {r0-r3}                    // Save some working registers
+    LDR     r3, =_tx_thread_system_state    // Pickup address of system state var
+    LDR     r2, [r3, #0]                    // Pickup system state
+    ADD     r2, r2, #1                      // Increment the interrupt counter
+    STR     r2, [r3, #0]                    // Store it back in the variable
+
+    // Now pickup and store all the fault related information
+
+    // Pickup the memory fault info struct
+    LDR     r3, =_txm_module_manager_memory_fault_info
+    LDR     r0, =_tx_thread_current_ptr     // Build current thread pointer address
+    LDR     r1, [r0]                        // Pickup the current thread pointer
+    STR     r1, [r3, #0]                    // Save current thread pointer
+
+    MRC     p15, 0, r0, c6, c0, 0           // Read DFAR
+    STR     r0, [r3, #8]                    // Save DFAR
+
+    CMP     r0, #0                          // Was it a data or instruction fault?
+    SUBEQ   lr, lr, #4                      // Adjust point of exception for instruction
+    SUBNE   lr, lr, #8                      // Adjust point of exception for data
+    STR     lr, [r3, #4]                    // Save point of fault
+
+    MRC     p15, 0, r0, c5, c0, 0           // Read DFSR
+    STR     r0, [r3, #12]                   // Save DFSR
+    MRC     p15, 0, r0, c6, c0, 2           // Read IFAR
+    STR     r0, [r3, #16]                   // Save IFAR
+    MRC     p15, 0, r0, c5, c0, 1           // Read IFSR
+    STR     r0, [r3, #20]                   // Save IFSR
+    MOV     r0, #0                          // Build zero register
+    MCR     p15, 0, r0, c6, c0, 0           // Clear DFAR
+    MCR     p15, 0, r0, c5, c0, 0           // Clear DFSR
+    MCR     p15, 0, r0, c6, c0, 2           // Clear IFAR
+    MCR     p15, 0, r0, c5, c0, 1           // Clear IFSR
+
+    // Save registers r0-r12
+    POP     {r0-r2}
+    STR     r0, [r3, #28]                   // Save r0
+    STR     r1, [r3, #32]                   // Save r1
+    STR     r2, [r3, #36]                   // Save r2
+    POP     {r0}
+    STR     r0, [r3, #40]                   // Save r3
+    STR     r4, [r3, #44]                   // Save r4
+    STR     r5, [r3, #48]                   // Save r5
+    STR     r6, [r3, #52]                   // Save r6
+    STR     r7, [r3, #56]                   // Save r7
+    STR     r8, [r3, #60]                   // Save r8
+    STR     r9, [r3, #64]                   // Save r9
+    STR     r10,[r3, #68]                   // Save r10
+    STR     r11,[r3, #72]                   // Save r11
+    STR     r12,[r3, #76]                   // Save r12
+
+    CPS     #SYS_MODE                       // Enter SYS mode
+    MOV     r0, lr                          // Pickup lr
+    MOV     r1, sp                          // Pickup sp
+    CPS     #ABT_MODE                       // Back to ABT mode
+    STR     r0, [r3, #80]                   // Save lr
+    STR     r1, [r3, #24]                   // Save sp
+    MRS     r0, SPSR                        // Pickup SPSR
+    STR     r0, [r3, #84]                   // Save SPSR
+    ORR     r0, r0, #SYS_MODE               // Return into SYS mode
+    BIC     r0, r0, #THUMB_MASK             // Clear THUMB mode
+    MSR     SPSR_c, r0                      // Save SPSR
+
+    // Call memory manager fault handler
+    BL      _txm_module_manager_memory_fault_handler
+
+#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
+    /* Call the thread exit function to indicate the thread is no longer executing.  */
+    BL      _tx_execution_thread_exit       // Call the thread exit function
+#endif
+
+    LDR     r0, =_tx_thread_system_state    // Pickup address of system state
+    LDR     r1, [r0]                        // Pickup system state
+    SUB     r1, r1, #1                      // Decrement
+    STR     r1, [r0]                        // Store new system state
+
+    MOV     r1, #0                          // Build NULL value
+    LDR     r0, =_tx_thread_current_ptr     // Pickup address of current thread pointer
+    STR     r1, [r0]                        // Clear current thread pointer
+
+    // Return from exception
+    LDR     lr, =_tx_thread_schedule        // Load scheduler address
+    SUBS    pc, lr, #0                      // Return to scheduler
+/********************************************************************
+  End of MMU exception handling.
+********************************************************************/
+
+    /* Reference build options and version ID to ensure they come in.  */
+
+    LDR     r2, =_tx_build_options              // Pickup build options variable address
+    LDR     r0, [r2, #0]                        // Pickup build options content
+    LDR     r2, =_tx_version_id                 // Pickup version ID variable address
+    LDR     r0, [r2, #0]                        // Pickup version ID content
diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
index 4b2f6cb7..96230fa2 100644
--- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
+++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S
@@ -108,7 +108,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 /* VOID   _tx_initialize_low_level(VOID)
@@ -355,7 +355,7 @@ __tx_fiq_handler:
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 
diff --git a/ports_module/cortex_r4/ac6/inc/txm_module_port.h b/ports_module/cortex_r4/ac6/inc/txm_module_port.h
index 15f7ec88..4ea78729 100644
--- a/ports_module/cortex_r4/ac6/inc/txm_module_port.h
+++ b/ports_module/cortex_r4/ac6/inc/txm_module_port.h
@@ -40,7 +40,7 @@
 /*                                                                        */ 
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 
diff --git a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S
index 6ee089f2..f7fff787 100644
--- a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S
+++ b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S
@@ -80,7 +80,7 @@
 /*                                                                        */ 
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 /* VOID   _txm_module_initialize(VOID *heap_base, VOID *heap_top) */
diff --git a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c
index 3415c85c..477f054d 100644
--- a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c
+++ b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c
@@ -93,7 +93,7 @@ extern VOID     _txm_module_initialize(VOID *heap_base, VOID *heap_top);
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S
index d739d0e1..8f46cfaf 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S
+++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S
@@ -94,7 +94,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 /* VOID   _tx_thread_context_restore(VOID)
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S
index bd37aff2..f9799509 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S
+++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S
@@ -87,7 +87,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 /* VOID   _tx_thread_schedule(VOID) */
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S
index f3d4ac6c..7faf069c 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S
+++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S
@@ -83,7 +83,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 /* VOID   _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) */
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c
index 0b412241..77aa1a7c 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c
+++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c
@@ -61,7 +61,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_power_of_two_block_size(ULONG size)
@@ -132,7 +132,7 @@ ULONG  _txm_power_of_two_block_size(ULONG size)
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble,
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c
index d58987c8..a7313179 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c
+++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c
@@ -69,7 +69,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 UINT  _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c
index 29eab3c3..886de011 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c
+++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c
@@ -76,7 +76,7 @@ TXM_MODULE_MANAGER_FAULT_INFO
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_memory_fault_handler(VOID)
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c
index 35ef0416..2404e2fd 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c
+++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c
@@ -71,7 +71,7 @@ extern VOID    (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 UINT  _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
index 0ac981b1..da5cdeb5 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
+++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
@@ -60,7 +60,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_module_manager_region_size_get(ULONG block_size)
@@ -186,7 +186,7 @@ ULONG   return_value;
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length)
@@ -280,7 +280,7 @@ UINT    srd_bit_index;
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S
index 08d09003..f07b3111 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S
+++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S
@@ -64,7 +64,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 /* VOID   _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S
index 88145fa2..7ca8a4fd 100644
--- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S
+++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S
@@ -59,7 +59,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
     .text
diff --git a/ports_module/cortex_r4/iar/example_build/tx_initialize_low_level.s b/ports_module/cortex_r4/iar/example_build/tx_initialize_low_level.s
index 2e9c4519..3371743c 100644
--- a/ports_module/cortex_r4/iar/example_build/tx_initialize_low_level.s
+++ b/ports_module/cortex_r4/iar/example_build/tx_initialize_low_level.s
@@ -107,7 +107,7 @@ __tx_free_memory_start
 ;/*                                                                        */ 
 ;/*    DATE              NAME                      DESCRIPTION             */
 ;/*                                                                        */
-;/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+;/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 ;/*                                                                        */
 ;/**************************************************************************/
 ;VOID   _tx_initialize_low_level(VOID)
@@ -288,7 +288,7 @@ __tx_fiq_handler
 ;/*                                                                        */ 
 ;/*    DATE              NAME                      DESCRIPTION             */
 ;/*                                                                        */
-;/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+;/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 ;/*                                                                        */
 ;/**************************************************************************/
 
diff --git a/ports_module/cortex_r4/iar/inc/txm_module_port.h b/ports_module/cortex_r4/iar/inc/txm_module_port.h
index ecc2b290..cf504a45 100644
--- a/ports_module/cortex_r4/iar/inc/txm_module_port.h
+++ b/ports_module/cortex_r4/iar/inc/txm_module_port.h
@@ -40,7 +40,7 @@
 /*                                                                        */ 
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 
diff --git a/ports_module/cortex_r4/iar/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_r4/iar/module_lib/src/txm_module_thread_shell_entry.c
index be6d16fd..299139a5 100644
--- a/ports_module/cortex_r4/iar/module_lib/src/txm_module_thread_shell_entry.c
+++ b/ports_module/cortex_r4/iar/module_lib/src/txm_module_thread_shell_entry.c
@@ -91,7 +91,7 @@ extern VOID __iar_data_init3(VOID);
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info)
diff --git a/ports_module/cortex_r4/iar/module_manager/src/tx_thread_context_restore.s b/ports_module/cortex_r4/iar/module_manager/src/tx_thread_context_restore.s
index 4c267979..69e9c979 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/tx_thread_context_restore.s
+++ b/ports_module/cortex_r4/iar/module_manager/src/tx_thread_context_restore.s
@@ -76,7 +76,7 @@ THUMB_MASK      DEFINE  0x20                    ; Thumb bit mask
 ;/*                                                                        */ 
 ;/*    DATE              NAME                      DESCRIPTION             */
 ;/*                                                                        */
-;/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+;/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 ;/*                                                                        */
 ;/**************************************************************************/
 ;VOID   _tx_thread_context_restore(VOID)
diff --git a/ports_module/cortex_r4/iar/module_manager/src/tx_thread_schedule.s b/ports_module/cortex_r4/iar/module_manager/src/tx_thread_schedule.s
index ebd24a4e..cdb924e5 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/tx_thread_schedule.s
+++ b/ports_module/cortex_r4/iar/module_manager/src/tx_thread_schedule.s
@@ -75,7 +75,7 @@ MODE_MASK           EQU     0x1F            ; Mode mask
 ;/*                                                                        */ 
 ;/*    DATE              NAME                      DESCRIPTION             */
 ;/*                                                                        */
-;/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+;/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 ;/*                                                                        */
 ;/**************************************************************************/
 ;VOID   _tx_thread_schedule(VOID)
diff --git a/ports_module/cortex_r4/iar/module_manager/src/tx_thread_stack_build.s b/ports_module/cortex_r4/iar/module_manager/src/tx_thread_stack_build.s
index 8795214a..cdcc4305 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/tx_thread_stack_build.s
+++ b/ports_module/cortex_r4/iar/module_manager/src/tx_thread_stack_build.s
@@ -62,7 +62,7 @@ CPSR_MASK       DEFINE  0x9F                    ; Mask initial CPSR, IRQ ints en
 ;/*                                                                        */ 
 ;/*    DATE              NAME                      DESCRIPTION             */
 ;/*                                                                        */
-;/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+;/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 ;/*                                                                        */
 ;/**************************************************************************/
 ;VOID   _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID))
diff --git a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_alignment_adjust.c b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_alignment_adjust.c
index 2500314b..68a6b244 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_alignment_adjust.c
+++ b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_alignment_adjust.c
@@ -61,7 +61,7 @@
 /*                                                                        */ 
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_power_of_two_block_size(ULONG size)
@@ -128,7 +128,7 @@ ULONG  _txm_power_of_two_block_size(ULONG size)
 /*                                                                        */ 
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_alignment_adjust(TXM_MODULE_PREAMBLE *module_preamble, 
diff --git a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_external_memory_enable.c b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_external_memory_enable.c
index c59fc069..31847373 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_external_memory_enable.c
+++ b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_external_memory_enable.c
@@ -69,7 +69,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 UINT  _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance,
diff --git a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_handler.c b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_handler.c
index 4bc7c3aa..97cc393f 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_handler.c
+++ b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_handler.c
@@ -76,7 +76,7 @@ TXM_MODULE_MANAGER_FAULT_INFO
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_memory_fault_handler(VOID)
diff --git a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_notify.c b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_notify.c
index c8244c2b..1ad3cf92 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_notify.c
+++ b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_memory_fault_notify.c
@@ -71,7 +71,7 @@ extern VOID    (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA
 /*                                                                        */ 
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 UINT  _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *))
diff --git a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_mm_register_setup.c
index cc59721d..b05180da 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_mm_register_setup.c
+++ b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_mm_register_setup.c
@@ -60,7 +60,7 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_module_manager_region_size_get(ULONG block_size)
@@ -183,7 +183,7 @@ ULONG   return_value;
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 ULONG  _txm_module_manager_calculate_srd_bits(ULONG block_size, ULONG length)
@@ -276,7 +276,7 @@ UINT    srd_bit_index;
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 /*                                                                        */
 /**************************************************************************/
 VOID  _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
diff --git a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_thread_stack_build.s b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_thread_stack_build.s
index 78b016c5..dd519475 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_thread_stack_build.s
+++ b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_thread_stack_build.s
@@ -64,7 +64,7 @@ CPSR_MASK       DEFINE  0xBF                    ; Mask initial CPSR, IRQ ints en
 ;/*                                                                        */ 
 ;/*    DATE              NAME                      DESCRIPTION             */
 ;/*                                                                        */
-;/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+;/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 ;/*                                                                        */
 ;/**************************************************************************/
 ;VOID   _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *))
diff --git a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_user_mode_entry.s b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_user_mode_entry.s
index a14ef099..52aefe0d 100644
--- a/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_user_mode_entry.s
+++ b/ports_module/cortex_r4/iar/module_manager/src/txm_module_manager_user_mode_entry.s
@@ -61,7 +61,7 @@
 ;/*                                                                        */ 
 ;/*    DATE              NAME                      DESCRIPTION             */
 ;/*                                                                        */
-;/*  09-30-2020     Scott Larson             Initial Version 6.1           */
+;/*  09-30-2020      Scott Larson            Initial Version 6.1           */
 ;/*                                                                        */
 ;/**************************************************************************/
     PUBLIC  _txm_module_manager_user_mode_entry